2012-09-26 Ian Bolton <ian.bolton@arm.com>

        Jim MacArthur  <jim.macarthur@arm.com>
        Marcus Shawcroft  <marcus.shawcroft@arm.com>
        Nigel Stephens  <nigel.stephens@arm.com>
        Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
        Richard Earnshaw  <rearnsha@arm.com>
        Sofiane Naci  <sofiane.naci@arm.com>
        Tejas Belagod  <tejas.belagod@arm.com>
        Yufeng Zhang  <yufeng.zhang@arm.com>

        * aarch64/Makefile.in: New file.
        * aarch64/_exit.c: New file.
        * aarch64/_kill.c: New file.
        * aarch64/aclocal.m4: Generated.
        * aarch64/configure: Generated.
        * aarch64/configure.in: New file.
        * aarch64/cpu-init/Makefile.in: New file.
        * aarch64/cpu-init/rdimon-aem-el3.S: New file.
        * aarch64/crt0.S: New file.
        * aarch64/elf-rdimon.specs: New file.
        * aarch64/libcfunc.c: New file.
        * aarch64/svc.h: New file.
        * aarch64/syscalls.c: New file.
        * configure.in: Add AArch64.
        * configure: Re-generated.

1 files changed, 41 insertions, 0 deletions

diff --git a/libgloss/aarch64/_exit.c b/libgloss/aarch64/_exit.c
new file mode 100644
index 000000000..a4f9d9eb5
--- /dev/null
+++ b/libgloss/aarch64/_exit.c
@@ -0,0 +1,41 @@
+/* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd.  All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+ 1. Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+ 2. Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+ 3. The name of the company may not be used to endorse or promote
+    products derived from this software without specific prior written
+    permission.
+
+ THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
+
+#include <_ansi.h>
+#include "svc.h"
+
+void _exit _PARAMS ((int));
+
+__attribute__ ((noreturn)) void
+_exit (int status)
+{
+  while (1)
+    {
+      param_block_t block[2];
+      block[0] = ADP_Stopped_ApplicationExit;
+      block[1] = status;
+      do_AngelSVC (AngelSVC_Reason_ReportException, block);
+    }
+}