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authorcvs2svn <>2013-11-29 14:14:14 +0400
committercvs2svn <>2013-11-29 14:14:14 +0400
commit436672b1069b208bddf38b9e29de8b8c24ee1f2a (patch)
tree44493138aea52ef76c6b5f5b845097b473c4bdc8 /libgloss/arm/cpu-init/rdimon-aem.S
parentfea986bdc63b9761fe8630e9d97b2da0e6ab3535 (diff)
This commit was manufactured by cvs2svn to create tag 'cygwin-cygwin-1_7_26-release
1_7_26-release'. Sprout from master 2013-11-29 10:14:13 UTC Corinna Vinschen <corinna@vinschen.de> ' * new-features.xml (ov-new1.7.26): Fix section ID and title. Add' Cherrypick from cygnus 1999-05-03 07:29:06 UTC Richard Henderson <rth@redhat.com> '19990502 sourceware import': README config/mt-d30v config/mt-ospace etc/add-log.el etc/add-log.vi etc/configbuild.ein etc/configbuild.fig etc/configbuild.jin etc/configbuild.tin etc/configdev.ein etc/configdev.fig etc/configdev.jin etc/configdev.tin include/coff/sym.h makefile.vms Delete: COPYING3 COPYING3.LIB config.rpath configure.ac djunpack.bat libgloss/ChangeLog libgloss/Makefile.in libgloss/README libgloss/aarch64/Makefile.in libgloss/aarch64/_exit.c libgloss/aarch64/_kill.c libgloss/aarch64/aclocal.m4 libgloss/aarch64/configure libgloss/aarch64/configure.in libgloss/aarch64/cpu-init/Makefile.in libgloss/aarch64/cpu-init/aclocal.m4 libgloss/aarch64/cpu-init/configure libgloss/aarch64/cpu-init/configure.in libgloss/aarch64/cpu-init/rdimon-aem-el3.S libgloss/aarch64/crt0.S libgloss/aarch64/elf-aem-validation.specs libgloss/aarch64/elf-aem-ve.specs libgloss/aarch64/elf-rdimon.specs libgloss/aarch64/ftruncate.c libgloss/aarch64/libcfunc.c libgloss/aarch64/svc.h libgloss/aarch64/syscalls.c libgloss/aarch64/truncate.c libgloss/acinclude.m4 libgloss/aclocal.m4 libgloss/arm/Makefile.in libgloss/arm/_exit.c libgloss/arm/_kill.c libgloss/arm/aclocal.m4 libgloss/arm/arm.h libgloss/arm/coff-iq80310.specs libgloss/arm/coff-pid.specs libgloss/arm/coff-rdimon.specs libgloss/arm/coff-rdpmon.specs libgloss/arm/coff-redboot.ld libgloss/arm/coff-redboot.specs libgloss/arm/configure libgloss/arm/configure.in libgloss/arm/cpu-init/Makefile.in libgloss/arm/cpu-init/rdimon-aem.S libgloss/arm/crt0.S libgloss/arm/elf-aprofile-validation.specs libgloss/arm/elf-aprofile-ve.specs libgloss/arm/elf-iq80310.specs libgloss/arm/elf-linux.specs libgloss/arm/elf-pid.specs libgloss/arm/elf-rdimon.specs libgloss/arm/elf-rdpmon.specs libgloss/arm/elf-redboot.ld libgloss/arm/elf-redboot.specs libgloss/arm/ftruncate.c libgloss/arm/libcfunc.c libgloss/arm/linux-crt0.c libgloss/arm/linux-syscall.h libgloss/arm/linux-syscalls0.S libgloss/arm/linux-syscalls1.c libgloss/arm/redboot-crt0.S libgloss/arm/redboot-syscalls.c libgloss/arm/swi.h libgloss/arm/syscall.h libgloss/arm/syscalls.c libgloss/arm/trap.S libgloss/arm/truncate.c libgloss/bfin/Makefile.in libgloss/bfin/_exit.c libgloss/bfin/aclocal.m4 libgloss/bfin/basiccrt.S libgloss/bfin/bf504.ld libgloss/bfin/bf506.ld libgloss/bfin/bf512.ld libgloss/bfin/bf514.ld libgloss/bfin/bf516.ld libgloss/bfin/bf518.ld libgloss/bfin/bf522.ld libgloss/bfin/bf523.ld libgloss/bfin/bf524.ld libgloss/bfin/bf525.ld libgloss/bfin/bf526.ld libgloss/bfin/bf527.ld libgloss/bfin/bf531.ld libgloss/bfin/bf532.ld libgloss/bfin/bf533.ld libgloss/bfin/bf534.ld libgloss/bfin/bf536.ld libgloss/bfin/bf537.ld libgloss/bfin/bf538.ld libgloss/bfin/bf539.ld libgloss/bfin/bf542.ld libgloss/bfin/bf544.ld libgloss/bfin/bf547.ld libgloss/bfin/bf548.ld libgloss/bfin/bf549.ld libgloss/bfin/bf561.ld libgloss/bfin/bf561a.ld libgloss/bfin/bf561b.ld libgloss/bfin/bf561m.ld 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libgloss/sparc/erc32-crt0.S libgloss/sparc/erc32-io.c libgloss/sparc/erc32-stub.c libgloss/sparc/erc32.ld libgloss/sparc/ex930.ld libgloss/sparc/ex931.ld libgloss/sparc/ex934.ld libgloss/sparc/fixctors.c libgloss/sparc/libsys/Makefile.in libgloss/sparc/libsys/_exit.S libgloss/sparc/libsys/aclocal.m4 libgloss/sparc/libsys/cerror.S libgloss/sparc/libsys/configure libgloss/sparc/libsys/configure.in libgloss/sparc/libsys/isatty.c libgloss/sparc/libsys/libsys-crt0.S libgloss/sparc/libsys/sbrk.S libgloss/sparc/libsys/syscall.h libgloss/sparc/libsys/syscallasm.h libgloss/sparc/libsys/template.S libgloss/sparc/libsys/template_r.S libgloss/sparc/salib-701.c libgloss/sparc/salib.c libgloss/sparc/slite.h libgloss/sparc/sparc-stub.c libgloss/sparc/sparc86x.ld libgloss/sparc/sparcl-stub.c libgloss/sparc/sparclet-stub.c libgloss/sparc/sparclite.h libgloss/sparc/sysc-701.c libgloss/sparc/syscalls.c libgloss/sparc/test.c libgloss/sparc/traps.S libgloss/sparc/tsc701.ld libgloss/sparc_leon/Makefile.in libgloss/sparc_leon/_exit.c libgloss/sparc_leon/aclocal.m4 libgloss/sparc_leon/amba.c libgloss/sparc_leon/amba_dbg.c libgloss/sparc_leon/amba_driver.c libgloss/sparc_leon/amba_scan.c libgloss/sparc_leon/asm-leon/amba.h libgloss/sparc_leon/asm-leon/asmmacro.h libgloss/sparc_leon/asm-leon/clock.h libgloss/sparc_leon/asm-leon/contextswitch.h libgloss/sparc_leon/asm-leon/elfmacro.h libgloss/sparc_leon/asm-leon/head.h libgloss/sparc_leon/asm-leon/irq.h libgloss/sparc_leon/asm-leon/jiffies.h libgloss/sparc_leon/asm-leon/lambapp.h libgloss/sparc_leon/asm-leon/lambapp_devs.h libgloss/sparc_leon/asm-leon/leon.h libgloss/sparc_leon/asm-leon/leon3.h libgloss/sparc_leon/asm-leon/leonbare_debug.h libgloss/sparc_leon/asm-leon/leonbare_kernel.h libgloss/sparc_leon/asm-leon/leonbare_kernel_queue.h libgloss/sparc_leon/asm-leon/leoncompat.h libgloss/sparc_leon/asm-leon/leondbg.h libgloss/sparc_leon/asm-leon/leonstack.h libgloss/sparc_leon/asm-leon/liblocks.h libgloss/sparc_leon/asm-leon/linkage.h libgloss/sparc_leon/asm-leon/param.h libgloss/sparc_leon/asm-leon/queue.h libgloss/sparc_leon/asm-leon/spinlock.h libgloss/sparc_leon/asm-leon/stack.h libgloss/sparc_leon/asm-leon/time.h libgloss/sparc_leon/asm-leon/timer.h libgloss/sparc_leon/asm-leon/types.h libgloss/sparc_leon/asm-leon/winmacros.h libgloss/sparc_leon/bdinit.S libgloss/sparc_leon/busscan.S libgloss/sparc_leon/cacheA.S libgloss/sparc_leon/catch_interrupt.c libgloss/sparc_leon/catch_interrupt_mvt.c libgloss/sparc_leon/catch_interrupt_pending.c libgloss/sparc_leon/catch_interrupt_svt.c libgloss/sparc_leon/configure libgloss/sparc_leon/configure.in libgloss/sparc_leon/console.c libgloss/sparc_leon/console_dbg.c libgloss/sparc_leon/console_init.c libgloss/sparc_leon/contextswitch.c libgloss/sparc_leon/contextswitch_asm.S libgloss/sparc_leon/crt0.S libgloss/sparc_leon/crti.S libgloss/sparc_leon/crtn.S libgloss/sparc_leon/etrap.S libgloss/sparc_leon/etrap_fast.S libgloss/sparc_leon/fpu.S libgloss/sparc_leon/gettimeofday.c libgloss/sparc_leon/initcalls.c libgloss/sparc_leon/io.c libgloss/sparc_leon/irqinstall.S libgloss/sparc_leon/irqtrap.S libgloss/sparc_leon/irqtrap_fast.S libgloss/sparc_leon/jiffies.c libgloss/sparc_leon/kernel.c libgloss/sparc_leon/kernel_context.S libgloss/sparc_leon/kernel_debug.c libgloss/sparc_leon/kernel_debug_var.c libgloss/sparc_leon/kernel_mm.c libgloss/sparc_leon/kernel_mutex.c libgloss/sparc_leon/kernel_queue.c libgloss/sparc_leon/kernel_sched.c libgloss/sparc_leon/kernel_thread.c libgloss/sparc_leon/lcpuinit.S libgloss/sparc_leon/locore.S libgloss/sparc_leon/locore_atexit.c libgloss/sparc_leon/locore_clean.S libgloss/sparc_leon/locore_mvt.S libgloss/sparc_leon/locore_mvt_reset.S libgloss/sparc_leon/locore_svt.S libgloss/sparc_leon/locore_svt_reset.S libgloss/sparc_leon/locore_svtdisp.S libgloss/sparc_leon/locore_var.S libgloss/sparc_leon/locore_var_svt.S libgloss/sparc_leon/mmu_asm.S libgloss/sparc_leon/mutex.c libgloss/sparc_leon/nocache.S libgloss/sparc_leon/pnpinit.c libgloss/sparc_leon/pnpinit_malloc.c libgloss/sparc_leon/pnpinit_simple.c libgloss/sparc_leon/regwin.S libgloss/sparc_leon/regwin_patch.c libgloss/sparc_leon/regwin_slow.S libgloss/sparc_leon/regwinflush.S libgloss/sparc_leon/rtc.c libgloss/sparc_leon/rtrap.S libgloss/sparc_leon/rtrap_fast.S libgloss/sparc_leon/stop.S libgloss/sparc_leon/timer.c libgloss/sparc_leon/times.c libgloss/spu/Makefile.in libgloss/spu/access.c libgloss/spu/aclocal.m4 libgloss/spu/chdir.c libgloss/spu/chmod.c libgloss/spu/chown.c libgloss/spu/close.c libgloss/spu/configure libgloss/spu/configure.in libgloss/spu/conv_stat.c libgloss/spu/crt0.S libgloss/spu/crti.S libgloss/spu/crtn.S libgloss/spu/dirfuncs.c libgloss/spu/dup.c libgloss/spu/dup2.c libgloss/spu/exit.c libgloss/spu/fchdir.c libgloss/spu/fchmod.c libgloss/spu/fchown.c libgloss/spu/fdatasync.c libgloss/spu/fstat.c libgloss/spu/fsync.c libgloss/spu/ftruncate.c libgloss/spu/getcwd.c libgloss/spu/getitimer.c libgloss/spu/getpagesize.c libgloss/spu/getpid.c libgloss/spu/gettimeofday.c libgloss/spu/isatty.c libgloss/spu/jsre.h libgloss/spu/kill.c libgloss/spu/lchown.c libgloss/spu/link.c libgloss/spu/linux_getpid.c libgloss/spu/linux_gettid.c libgloss/spu/linux_syscalls.c libgloss/spu/lockf.c libgloss/spu/lseek.c libgloss/spu/lstat.c libgloss/spu/mkdir.c libgloss/spu/mknod.c libgloss/spu/mkstemp.c libgloss/spu/mktemp.c libgloss/spu/mmap_eaddr.c libgloss/spu/mremap_eaddr.c libgloss/spu/msync_eaddr.c libgloss/spu/munmap_eaddr.c libgloss/spu/nanosleep.c libgloss/spu/open.c libgloss/spu/pread.c libgloss/spu/pwrite.c libgloss/spu/read.c libgloss/spu/readlink.c libgloss/spu/readv.c libgloss/spu/rmdir.c libgloss/spu/sbrk.c libgloss/spu/sched_yield.c libgloss/spu/setitimer.c libgloss/spu/shm_open.c libgloss/spu/shm_unlink.c libgloss/spu/stat.c libgloss/spu/symlink.c libgloss/spu/sync.c libgloss/spu/syscalls.c libgloss/spu/times.c libgloss/spu/truncate.c libgloss/spu/umask.c libgloss/spu/unlink.c libgloss/spu/utime.c libgloss/spu/utimes.c libgloss/spu/write.c libgloss/spu/writev.c libgloss/stat.c libgloss/syscall.h libgloss/testsuite/Makefile.in libgloss/testsuite/config/hppa.mt libgloss/testsuite/config/m68k.mt libgloss/testsuite/config/mips.mt libgloss/testsuite/config/support.c libgloss/testsuite/configure.in libgloss/testsuite/lib/libgloss.exp libgloss/testsuite/libgloss.all/.gdbinit libgloss/testsuite/libgloss.all/Makefile.in libgloss/testsuite/libgloss.all/array.c libgloss/testsuite/libgloss.all/configure.in libgloss/testsuite/libgloss.all/div.c libgloss/testsuite/libgloss.all/double.c libgloss/testsuite/libgloss.all/float.c libgloss/testsuite/libgloss.all/func.c libgloss/testsuite/libgloss.all/io.c libgloss/testsuite/libgloss.all/math.c libgloss/testsuite/libgloss.all/memory.c libgloss/testsuite/libgloss.all/misc.c libgloss/testsuite/libgloss.all/printf.c libgloss/testsuite/libgloss.all/struct.c libgloss/testsuite/libgloss.all/varargs.c libgloss/testsuite/libgloss.all/varargs2.c libgloss/tic6x/Makefile.in libgloss/tic6x/aclocal.m4 libgloss/tic6x/configure libgloss/tic6x/configure.in libgloss/tic6x/crt0.S libgloss/tic6x/getpid.c libgloss/tic6x/kill.c libgloss/tic6x/sbrk.c libgloss/tic6x/syscalls.c libgloss/unlink.c libgloss/v850/Makefile.in libgloss/v850/_exit.c libgloss/v850/access.c libgloss/v850/aclocal.m4 libgloss/v850/chmod.c libgloss/v850/chown.c libgloss/v850/close.c libgloss/v850/configure libgloss/v850/configure.in libgloss/v850/creat.c libgloss/v850/crt0.S libgloss/v850/crt1.c libgloss/v850/execv.c libgloss/v850/execve.c libgloss/v850/fork.c libgloss/v850/fstat.c libgloss/v850/getpid.c libgloss/v850/gettime.c libgloss/v850/isatty.c libgloss/v850/kill.c libgloss/v850/link.c libgloss/v850/lseek.c libgloss/v850/open.c libgloss/v850/pipe.c libgloss/v850/read.c libgloss/v850/sbrk.c libgloss/v850/sim.ld libgloss/v850/stat.c libgloss/v850/sys/syscall.h libgloss/v850/time.c libgloss/v850/times.c libgloss/v850/trap.S libgloss/v850/unlink.c libgloss/v850/utime.c libgloss/v850/wait.c libgloss/v850/write.c libgloss/wince/Makefile.am libgloss/wince/Makefile.in libgloss/wince/aclocal.m4 libgloss/wince/configure libgloss/wince/configure.in libgloss/write.c libgloss/xc16x/Makefile.in libgloss/xc16x/aclocal.m4 libgloss/xc16x/close.S libgloss/xc16x/configure libgloss/xc16x/configure.in libgloss/xc16x/create.c libgloss/xc16x/crt0.S libgloss/xc16x/fstat.S libgloss/xc16x/getchar1.c libgloss/xc16x/isatty.c libgloss/xc16x/lseek.c libgloss/xc16x/mem-layout.c libgloss/xc16x/misc.c libgloss/xc16x/open.c libgloss/xc16x/read.c libgloss/xc16x/sbrk.c libgloss/xc16x/sys/syscall.h libgloss/xc16x/syscalls.c libgloss/xc16x/trap_handle.c libgloss/xc16x/write.c libgloss/xstormy16/Makefile.in libgloss/xstormy16/aclocal.m4 libgloss/xstormy16/close.c libgloss/xstormy16/configure libgloss/xstormy16/configure.in libgloss/xstormy16/crt0.s libgloss/xstormy16/crt0_stub.s libgloss/xstormy16/crti.s libgloss/xstormy16/crtn.s libgloss/xstormy16/eva_app.c libgloss/xstormy16/eva_app.ld libgloss/xstormy16/eva_stub.ld libgloss/xstormy16/fstat.c libgloss/xstormy16/getpid.c libgloss/xstormy16/isatty.c libgloss/xstormy16/kill.c libgloss/xstormy16/lseek.c libgloss/xstormy16/open.c libgloss/xstormy16/sim_high.ld libgloss/xstormy16/sim_malloc_start.s libgloss/xstormy16/sim_rom.ld libgloss/xstormy16/stat.c libgloss/xstormy16/syscalls.S libgloss/xstormy16/syscalls.m4 libgloss/xstormy16/unlink.c libgloss/xstormy16/xstormy16_stub.c ltgcc.m4 newlib/libc/machine/aarch64/Makefile.am newlib/libc/machine/aarch64/Makefile.in newlib/libc/machine/aarch64/aclocal.m4 newlib/libc/machine/aarch64/configure newlib/libc/machine/aarch64/configure.in newlib/libc/machine/aarch64/machine/_types.h newlib/libc/machine/aarch64/memcmp-stub.c newlib/libc/machine/aarch64/memcmp.S newlib/libc/machine/aarch64/memcpy-stub.c newlib/libc/machine/aarch64/memcpy.S newlib/libc/machine/aarch64/memmove-stub.c newlib/libc/machine/aarch64/memmove.S newlib/libc/machine/aarch64/memset-stub.c newlib/libc/machine/aarch64/memset.S newlib/libc/machine/aarch64/setjmp.S newlib/libc/machine/aarch64/strcmp-stub.c newlib/libc/machine/aarch64/strcmp.S newlib/libc/machine/aarch64/strlen-stub.c newlib/libc/machine/aarch64/strlen.S newlib/libc/machine/aarch64/strncmp-stub.c newlib/libc/machine/aarch64/strncmp.S newlib/libc/machine/aarch64/strnlen-stub.c newlib/libc/machine/aarch64/strnlen.S newlib/libc/machine/epiphany/Makefile.am newlib/libc/machine/epiphany/Makefile.in newlib/libc/machine/epiphany/aclocal.m4 newlib/libc/machine/epiphany/configure newlib/libc/machine/epiphany/configure.in newlib/libc/machine/epiphany/machine/stdlib.h newlib/libc/machine/epiphany/setjmp.S newlib/libc/machine/msp430/Makefile.am newlib/libc/machine/msp430/Makefile.in newlib/libc/machine/msp430/aclocal.m4 newlib/libc/machine/msp430/configure newlib/libc/machine/msp430/configure.in newlib/libc/machine/msp430/setjmp.S newlib/libc/machine/nds32/Makefile.am newlib/libc/machine/nds32/Makefile.in newlib/libc/machine/nds32/abort.c newlib/libc/machine/nds32/aclocal.m4 newlib/libc/machine/nds32/configure newlib/libc/machine/nds32/configure.in newlib/libc/machine/nds32/memcpy.S newlib/libc/machine/nds32/memset.S newlib/libc/machine/nds32/setjmp.S newlib/libc/machine/nds32/strcmp.S newlib/libc/machine/nds32/strcpy.S newlib/libc/machine/nios2/Makefile.am newlib/libc/machine/nios2/Makefile.in newlib/libc/machine/nios2/aclocal.m4 newlib/libc/machine/nios2/configure newlib/libc/machine/nios2/configure.in newlib/libc/machine/nios2/setjmp.s newlib/libc/sys/epiphany/Makefile.am newlib/libc/sys/epiphany/Makefile.in newlib/libc/sys/epiphany/aclocal.m4 newlib/libc/sys/epiphany/configure newlib/libc/sys/epiphany/configure.in newlib/libc/sys/epiphany/e_printf.c newlib/libm/machine/aarch64/Makefile.am newlib/libm/machine/aarch64/Makefile.in newlib/libm/machine/aarch64/aclocal.m4 newlib/libm/machine/aarch64/configure newlib/libm/machine/aarch64/configure.in newlib/libm/machine/aarch64/s_ceil.c newlib/libm/machine/aarch64/s_floor.c newlib/libm/machine/aarch64/s_fma.c newlib/libm/machine/aarch64/s_fmax.c newlib/libm/machine/aarch64/s_fmin.c newlib/libm/machine/aarch64/s_llrint.c newlib/libm/machine/aarch64/s_llround.c newlib/libm/machine/aarch64/s_lrint.c newlib/libm/machine/aarch64/s_lround.c newlib/libm/machine/aarch64/s_nearbyint.c newlib/libm/machine/aarch64/s_rint.c newlib/libm/machine/aarch64/s_round.c newlib/libm/machine/aarch64/s_trunc.c newlib/libm/machine/aarch64/sf_ceil.c newlib/libm/machine/aarch64/sf_floor.c newlib/libm/machine/aarch64/sf_fma.c newlib/libm/machine/aarch64/sf_fmax.c newlib/libm/machine/aarch64/sf_fmin.c newlib/libm/machine/aarch64/sf_llrint.c newlib/libm/machine/aarch64/sf_llround.c newlib/libm/machine/aarch64/sf_lrint.c newlib/libm/machine/aarch64/sf_lround.c newlib/libm/machine/aarch64/sf_nearbyint.c newlib/libm/machine/aarch64/sf_rint.c newlib/libm/machine/aarch64/sf_round.c newlib/libm/machine/aarch64/sf_trunc.c newlib/libm/machine/arm/Makefile.am newlib/libm/machine/arm/Makefile.in newlib/libm/machine/arm/aclocal.m4 newlib/libm/machine/arm/configure newlib/libm/machine/arm/configure.in newlib/libm/machine/arm/s_ceil.c newlib/libm/machine/arm/s_floor.c newlib/libm/machine/arm/s_nearbyint.c newlib/libm/machine/arm/s_rint.c newlib/libm/machine/arm/s_round.c newlib/libm/machine/arm/s_trunc.c newlib/libm/machine/arm/sf_ceil.c newlib/libm/machine/arm/sf_floor.c newlib/libm/machine/arm/sf_nearbyint.c newlib/libm/machine/arm/sf_rint.c newlib/libm/machine/arm/sf_round.c newlib/libm/machine/arm/sf_trunc.c texinfo/texinfo.tex
Diffstat (limited to 'libgloss/arm/cpu-init/rdimon-aem.S')
-rw-r--r--libgloss/arm/cpu-init/rdimon-aem.S530
1 files changed, 0 insertions, 530 deletions
diff --git a/libgloss/arm/cpu-init/rdimon-aem.S b/libgloss/arm/cpu-init/rdimon-aem.S
deleted file mode 100644
index 19814c6df..000000000
--- a/libgloss/arm/cpu-init/rdimon-aem.S
+++ /dev/null
@@ -1,530 +0,0 @@
-/* Copyright (c) 2005-2013 ARM Ltd. All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions
- are met:
- 1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- 3. The name of the company may not be used to endorse or promote
- products derived from this software without specific prior written
- permission.
-
- THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
-
-/* This file gives a basic initialisation of a Cortex-A series core. It is
- the bare minimum required to get Cortex-A core running with a semihosting
- interface.
-
- It sets up a basic 1:1 phsyical address to virtual address mapping;
- turns the MMU on; enables branch prediction; activates any integrated
- caches; enables the Advanced SIMD and VFP co-processors; and installs
- basic exception handlers.
-
- It does not handle peripherals, and assumes all memory is Normal.
-
- It does not change processor state from the startup privilege and security
- level.
-
- This has only been tested to work in ARM state.
-
- By default it assumes exception vectors are located from address 0.
- However, if this is not true they can be moved by defining the
- _rdimon_vector_base symbol. For example if you have HIVECS enabled you
- may pass --defsym _rdimon_vector_base=0xffff0000 on the linker command
- line. */
-
- /* __ARM_ARCH_PROFILE is defined from GCC 4.8 onwards, however __ARM_ARCH_7A
- has been defined since 4.2 onwards, which is when v7-a support was added
- and hence 'A' profile support was added in the compiler. Allow for this
- file to be built with older compilers. */
-#if defined(__ARM_ARCH_7A__) || (__ARM_ARCH_PROFILE == 'A')
- .syntax unified
- .arch armv7-a
- .arm
-
- @ CPU Initialisation
- .globl _rdimon_hw_init_hook
- .type _rdimon_hw_init_hook, %function
-
-_rdimon_hw_init_hook:
- @ Only run the code on CPU 0 - otherwise spin
- mrc 15, 0, r4, cr0, cr0, 5 @ Read MPIDR
- ands r4, r4, #15
-spin:
- bne spin
-
- mov r10, lr @ Save LR for final return
-
-#ifdef __ARMEB__
- @ Setup for Big Endian
- setend be
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- orr r4, r4, #(1<<25) @ Switch to Big Endian (Set SCTLR.EE)
- mcr 15, 0, r4, cr1, cr0, 0 @ Write SCTLR
-#else
- @ Setup for Little Endian
- setend le
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- bic r4, r4, #(1<<25) @ Switch to LE (unset SCTLR.EE)
- mcr 15, 0, r4, cr1, cr0, 0 @ Write SCTLR
-#endif
-
- bl is_a15_a7
-
- @ For Cortex-A15 and Cortex-A7 only:
- @ Write zero into the ACTLR to turn everything on.
- itt eq
- moveq r4, #0
- mcreq 15, 0, r4, c1, c0, 1
- isb
-
- @ For Cortex-A15 and Cortex-A7 only:
- @ Set ACTLR:SMP bit before enabling the caches and MMU,
- @ or performing any cache and TLB maintenance operations.
- ittt eq
- mrceq 15, 0, r4, c1, c0, 1 @ Read ACTLR
- orreq r4, r4, #(1<<6) @ Enable ACTLR:SMP
- mcreq 15, 0, r4, c1, c0, 1 @ Write ACTLR
- isb
-
- @ Setup for exceptions being taken to Thumb/ARM state
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
-#if defined(__thumb__)
- orr r4, r4, #(1 << 30) @ Enable SCTLR.TE
-#else
- bic r4, r4, #(1 << 30) @ Disable SCTLR.TE
-#endif
- mcr 15, 0, r4, cr1, cr0, 0 @ Write SCTLR
-
- bl __reset_caches
-
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- orr r4, r4, #(1<<22) @ Enable unaligned mode
- bic r4, r4, #2 @ Disable alignment faults
- bic r4, r4, #1 @ Disable MMU
- mcr 15, 0, r4, cr1, cr0, 0 @ Write SCTLR
-
- mov r4, #0
- mcr 15, 0, r4, cr8, cr7, 0 @ Write TLBIALL - Invaliidate unified
- @ TLB
- @ Setup MMU Primary table P=V mapping.
- mvn r4, #0
- mcr 15, 0, r4, cr3, cr0, 0 @ Write DACR
-
- mov r4, #0 @ Always use TTBR0, no LPAE
- mcr 15, 0, r4, cr2, cr0, 2 @ Write TTBCR
- adr r4, page_table_addr @ Load the base for vectors
- ldr r4, [r4]
- add r4, r4, #1 @ Page tables inner cacheable
-
- mcr 15, 0, r4, cr2, cr0, 0 @ Write TTBR0
-
- mov r0, #34 @ 0x22 @ TR0 and TR1 - normal memory
- orr r0, r0, #(1 << 19) @ Shareable
- mcr 15, 0, r0, cr10, cr2, 0 @ Write PRRR
- movw r0, #0x33
- movt r0, #0x33
- mcr 15, 0, r0, cr10, cr2, 1 @ Write NMRR
- mrc 15, 0, r0, cr1, cr0, 0 @ Read SCTLR
- bic r0, r0, #(1 << 28) @ Clear TRE bit
- mcr 15, 0, r0, cr1, cr0, 0 @ Write SCTLR
-
- @ Now install the vector code - we move the Vector code from where it is
- @ in the image to be based at _rdimon_vector_base. We have to do this copy
- @ as the code is all PC-relative. We actually cheat and do a BX <reg> so
- @ that we are at a known address relatively quickly and have to move as
- @ little code as possible.
- mov r7, #(VectorCode_Limit - VectorCode)
- adr r5, VectorCode
- adr r6, vector_base_addr @ Load the base for vectors
- ldr r6, [r6]
-
-copy_loop: @ Do the copy
- ldr r4, [r5], #4
- str r4, [r6], #4
- subs r7, r7, #4
- bne copy_loop
-
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- bic r4, r4, #0x1000 @ Disable I Cache
- bic r4, r4, #4 @ Disable D Cache
- orr r4, r4, #1 @ Enable MMU
- bic r4, r4, #(1 << 28) @ Clear TRE bit
- mcr 15, 0, r4, cr1, cr0, 0 @ Write SCTLR
- mrc 15, 0, r4, cr1, cr0, 2 @ Read CPACR
- orr r4, r4, #0x00f00000 @ Turn on VFP Co-procs
- bic r4, r4, #0x80000000 @ Clear ASEDIS bit
- mcr 15, 0, r4, cr1, cr0, 2 @ Write CPACR
- isb
- mov r4, #0
- mcr 15, 0, r4, cr7, cr5, 4 @ Flush prefetch buffer
- mrc 15, 0, r4, cr1, cr0, 2 @ Read CPACR
- ubfx r4, r4, #20, #4 @ Extract bits [20, 23)
- cmp r4, #0xf @ If not all set then the CPU does not
- itt eq @ have FP or Advanced SIMD.
- moveq r4, #0x40000000 @ Enable FP and Advanced SIMD
- mcreq 10, 7, r4, cr8, cr0, 0 @ vmsr fpexc, r4
-skip_vfp_enable:
- bl __enable_caches @ Turn caches on
- bx r10 @ Return to CRT startup routine
-
- @ This enable us to be more precise about which caches we want
-init_cpu_client_enable_dcache:
-init_cpu_client_enable_icache:
- mov r0, #1
- bx lr
-
-vector_base_addr:
- .word _rdimon_vector_base
- .weak _rdimon_vector_base
-page_table_addr:
- .word page_tables
-
- @ Vector code - must be PIC and in ARM state.
-VectorCode:
- b vector_reset
- b vector_undef
- b vector_swi
- b vector_prefetch
- b vector_dataabt
- b vector_reserved
- b vector_irq
- b vector_fiq
-
-vector_reset:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #0
- b vector_common
-vector_undef:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #1
- b vector_common
-vector_swi:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #2
- b vector_common
-vector_prefetch:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #3
- b vector_common
-vector_dataabt:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #4
- b vector_common
-vector_reserved:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #5
- b vector_common
-vector_irq:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #6
- b vector_common
-vector_fiq:
- adr sp, vector_sp_base
- push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- mov r4, #7
- b vector_common
-vector_common:
- adr r1, vector_common_adr @ Find where we're going to
- ldr r1, [r1]
- bx r1 @ And branch there
-vector_common_adr:
- .word vector_common_2 @ Common handling code
-
- @ Vector stack
- .p2align 3 @ Align to 8 byte boundary boundary to
- @ keep ABI compatibility
- .fill 32, 4, 0 @ 32-entry stack is enough for vector
- @ handlers.
-vector_sp_base:
-VectorCode_Limit:
- @ End of PIC code for vectors
-
- @ Common Handling of vectors
- .type vector_common_2, %function
-vector_common_2:
- mrs r1, APSR
- mrs r2, SPSR
- push {r1, r2} @ Save PSRs
-
- @ Output the vector we have caught
- bl out_nl
- adr r0, which_vector
- bl out_string
- adr r0, vector_names
- mov r1, #11
- mla r0, r4, r1, r0
- bl out_string
- bl out_nl
-
- @ Dump the registers
- adrl r6, register_names
- mov r7, #0
-dump_r_loop:
- mov r0, r6
- bl out_string
- add r6, r6, #6
- ldr r0, [sp, r7, lsl #2]
- bl out_word
- bl out_nl
- add r7, r7, #1
- cmp r7, #16
- blt dump_r_loop
- adr r0, end
- bl out_string
-
- @ And exit
- mov r0, #24
- orr r1, r4, #0x20000
- svc 0x00123456
-
- @ Output the string in r0
-out_string:
- push {lr}
- mov r1, r0
- mov r0, #4
- svc 0x00123456
- pop {pc}
-
- @ Output a New-line
-out_nl:
- mov r0, #10
- @ Fallthrough
-
- @ Output the character in r0
-out_char:
- push {lr}
- strb r0, [sp, #-4]!
- mov r0, #3
- mov r1, sp
- svc 0x00123456
- add sp, sp, #4
- pop {pc}
-
- @ Output the value of r0 as a hex-word
-out_word:
- push {r4, r5, r6, lr}
- mov r4, r0
- mov r5, #28
- adr r6, hexchars
-word_loop:
- lsr r0, r4, r5
- and r0, r0, #15
- ldrb r0, [r6, r0]
- bl out_char
- subs r5, r5, #4
- bpl word_loop
- pop {r4, r5, r6, pc}
-
-hexchars:
- .ascii "0123456789abcdef"
-
-which_vector:
- .asciz "Hit vector:"
-end:
- .asciz "End.\n"
-
-vector_names:
- .asciz "reset "
- .asciz "undef "
- .asciz "swi "
- .asciz "prefetch "
- .asciz "data abort"
- .asciz "reserved "
- .asciz "irq "
- .asciz "fiq "
-
-register_names:
- .asciz "apsr "
- .asciz "spsr "
- .asciz "r0 "
- .asciz "r1 "
- .asciz "r2 "
- .asciz "r3 "
- .asciz "r4 "
- .asciz "r5 "
- .asciz "r6 "
- .asciz "r7 "
- .asciz "r8 "
- .asciz "r9 "
- .asciz "r10 "
- .asciz "r11 "
- .asciz "r12 "
- .asciz "r14 "
-
- .p2align 3
-
-
- @ Enable the caches
-__enable_caches:
- mov r0, #0
- mcr 15, 0, r0, cr8, cr7, 0 @ Invalidate all unified-TLB
- mov r0, #0
- mcr 15, 0, r0, cr7, cr5, 6 @ Invalidate branch predictor
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- orr r4, r4, #0x800 @ Enable branch predictor
- mcr 15, 0, r4, cr1, cr0, 0 @ Set SCTLR
- mov r5, lr @ Save LR as we're going to BL
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- bl init_cpu_client_enable_icache
- cmp r0, #0
- it ne
- orrne r4, r4, #0x1000 @ Enable I-Cache
- bl init_cpu_client_enable_dcache
- cmp r0, #0
- it ne
- orrne r4, r4, #4
- mcr 15, 0, r4, cr1, cr0, 0 @ Enable D-Cache
- bx r5 @ Return
-
-__reset_caches:
- mov ip, lr @ Save LR
- mov r0, #0
- mcr 15, 0, r0, cr7, cr5, 6 @ Invalidate branch predictor
- mrc 15, 0, r6, cr1, cr0, 0 @ Read SCTLR
- mrc 15, 0, r0, cr1, cr0, 0 @ Read SCTLR!
- bic r0, r0, #0x1000 @ Disable I cache
- mcr 15, 0, r0, cr1, cr0, 0 @ Write SCTLR
- mrc 15, 1, r0, cr0, cr0, 1 @ Read CLIDR
- tst r0, #3 @ Harvard Cache?
- mov r0, #0
- it ne
- mcrne 15, 0, r0, cr7, cr5, 0 @ Invalidate Instruction Cache?
-
- mrc 15, 0, r1, cr1, cr0, 0 @ Read SCTLR (again!)
- orr r1, r1, #0x800 @ Enable branch predictor
-
- @ If we're not enabling caches we have
- @ no more work to do.
- bl init_cpu_client_enable_icache
- cmp r0, #0
- it ne
- orrne r1, r1, #0x1000 @ Enable I-Cache now -
- @ We actually only do this if we have a
- @ Harvard style cache.
- it eq
- bleq init_cpu_client_enable_dcache
- itt eq
- cmpeq r0, #0
- beq Finished1
-
- mcr 15, 0, r1, cr1, cr0, 0 @ Write SCTLR (turn on Branch predictor & I-cache)
-
- mrc 15, 1, r0, cr0, cr0, 1 @ Read CLIDR
- ands r3, r0, #0x7000000
- lsr r3, r3, #23 @ Total cache levels << 1
- beq Finished1
-
- mov lr, #0 @ lr = cache level << 1
-Loop11:
- mrc 15, 1, r0, cr0, cr0, 1 @ Read CLIDR
- add r2, lr, lr, lsr #1 @ r2 holds cache 'set' position
- lsr r1, r0, r2 @ Bottom 3-bits are Ctype for this level
- and r1, r1, #7 @ Get those 3-bits alone
- cmp r1, #2
- blt Skip1 @ No cache or only I-Cache at this level
- mcr 15, 2, lr, cr0, cr0, 0 @ Write CSSELR
- mov r1, #0
- isb sy
- mrc 15, 1, r1, cr0, cr0, 0 @ Read CCSIDR
- and r2, r1, #7 @ Extract line length field
- add r2, r2, #4 @ Add 4 for the line length offset (log2 16 bytes)
- movw r0, #0x3ff
- ands r0, r0, r1, lsr #3 @ r0 is the max number on the way size
- clz r4, r0 @ r4 is the bit position of the way size increment
- movw r5, #0x7fff
- ands r5, r5, r1, lsr #13 @ r5 is the max number of the index size (right aligned)
-Loop21:
- mov r7, r0 @ r7 working copy of max way size
-Loop31:
- orr r1, lr, r7, lsl r4 @ factor in way number and cache number
- orr r1, r1, r5, lsl r2 @ factor in set number
- tst r6, #4 @ D-Cache on?
- ite eq
- mcreq 15, 0, r1, cr7, cr6, 2 @ No - invalidate by set/way
- mcrne 15, 0, r1, cr7, cr14, 2 @ yes - clean + invalidate by set/way
- subs r7, r7, #1 @ Decrement way number
- bge Loop31
- subs r5, r5, #1 @ Decrement set number
- bge Loop21
-Skip1:
- add lr, lr, #2 @ increment cache number
- cmp r3, lr
- bgt Loop11
-Finished1:
- @ Now we know the caches are clean we can:
- mrc 15, 0, r4, cr1, cr0, 0 @ Read SCTLR
- bic r4, r4, #4 @ Disable D-Cache
- mcr 15, 0, r4, cr1, cr0, 0 @ Write SCTLR
- mov r4, #0
- mcr 15, 0, r4, cr7, cr5, 6 @ Write BPIALL
-
- bx ip @ Return
-
- @ Set Z if this is a Cortex-A15 or Cortex_A7
- @ Other flags corrupted
-is_a15_a7:
- mrc 15, 0, r8, c0, c0, 0
- movw r9, #0xfff0
- movt r9, #0xff0f
- and r8, r8, r9
- movw r9, #0xc0f0
- movt r9, #0x410f
- cmp r8, r9
- movw r9, #0xc070
- movt r9, #0x410f
- it ne
- cmpne r8, r9
- bx lr
-
- @ Descriptor type: Section
- @ Bufferable: True
- @ Cacheable: True
- @ Execute Never: False
- @ Domain: 0
- @ Impl. Defined: 0
- @ Access: 0/11 Full access
- @ TEX: 001
- @ Shareable: False
- @ Not Global: False
- @ Supersection: False
-#define PT(X) \
- .word X;
-#define PT2(X) \
- PT(X) PT(X + 0x100000) PT(X + 0x200000) PT(X + 0x300000)
-#define PT3(X) \
- PT2(X) PT2(X + 0x400000) PT2(X + 0x800000) PT2(X + 0xc00000)
-#define PT4(X) \
- PT3(X) PT3(X + 0x1000000) PT3(X + 0x2000000) PT3(X + 0x3000000)
-#define PT5(X) \
- PT4(X) PT4(X + 0x4000000) PT4(X + 0x8000000) PT4(X + 0xc000000)
-#define PT6(X) \
- PT5(X) PT5(X + 0x10000000) PT5(X + 0x20000000) PT5(X + 0x30000000)
-#define PT7(X) \
- PT6(X) PT6(X + 0x40000000) PT6(X + 0x80000000) PT6(X + 0xc0000000)
-
- .section page_tables_section, "aw", %progbits
- .p2align 14
-page_tables:
- PT7(0x1c0e)
-
-#endif //#if defined(__ARM_ARCH_7A__) || __ARM_ARCH_PROFILE == 'A'
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