diff options
| author | Giovanni Bajo <rasky@develer.com> | 2022-12-17 17:47:23 +0300 |
|---|---|---|
| committer | Corinna Vinschen <corinna@vinschen.de> | 2022-12-19 12:38:05 +0300 |
| commit | 9bba9c2bdd22b2011f1fa6da36e6bc6a70af42ec (patch) | |
| tree | 246c6d79540294b8914fd087f86f7fd689da575b /newlib | |
| parent | c8130c3fe8c7c662a94cd720bf62883bd628850f (diff) | |
Fix a bug in setjmp for MIPS o32/o64 FPXX/FP64
It seems there is a swapped logic in one of the subcases of
setjmp.S for MIPS: when the FPU registers are 64-bit within
a 32-bit aligned jmp_buf, the code realigns the pointers
before doing 64-bit writes, but the branch logic is swapped:
we must avoid the address adjustement when bit 2 is zero
(that is, the address is already 8-byte aligned).
This always triggers an address error when run, as tested
on a MIPS VR4300 with O64 ABI.
Diffstat (limited to 'newlib')
| -rw-r--r-- | newlib/libc/machine/mips/setjmp.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/newlib/libc/machine/mips/setjmp.S b/newlib/libc/machine/mips/setjmp.S index 9a8b31d09..cfc1d517a 100644 --- a/newlib/libc/machine/mips/setjmp.S +++ b/newlib/libc/machine/mips/setjmp.S @@ -68,7 +68,7 @@ #define FPR_LAYOUT \ and $8, $4, 4; \ - bne $8, $0, 1f; \ + beq $8, $0, 1f; \ GPR_OFFSET ($31, 22); \ addiu $4, $4, -4; \ 1: \ |