diff options
Diffstat (limited to 'include/elf')
| -rw-r--r-- | include/elf/ChangeLog | 55 | ||||
| -rw-r--r-- | include/elf/aarch64.h | 140 | ||||
| -rw-r--r-- | include/elf/common.h | 5 | ||||
| -rw-r--r-- | include/elf/ia64.h | 4 | ||||
| -rw-r--r-- | include/elf/mips.h | 21 | ||||
| -rw-r--r-- | include/elf/msp430.h | 47 | ||||
| -rw-r--r-- | include/elf/s390.h | 4 |
7 files changed, 254 insertions, 22 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index c72659207..2edd1dfcc 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,58 @@ +2013-07-08 Tristan Gingold <gingold@adacore.com> + + * ia64.h (STB_VMS_WEAK, STB_VMS_SYSTEM): Add. + +2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * s390.h: Add new relocs R_390_PC12DBL, R_390_PLT12DBL, + R_390_PC24DBL, and R_390_PLT24DBL. + +2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> + + * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. + +2013-06-24 Maciej W. Rozycki <macro@codesourcery.com> + + * mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting. + (ELF_ST_SET_MIPS_PLT): Likewise. + +2013-06-19 Will Newton <will.newton@linaro.org> + + * aarch64.h: Remove R_AARCH64_IRELATIVE. + +2013-06-07 Will Newton <will.newton@linaro.org> + + * aarch64.h: Add R_AARCH64_IRELATIVE reloc. + +2013-06-06 Maciej W. Rozycki <macro@codesourcery.com> + + * mips.h (ELF_ST_SET_MIPS_PIC): Clear any STO_MIPS16 setting. + +2013-05-30 Paul Brook <paul@codesourcery.com> + + * mips.h (R_MIPS_EH): New. + +2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com> + + * aarch64.h (R_AARCH64_TLSDESC_LD64_PREL19): Rename to ... + (R_AARCH64_TLSDESC_LD_PREL19): ... this. + (R_AARCH64_TLSDESC_ADR_PAGE): Rename to ... + (R_AARCH64_TLSDESC_ADR_PAGE21): ... this. + +2013-05-22 H.J. Lu <hongjiu.lu@intel.com> + + * common.h (EM_INTEL205): New. + (EM_INTEL206): Likewise. + (EM_INTEL207): Likewise. + (EM_INTEL208): Likewise. + (EM_INTEL209): Likewise. + +2013-05-02 Nick Clifton <nickc@redhat.com> + + * msp430.h: Add MSP430X relocs. + Add some more MSP430 machine numbers. + Add values used by .MSP430.attributes section. + 2013-03-21 Michael Schewe <michael.schewe@gmx.net> * h8.h: Add new reloc R_H8_DISP32A16 for relaxation of diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h index e3af4442a..41016038f 100644 --- a/include/elf/aarch64.h +++ b/include/elf/aarch64.h @@ -43,7 +43,126 @@ START_RELOC_NUMBERS (elf_aarch64_reloc_type) /* Null relocations. */ RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */ -FAKE_RELOC (R_AARCH64_static_min, 256) +/* Basic data relocations. */ + +/* .word: (S+A) */ +RELOC_NUMBER (R_AARCH64_P32_ABS32, 1) + +/* .half: (S+A) */ +RELOC_NUMBER (R_AARCH64_P32_ABS16, 2) + +/* .word: (S+A-P) */ +RELOC_NUMBER (R_AARCH64_P32_PREL32, 3) + +/* .half: (S+A-P) */ +RELOC_NUMBER (R_AARCH64_P32_PREL16, 4) + +/* Group relocations to create a 16, 32, 48 or 64 bit + unsigned data or abs address inline. */ + +/* MOV[ZK]: ((S+A) >> 0) & 0xffff */ +RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5) + +/* MOV[ZK]: ((S+A) >> 0) & 0xffff */ +RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6) + +/* MOV[ZK]: ((S+A) >> 16) & 0xffff */ +RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7) + +/* Group relocations to create high part of a 16, 32, 48 or 64 bit + signed data or abs address inline. Will change instruction + to MOVN or MOVZ depending on sign of calculated value. */ + +/* MOV[ZN]: ((S+A) >> 0) & 0xffff */ +RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8) + +/* Relocations to generate 19, 21 and 33 bit PC-relative load/store + addresses: PG(x) is (x & ~0xfff). */ + +/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */ +RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9) + +/* ADR: (S+A-P) & 0x1fffff */ +RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10) + +/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ +RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11) + +/* ADD: (S+A) & 0xfff */ +RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12) + +/* LD/ST8: (S+A) & 0xfff */ +RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13) + +/* LD/ST16: (S+A) & 0xffe */ +RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14) + +/* LD/ST32: (S+A) & 0xffc */ +RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15) + +/* LD/ST64: (S+A) & 0xff8 */ +RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16) + +/* LD/ST128: (S+A) & 0xff0 */ +RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17) + +/* Relocations for control-flow instructions. */ + +/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */ +RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18) + +/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */ +RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19) + +/* B: ((S+A-P) >> 2) & 0x3ffffff. */ +RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20) + +/* BL: ((S+A-P) >> 2) & 0x3ffffff. */ +RELOC_NUMBER (R_AARCH64_P32_CALL26, 21) + + +RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25) +RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26) +RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27) + + +RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81) +RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82) +RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103) +RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104) +RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105) +RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106) +RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107) +RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108) +RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109) +RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110) +RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111) + +RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122) +RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123) +RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124) +RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125) +RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126) +RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127) + +/* Dynamic relocations */ + +/* Copy symbol at runtime. */ +RELOC_NUMBER (R_AARCH64_P32_COPY, 180) + +/* Create GOT entry. */ +RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181) + + /* Create PLT entry. */ +RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182) + +/* Adjust by program base. */ +RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183) +RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184) +RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185) +RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186) +RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187) +RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188) RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */ @@ -157,9 +276,6 @@ RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309) RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311) RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312) -FAKE_RELOC (R_AARCH64_static_max, 313) - -FAKE_RELOC (R_AARCH64_tls_min, 512) RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513) RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514) RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539) @@ -175,12 +291,10 @@ RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548) RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549) RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550) RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551) -FAKE_RELOC (R_AARCH64_tls_max, 552) -FAKE_RELOC (R_AARCH64_tlsdesc_min, 560) -RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_PREL19, 560) +RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560) RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561) -RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE, 562) +RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562) RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12_NC, 563) RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12_NC, 564) RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565) @@ -188,10 +302,8 @@ RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566) RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567) RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568) RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569) -FAKE_RELOC (R_AARCH64_tlsdesc_max, 570) /* Dynamic relocations */ -FAKE_RELOC (R_AARCH64_dyn_min, 1024) /* Copy symbol at runtime. */ RELOC_NUMBER (R_AARCH64_COPY, 1024) @@ -204,11 +316,11 @@ RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026) /* Adjust by program base. */ RELOC_NUMBER (R_AARCH64_RELATIVE, 1027) -RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028) -RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029) -RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030) +RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028) +RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029) +RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030) RELOC_NUMBER (R_AARCH64_TLSDESC, 1031) -FAKE_RELOC (R_AARCH64_dyn_max, 1032) +RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032) END_RELOC_NUMBERS (R_AARCH64_end) diff --git a/include/elf/common.h b/include/elf/common.h index 8bdefa60b..cd3bcdd2b 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -296,6 +296,11 @@ #define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */ #define EM_RL78 197 /* Renesas RL78 family. */ #define EM_78K0R 199 /* Renesas 78K0R. */ +#define EM_INTEL205 205 /* Reserved by Intel */ +#define EM_INTEL206 206 /* Reserved by Intel */ +#define EM_INTEL207 207 /* Reserved by Intel */ +#define EM_INTEL208 208 /* Reserved by Intel */ +#define EM_INTEL209 209 /* Reserved by Intel */ /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision diff --git a/include/elf/ia64.h b/include/elf/ia64.h index d8f6f5015..7f2453d0e 100644 --- a/include/elf/ia64.h +++ b/include/elf/ia64.h @@ -209,6 +209,10 @@ # define VMS_STL_STD 2 /* Standard linkage with return value. */ # define VMS_STL_LNK 3 /* Explicit represented in .vms_linkages. */ +/* OpenVMS specific symbol binding values. */ +#define STB_VMS_WEAK 11 /* VMS weak symbol. */ +#define STB_VMS_SYSTEM 12 /* System symbol. */ + /* OpenVMS specific fixup and relocation structures. */ typedef struct diff --git a/include/elf/mips.h b/include/elf/mips.h index ca9fdcd78..f3be987a0 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -152,10 +152,10 @@ START_RELOC_NUMBERS (elf_mips_reloc_type) FAKE_RELOC (R_MICROMIPS_max, 174) /* This was a GNU extension used by embedded-PIC. It was co-opted by - mips-linux for exception-handling data. It is no longer used, but - should continue to be supported by the linker for backward - compatibility. (GCC stopped using it in May, 2004.) */ + mips-linux for exception-handling data. GCC stopped using it in + May, 2004, then started using it again for compact unwind tables. */ RELOC_NUMBER (R_MIPS_PC32, 248) + RELOC_NUMBER (R_MIPS_EH, 249) /* FIXME: this relocation is used internally by gas. */ RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250) /* These are GNU extensions to enable C++ vtable garbage collection. */ @@ -803,15 +803,24 @@ extern void bfd_mips_elf32_swap_reginfo_out PLT entries and traditional MIPS lazy binding stubs. We mark the former with STO_MIPS_PLT to distinguish them from the latter. */ #define STO_MIPS_PLT 0x8 -#define ELF_ST_IS_MIPS_PLT(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PLT) -#define ELF_ST_SET_MIPS_PLT(other) (((other) & ~STO_MIPS_FLAGS) | STO_MIPS_PLT) +#define ELF_ST_IS_MIPS_PLT(other) \ + ((ELF_ST_IS_MIPS16 (other) \ + ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \ + : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT) +#define ELF_ST_SET_MIPS_PLT(other) \ + ((ELF_ST_IS_MIPS16 (other) \ + ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \ + : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT) /* This value is used to mark PIC functions in an object that mixes PIC and non-PIC. Note that this bit overlaps with STO_MIPS16, although MIPS16 symbols are never considered to be MIPS_PIC. */ #define STO_MIPS_PIC 0x20 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC) -#define ELF_ST_SET_MIPS_PIC(other) (((other) & ~STO_MIPS_FLAGS) | STO_MIPS_PIC) +#define ELF_ST_SET_MIPS_PIC(other) \ + ((ELF_ST_IS_MIPS16 (other) \ + ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \ + : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC) /* This value is used for a mips16 .text symbol. */ #define STO_MIPS16 0xf0 diff --git a/include/elf/msp430.h b/include/elf/msp430.h index 44f5c51a7..ac8e28c31 100644 --- a/include/elf/msp430.h +++ b/include/elf/msp430.h @@ -1,5 +1,5 @@ /* MSP430 ELF support for BFD. - Copyright (C) 2002, 2003, 2004, 2010 Free Software Foundation, Inc. + Copyright (C) 2002-2013 Free Software Foundation, Inc. Contributed by Dmitry Diky <diwil@mail.ru> This file is part of BFD, the Binary File Descriptor library. @@ -33,6 +33,11 @@ #define E_MSP430_MACH_MSP430x14 14 #define E_MSP430_MACH_MSP430x15 15 #define E_MSP430_MACH_MSP430x16 16 +#define E_MSP430_MACH_MSP430x20 20 +#define E_MSP430_MACH_MSP430x22 22 +#define E_MSP430_MACH_MSP430x23 23 +#define E_MSP430_MACH_MSP430x24 24 +#define E_MSP430_MACH_MSP430x26 26 #define E_MSP430_MACH_MSP430x31 31 #define E_MSP430_MACH_MSP430x32 32 #define E_MSP430_MACH_MSP430x33 33 @@ -40,6 +45,19 @@ #define E_MSP430_MACH_MSP430x42 42 #define E_MSP430_MACH_MSP430x43 43 #define E_MSP430_MACH_MSP430x44 44 +#define E_MSP430_MACH_MSP430X 45 +#define E_MSP430_MACH_MSP430x46 46 +#define E_MSP430_MACH_MSP430x47 47 +#define E_MSP430_MACH_MSP430x54 54 + +#define SHT_MSP430_ATTRIBUTES 0x70000003 /* Section holds ABI attributes. */ +#define SHT_MSP430_SEC_FLAGS 0x7f000005 /* Holds TI compiler's section flags. */ +#define SHT_MSP430_SYM_ALIASES 0x7f000006 /* Holds TI compiler's symbol aliases. */ + +/* Tag values for an attribute section. */ +#define OFBA_MSPABI_Tag_ISA 4 +#define OFBA_MSPABI_Tag_Code_Model 6 +#define OFBA_MSPABI_Tag_Data_Model 8 /* Relocations. */ START_RELOC_NUMBERS (elf_msp430_reloc_type) @@ -52,7 +70,32 @@ START_RELOC_NUMBERS (elf_msp430_reloc_type) RELOC_NUMBER (R_MSP430_16_PCREL_BYTE, 6) RELOC_NUMBER (R_MSP430_2X_PCREL, 7) RELOC_NUMBER (R_MSP430_RL_PCREL, 8) - + RELOC_NUMBER (R_MSP430_8, 9) + RELOC_NUMBER (R_MSP430_SYM_DIFF, 10) END_RELOC_NUMBERS (R_MSP430_max) +START_RELOC_NUMBERS (elf_msp430x_reloc_type) + RELOC_NUMBER (R_MSP430_ABS32, 1) /* aka R_MSP430_32 */ + RELOC_NUMBER (R_MSP430_ABS16, 2) /* aka R_MSP430_16 */ + RELOC_NUMBER (R_MSP430_ABS8, 3) + RELOC_NUMBER (R_MSP430_PCR16, 4) /* aka R_MSP430_16_PCREL */ + RELOC_NUMBER (R_MSP430X_PCR20_EXT_SRC, 5) + RELOC_NUMBER (R_MSP430X_PCR20_EXT_DST, 6) + RELOC_NUMBER (R_MSP430X_PCR20_EXT_ODST, 7) + RELOC_NUMBER (R_MSP430X_ABS20_EXT_SRC, 8) + RELOC_NUMBER (R_MSP430X_ABS20_EXT_DST, 9) + RELOC_NUMBER (R_MSP430X_ABS20_EXT_ODST, 10) + RELOC_NUMBER (R_MSP430X_ABS20_ADR_SRC, 11) + RELOC_NUMBER (R_MSP430X_ABS20_ADR_DST, 12) + RELOC_NUMBER (R_MSP430X_PCR16, 13) /* Like R_MSP430_PCR16 but with overflow checking. */ + RELOC_NUMBER (R_MSP430X_PCR20_CALL, 14) + RELOC_NUMBER (R_MSP430X_ABS16, 15) /* Like R_MSP430_ABS16 but with overflow checking. */ + RELOC_NUMBER (R_MSP430_ABS_HI16, 16) + RELOC_NUMBER (R_MSP430_PREL31, 17) + RELOC_NUMBER (R_MSP430_EHTYPE, 18) /* Mentioned in ABI. */ + RELOC_NUMBER (R_MSP430X_10_PCREL, 19) /* Red Hat invention. Used for Jump instructions. */ + RELOC_NUMBER (R_MSP430X_2X_PCREL, 20) /* Red Hat invention. Used for relaxing jumps. */ + RELOC_NUMBER (R_MSP430X_SYM_DIFF, 21) /* Red Hat invention. Used for relaxing debug info. */ +END_RELOC_NUMBERS (R_MSP430x_max) + #endif /* _ELF_MSP430_H */ diff --git a/include/elf/s390.h b/include/elf/s390.h index a5b4217bc..9128f8680 100644 --- a/include/elf/s390.h +++ b/include/elf/s390.h @@ -57,8 +57,12 @@ START_RELOC_NUMBERS (elf_s390_reloc_type) RELOC_NUMBER (R_390_GOTPC, 14) /* 32 bit PC relative offset to GOT. */ RELOC_NUMBER (R_390_GOT16, 15) /* 16 bit GOT offset. */ RELOC_NUMBER (R_390_PC16, 16) /* PC relative 16 bit. */ + RELOC_NUMBER (R_390_PC12DBL, 62) /* PC relative 12 bit shifted by 1. */ + RELOC_NUMBER (R_390_PLT12DBL, 63) /* 12 bit PC rel. PLT shifted by 1. */ RELOC_NUMBER (R_390_PC16DBL, 17) /* PC relative 16 bit shifted by 1. */ RELOC_NUMBER (R_390_PLT16DBL, 18) /* 16 bit PC rel. PLT shifted by 1. */ + RELOC_NUMBER (R_390_PC24DBL, 64) /* PC relative 24 bit shifted by 1. */ + RELOC_NUMBER (R_390_PLT24DBL, 65) /* 24 bit PC rel. PLT shifted by 1. */ RELOC_NUMBER (R_390_PC32DBL, 19) /* PC relative 32 bit shifted by 1. */ RELOC_NUMBER (R_390_PLT32DBL, 20) /* 32 bit PC rel. PLT shifted by 1. */ RELOC_NUMBER (R_390_GOTPCDBL, 21) /* 32 bit PC rel. GOT shifted by 1. */ |