diff options
| author | Michael Jones <michael_jones> | 2022-04-12 21:36:55 +0300 |
|---|---|---|
| committer | Michael Jones <michael_p_jones@apple.com> | 2022-04-12 21:43:47 +0300 |
| commit | 869a46df2980818644db4823fb1d29e9d525b645 (patch) | |
| tree | 9a049e1c41af9c4e3d830d12f157c453eed12b3e /intern/cycles/integrator | |
| parent | 2d472b70e5ae22ece199003f51742a72f485fd87 (diff) | |
Cycles fp consistency for Apple Silicon CPUs
Propagate the fp settings from the main thread to all the worker threads (the fp settings includes the FZ settings among other things) - this guarantees consistency in execution of floating point math regardless if its executed in tbb thread arena or on main thread
Add FZ mode to arm64/aarch64 in parallel to the way its been done on intel processors, currently compiling for arm target does not set this mode at all, hence potentially runs slower and with possible results mismatch with intel x86.
Reviewed By: brecht
Differential Revision: https://developer.blender.org/D14454
Diffstat (limited to 'intern/cycles/integrator')
| -rw-r--r-- | intern/cycles/integrator/path_trace.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/intern/cycles/integrator/path_trace.cpp b/intern/cycles/integrator/path_trace.cpp index ab134179602..f1e70b7f28f 100644 --- a/intern/cycles/integrator/path_trace.cpp +++ b/intern/cycles/integrator/path_trace.cpp @@ -355,6 +355,9 @@ void PathTrace::path_trace(RenderWork &render_work) const int num_works = path_trace_works_.size(); + tbb::task_group_context *tbb_ctx = tbb::task::self().group(); + tbb_ctx->capture_fp_settings(); + tbb::parallel_for(0, num_works, [&](int i) { const double work_start_time = time_dt(); const int num_samples = render_work.path_trace.num_samples; |