Unlimited number of textures for Cycles

This patch allows for an unlimited number of textures in Cycles where the hardware allows. It replaces a number static arrays with dynamic arrays and changes the way the flat_slot indices are calculated. Eventually, I'd like to get to a point where there are only flat slots left and textures off all kinds are stored in a single array.

Note that the arrays in DeviceScene are changed from containing device_vector<T> objects to device_vector<T>* pointers. Ideally, I'd like to store objects, but dynamic resizing of a std:vector in pre-C++11 calls the copy constructor, which for a good reason is not implemented for device_vector. Once we require C++11 for Cycles builds, we can implement a move constructor for device_vector and store objects again.

The limits for CUDA Fermi hardware still apply.

Reviewers: tod_baudais, InsigMathK, dingto, #cycles

Reviewed By: dingto, #cycles

Subscribers: dingto, smellslikedonkey

Differential Revision: https://developer.blender.org/D2650

1 files changed, 23 insertions, 55 deletions

diff --git a/intern/cycles/util/util_texture.h b/intern/cycles/util/util_texture.h
index aff928ea2ee..478f1f06818 100644
--- a/intern/cycles/util/util_texture.h
+++ b/intern/cycles/util/util_texture.h
@@ -21,62 +21,22 @@ CCL_NAMESPACE_BEGIN
 
 /* Texture limits on devices. */
 
-/* CPU */
-#define TEX_NUM_FLOAT4_CPU		1024
-#define TEX_NUM_BYTE4_CPU		1024
-#define TEX_NUM_HALF4_CPU		1024
-#define TEX_NUM_FLOAT_CPU		1024
-#define TEX_NUM_BYTE_CPU		1024
-#define TEX_NUM_HALF_CPU		1024
-#define TEX_START_FLOAT4_CPU	0
-#define TEX_START_BYTE4_CPU		TEX_NUM_FLOAT4_CPU
-#define TEX_START_HALF4_CPU		(TEX_NUM_FLOAT4_CPU + TEX_NUM_BYTE4_CPU)
-#define TEX_START_FLOAT_CPU		(TEX_NUM_FLOAT4_CPU + TEX_NUM_BYTE4_CPU + TEX_NUM_HALF4_CPU)
-#define TEX_START_BYTE_CPU		(TEX_NUM_FLOAT4_CPU + TEX_NUM_BYTE4_CPU + TEX_NUM_HALF4_CPU + TEX_NUM_FLOAT_CPU)
-#define TEX_START_HALF_CPU		(TEX_NUM_FLOAT4_CPU + TEX_NUM_BYTE4_CPU + TEX_NUM_HALF4_CPU + TEX_NUM_FLOAT_CPU + TEX_NUM_BYTE_CPU)
-
 /* CUDA (Geforce 4xx and 5xx) */
-#define TEX_NUM_FLOAT4_CUDA		5
-#define TEX_NUM_BYTE4_CUDA		85
-#define TEX_NUM_HALF4_CUDA		0
-#define TEX_NUM_FLOAT_CUDA		0
-#define TEX_NUM_BYTE_CUDA		0
-#define TEX_NUM_HALF_CUDA		0
-#define TEX_START_FLOAT4_CUDA	0
-#define TEX_START_BYTE4_CUDA	TEX_NUM_FLOAT4_CUDA
-#define TEX_START_HALF4_CUDA	(TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA)
-#define TEX_START_FLOAT_CUDA	(TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA + TEX_NUM_HALF4_CUDA)
-#define TEX_START_BYTE_CUDA		(TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA + TEX_NUM_HALF4_CUDA + TEX_NUM_FLOAT_CUDA)
-#define TEX_START_HALF_CUDA		(TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA + TEX_NUM_HALF4_CUDA + TEX_NUM_FLOAT_CUDA + TEX_NUM_BYTE_CUDA)
-
-/* CUDA (Kepler, Geforce 6xx and above) */
-#define TEX_NUM_FLOAT4_CUDA_KEPLER		1024
-#define TEX_NUM_BYTE4_CUDA_KEPLER		1024
-#define TEX_NUM_HALF4_CUDA_KEPLER		1024
-#define TEX_NUM_FLOAT_CUDA_KEPLER		1024
-#define TEX_NUM_BYTE_CUDA_KEPLER		1024
-#define TEX_NUM_HALF_CUDA_KEPLER		1024
-#define TEX_START_FLOAT4_CUDA_KEPLER	0
-#define TEX_START_BYTE4_CUDA_KEPLER		TEX_NUM_FLOAT4_CUDA_KEPLER
-#define TEX_START_HALF4_CUDA_KEPLER		(TEX_NUM_FLOAT4_CUDA_KEPLER + TEX_NUM_BYTE4_CUDA_KEPLER)
-#define TEX_START_FLOAT_CUDA_KEPLER		(TEX_NUM_FLOAT4_CUDA_KEPLER + TEX_NUM_BYTE4_CUDA_KEPLER + TEX_NUM_HALF4_CUDA_KEPLER)
-#define TEX_START_BYTE_CUDA_KEPLER		(TEX_NUM_FLOAT4_CUDA_KEPLER + TEX_NUM_BYTE4_CUDA_KEPLER + TEX_NUM_HALF4_CUDA_KEPLER + TEX_NUM_FLOAT_CUDA_KEPLER)
-#define TEX_START_HALF_CUDA_KEPLER		(TEX_NUM_FLOAT4_CUDA_KEPLER + TEX_NUM_BYTE4_CUDA_KEPLER + TEX_NUM_HALF4_CUDA_KEPLER + TEX_NUM_FLOAT_CUDA_KEPLER + TEX_NUM_BYTE_CUDA_KEPLER)
-
-/* OpenCL */
-#define TEX_NUM_FLOAT4_OPENCL	1024
-#define TEX_NUM_BYTE4_OPENCL	1024
-#define TEX_NUM_HALF4_OPENCL	0
-#define TEX_NUM_FLOAT_OPENCL	1024
-#define TEX_NUM_BYTE_OPENCL		1024
-#define TEX_NUM_HALF_OPENCL		0
-#define TEX_START_FLOAT4_OPENCL	0
-#define TEX_START_BYTE4_OPENCL	TEX_NUM_FLOAT4_OPENCL
-#define TEX_START_HALF4_OPENCL	(TEX_NUM_FLOAT4_OPENCL + TEX_NUM_BYTE4_OPENCL)
-#define TEX_START_FLOAT_OPENCL	(TEX_NUM_FLOAT4_OPENCL + TEX_NUM_BYTE4_OPENCL + TEX_NUM_HALF4_OPENCL)
-#define TEX_START_BYTE_OPENCL	(TEX_NUM_FLOAT4_OPENCL + TEX_NUM_BYTE4_OPENCL + TEX_NUM_HALF4_OPENCL + TEX_NUM_FLOAT_OPENCL)
-#define TEX_START_HALF_OPENCL	(TEX_NUM_FLOAT4_OPENCL + TEX_NUM_BYTE4_OPENCL + TEX_NUM_HALF4_OPENCL + TEX_NUM_FLOAT_OPENCL + TEX_NUM_BYTE_OPENCL)
-
+#define TEX_NUM_FLOAT4_CUDA        5
+#define TEX_NUM_BYTE4_CUDA        84
+#define TEX_NUM_HALF4_CUDA        0
+#define TEX_NUM_FLOAT_CUDA        0
+#define TEX_NUM_BYTE_CUDA        0
+#define TEX_NUM_HALF_CUDA        0
+#define TEX_START_FLOAT4_CUDA    0
+#define TEX_START_BYTE4_CUDA    TEX_NUM_FLOAT4_CUDA
+#define TEX_START_HALF4_CUDA    (TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA)
+#define TEX_START_FLOAT_CUDA    (TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA + TEX_NUM_HALF4_CUDA)
+#define TEX_START_BYTE_CUDA        (TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA + TEX_NUM_HALF4_CUDA + TEX_NUM_FLOAT_CUDA)
+#define TEX_START_HALF_CUDA        (TEX_NUM_FLOAT4_CUDA + TEX_NUM_BYTE4_CUDA + TEX_NUM_HALF4_CUDA + TEX_NUM_FLOAT_CUDA + TEX_NUM_BYTE_CUDA)
+
+/* Any architecture other than old CUDA cards */
+#define TEX_NUM_MAX (INT_MAX >> 4)
 
 /* Color to use when textures are not found. */
 #define TEX_IMAGE_MISSING_R 1
@@ -84,6 +44,14 @@ CCL_NAMESPACE_BEGIN
 #define TEX_IMAGE_MISSING_B 1
 #define TEX_IMAGE_MISSING_A 1
 
+#if defined (__KERNEL_CUDA__) && (__CUDA_ARCH__ < 300)
+#  define kernel_tex_type(tex) (tex < TEX_START_BYTE4_CUDA ? IMAGE_DATA_TYPE_FLOAT4 : IMAGE_DATA_TYPE_BYTE4)
+#  define kernel_tex_index(tex) (tex)
+#else
+#  define kernel_tex_type(tex) (tex & IMAGE_DATA_TYPE_MASK)
+#  define kernel_tex_index(tex) (tex >> IMAGE_DATA_TYPE_SHIFT)
+#endif
+
 CCL_NAMESPACE_END
 
 #endif /* __UTIL_TEXTURE_H__ */