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authorClément Foucault <foucault.clem@gmail.com>2019-06-17 16:18:21 +0300
committerClément Foucault <foucault.clem@gmail.com>2019-06-17 17:13:28 +0300
commit80fb263aa9ecca5f4483504c1c64e6c4f55ed041 (patch)
tree39652b5fc6576ad5002b5fa4ff2692ef178b7b92 /source/blender/draw/intern/DRW_render.h
parent6ae2de026622e8e77d5d9682160c6347e0b65b59 (diff)
DRW: Make stencil state clearer and distinct
Write and test states are now separate and need to be explicit. Also add asserts when trying to write without test enabled.
Diffstat (limited to 'source/blender/draw/intern/DRW_render.h')
-rw-r--r--source/blender/draw/intern/DRW_render.h37
1 files changed, 23 insertions, 14 deletions
diff --git a/source/blender/draw/intern/DRW_render.h b/source/blender/draw/intern/DRW_render.h
index 98d4c3bfa53..d68525e62ae 100644
--- a/source/blender/draw/intern/DRW_render.h
+++ b/source/blender/draw/intern/DRW_render.h
@@ -332,26 +332,27 @@ typedef enum {
DRW_STATE_CULL_BACK = (1 << 11),
DRW_STATE_CULL_FRONT = (1 << 12),
/** Stencil test */
- DRW_STATE_STENCIL_EQUAL = (1 << 13),
- DRW_STATE_STENCIL_NEQUAL = (1 << 14),
+ DRW_STATE_STENCIL_ALWAYS = (1 << 13),
+ DRW_STATE_STENCIL_EQUAL = (1 << 14),
+ DRW_STATE_STENCIL_NEQUAL = (1 << 15),
/** Blend state */
- DRW_STATE_BLEND_ADD = (1 << 15),
+ DRW_STATE_BLEND_ADD = (1 << 16),
/** Same as additive but let alpha accumulate without premult. */
- DRW_STATE_BLEND_ADD_FULL = (1 << 16),
+ DRW_STATE_BLEND_ADD_FULL = (1 << 17),
/** Standard alpha blending. */
- DRW_STATE_BLEND_ALPHA = (1 << 17),
+ DRW_STATE_BLEND_ALPHA = (1 << 18),
/** Use that if color is already premult by alpha. */
- DRW_STATE_BLEND_ALPHA_PREMUL = (1 << 18),
- DRW_STATE_BLEND_ALPHA_UNDER_PREMUL = (1 << 19),
- DRW_STATE_BLEND_OIT = (1 << 20),
- DRW_STATE_BLEND_MUL = (1 << 21),
-
- DRW_STATE_CLIP_PLANES = (1 << 22),
- DRW_STATE_WIRE_SMOOTH = (1 << 23),
- DRW_STATE_FIRST_VERTEX_CONVENTION = (1 << 24),
+ DRW_STATE_BLEND_ALPHA_PREMUL = (1 << 19),
+ DRW_STATE_BLEND_ALPHA_UNDER_PREMUL = (1 << 20),
+ DRW_STATE_BLEND_OIT = (1 << 21),
+ DRW_STATE_BLEND_MUL = (1 << 22),
+
+ DRW_STATE_CLIP_PLANES = (1 << 23),
+ DRW_STATE_WIRE_SMOOTH = (1 << 24),
+ DRW_STATE_FIRST_VERTEX_CONVENTION = (1 << 25),
/** DO NOT USE. Assumed always enabled. Only used internally. */
- DRW_STATE_PROGRAM_POINT_SIZE = (1 << 25),
+ DRW_STATE_PROGRAM_POINT_SIZE = (1 << 26),
} DRWState;
#define DRW_STATE_DEFAULT \
@@ -359,6 +360,14 @@ typedef enum {
#define DRW_STATE_RASTERIZER_ENABLED \
(DRW_STATE_WRITE_DEPTH | DRW_STATE_WRITE_COLOR | DRW_STATE_WRITE_STENCIL | \
DRW_STATE_WRITE_STENCIL_SHADOW_PASS | DRW_STATE_WRITE_STENCIL_SHADOW_FAIL)
+#define DRW_STATE_DEPTH_TEST_ENABLED \
+ (DRW_STATE_DEPTH_ALWAYS | DRW_STATE_DEPTH_LESS | DRW_STATE_DEPTH_LESS_EQUAL | \
+ DRW_STATE_DEPTH_EQUAL | DRW_STATE_DEPTH_GREATER | DRW_STATE_DEPTH_GREATER_EQUAL)
+#define DRW_STATE_STENCIL_TEST_ENABLED \
+ (DRW_STATE_STENCIL_ALWAYS | DRW_STATE_STENCIL_EQUAL | DRW_STATE_STENCIL_NEQUAL)
+#define DRW_STATE_WRITE_STENCIL_ENABLED \
+ (DRW_STATE_WRITE_STENCIL | DRW_STATE_WRITE_STENCIL_SHADOW_PASS | \
+ DRW_STATE_WRITE_STENCIL_SHADOW_FAIL)
typedef enum {
DRW_ATTR_INT,