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author | Germano Cavalcante <germano.costa@ig.com.br> | 2021-06-10 17:13:01 +0300 |
---|---|---|
committer | Germano Cavalcante <germano.costa@ig.com.br> | 2021-06-11 16:49:50 +0300 |
commit | 0eb9351296dbed5e7ac10ca56132d5e51e5f388d (patch) | |
tree | 48de5ef4538c9346d1cc9130ffe50ee8c052fc32 /source/blender/draw/intern/draw_manager_profiling.c | |
parent | 2330cec2c6a7632459c21f51723497e349a042bf (diff) |
Refactor: use 'BLI_task_parallel_range' in Draw Cache
One drawback to trying to predict the number of threads that will be
used in the `task_graph` is that we are only sure of the number when the
threads are running.
Using `BLI_task_parallel_range` allows the driver to
choose the best thread distribution through `parallel_reduce`.
The benefit is most evident on hardware with fewer cores.
This is the result on an 4-core laptop:
||before:|after:
|---|---|---|
|large_mesh_editing:|Average: 5.203638 FPS|Average: 5.398925 FPS
||rdata 15ms iter 43ms (frame 193ms)|rdata 14ms iter 36ms (frame 187ms)
Differential Revision: https://developer.blender.org/D11558
Diffstat (limited to 'source/blender/draw/intern/draw_manager_profiling.c')
-rw-r--r-- | source/blender/draw/intern/draw_manager_profiling.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/source/blender/draw/intern/draw_manager_profiling.c b/source/blender/draw/intern/draw_manager_profiling.c index 9bfc8d98fe4..783ec1b1d7d 100644 --- a/source/blender/draw/intern/draw_manager_profiling.c +++ b/source/blender/draw/intern/draw_manager_profiling.c @@ -41,7 +41,7 @@ #define MAX_TIMER_NAME 32 #define MAX_NESTED_TIMER 8 -#define CHUNK_SIZE 8 +#define MIM_RANGE_LEN 8 #define GPU_TIMER_FALLOFF 0.1 typedef struct DRWTimer { @@ -82,7 +82,7 @@ void DRW_stats_begin(void) if (DTP.is_recording && DTP.timers == NULL) { DTP.chunk_count = 1; - DTP.timer_count = DTP.chunk_count * CHUNK_SIZE; + DTP.timer_count = DTP.chunk_count * MIM_RANGE_LEN; DTP.timers = MEM_callocN(sizeof(DRWTimer) * DTP.timer_count, "DRWTimer stack"); } else if (!DTP.is_recording && DTP.timers != NULL) { @@ -99,7 +99,7 @@ static DRWTimer *drw_stats_timer_get(void) if (UNLIKELY(DTP.timer_increment >= DTP.timer_count)) { /* Resize the stack. */ DTP.chunk_count++; - DTP.timer_count = DTP.chunk_count * CHUNK_SIZE; + DTP.timer_count = DTP.chunk_count * MIM_RANGE_LEN; DTP.timers = MEM_recallocN(DTP.timers, sizeof(DRWTimer) * DTP.timer_count); } |