Examples

22 files changed, 1405 insertions, 1402 deletions

diff --git a/Examples/README.md b/Examples/README.md
new file mode 100644
index 0000000..23079fc
--- /dev/null
+++ b/Examples/README.md
@@ -0,0 +1,3 @@
+# NesTiler usage examples

+

+

diff --git a/Samples/mmc3_split2_animation/Makefile b/Examples/mmc3_split2_animation/Makefile
index 4b75587..4b75587 100644
--- a/Samples/mmc3_split2_animation/Makefile
+++ b/Examples/mmc3_split2_animation/Makefile
diff --git a/Samples/mmc3_split2_animation/main.asm b/Examples/mmc3_split2_animation/main.asm
index 1598d09..a4a4ad8 100644
--- a/Samples/mmc3_split2_animation/main.asm
+++ b/Examples/mmc3_split2_animation/main.asm
@@ -1,293 +1,293 @@
-  ; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 2   ; 2 banks of CHR data
-  .inesmap 4   ; we use mapper 4 (MMC3)
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-CHR_BANK            .rs 1
-FRAME               .rs 1
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank_simple
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-
-  ; vertical mirroring
-  lda #0
-  sta $A000
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$20
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #8
-  bne .loop
-  
-  sta $E000      ; disable MMC3 IRQ
-  lda #%10001000 ; enable NMI
-  sta PPUCTRL
-  jsr waitblank
-  lda #%00001010 ; enable BG
-  sta PPUMASK
-  cli            ; enable interrupts
-main_loop:
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-  lda FRAME
-.loop:
-  cmp FRAME
-  beq .loop
-  rts
-
-  ; VBlank wait subroutine
-waitblank_simple:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  php
-  pha
-
-  ; signal VBlank
-  inc FRAME
-
-  lda FRAME
-  and #$40
-
-  beq .first
-  lda #2
-  jsr chr_bank_switch_left
-  lda #%10001001
-  sta PPUCTRL
-  jmp .end
-
-.first:
-  ; select bank 0
-  lda #0
-  jsr chr_bank_switch_left
-  lda #%10001000
-  sta PPUCTRL
-.end:
-
-  ; arm IRQ
-  sta $E000 ; disable scanline IRQ (and ack)
-  lda #127
-  sta $C000 ; scanline counter
-  sta $C001 ; reload counter
-  sta $E001 ; enable scanline IRQ
-
-  pla
-  plp
-  rti
-
-IRQ:
-  php
-  pha
-
-  ; disable scanline IRQ (and ack)
-  sta $E000
-
-  ; delay
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-  nop
-
-  lda FRAME
-  and #$40
-
-  beq .first
-  lda #3
-  jsr chr_bank_switch_left
-  lda #%10001001
-  sta PPUCTRL
-  jmp .end
-
-.first:
-  ; select bank 0
-  lda #1
-  jsr chr_bank_switch_left
-  lda #%10001000
-  sta PPUCTRL
-.end:
-
-  pla
-  plp
-  rti
-
-chr_bank_switch_left:
-  pha
-  asl A
-  asl A
-  ldx #0
-  stx $8000
-  sta $8001
-  inx
-  ora #2
-  stx $8000
-  sta $8001
-  pla
-  rts
-
-chr_bank_switch_right:
-  pha
-  asl A
-  asl A
-  ldx #2
-  stx $8000
-  sta $8001
-  inx
-  ora #1
-  stx $8000
-  sta $8001
-  inx
-  and #%11111110
-  ora #2
-  stx $8000
-  sta $8001
-  inx
-  ora #1
-  stx $8000
-  sta $8001
-  pla
-  rts
-
-nametable_0:
-  .incbin "name_table_0.bin"
-nametable_1:
-  .incbin "name_table_1.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-attr_table_1:
-  .incbin "attr_table_1.bin"
-
-nametable_2:
-  .incbin "name_table_2.bin"
-nametable_3:
-  .incbin "name_table_3.bin"
-attr_table_2:
-  .incbin "attr_table_2.bin"
-attr_table_3:
-  .incbin "attr_table_3.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
-  .org $1000
-  .incbin "pattern_1.bin"
-  .bank 3
-  .org $0000
-  .incbin "pattern_2.bin"
-  .org $1000
-  .incbin "pattern_3.bin"
+  ; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 2   ; 2 banks of CHR data

+  .inesmap 4   ; we use mapper 4 (MMC3)

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+CHR_BANK            .rs 1

+FRAME               .rs 1

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank_simple

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+

+  ; vertical mirroring

+  lda #0

+  sta $A000

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$20

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #8

+  bne .loop

+  

+  sta $E000      ; disable MMC3 IRQ

+  lda #%10001000 ; enable NMI

+  sta PPUCTRL

+  jsr waitblank

+  lda #%00001010 ; enable BG

+  sta PPUMASK

+  cli            ; enable interrupts

+main_loop:

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+  lda FRAME

+.loop:

+  cmp FRAME

+  beq .loop

+  rts

+

+  ; VBlank wait subroutine

+waitblank_simple:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  php

+  pha

+

+  ; signal VBlank

+  inc FRAME

+

+  lda FRAME

+  and #$40

+

+  beq .first

+  lda #2

+  jsr chr_bank_switch_left

+  lda #%10001001

+  sta PPUCTRL

+  jmp .end

+

+.first:

+  ; select bank 0

+  lda #0

+  jsr chr_bank_switch_left

+  lda #%10001000

+  sta PPUCTRL

+.end:

+

+  ; arm IRQ

+  sta $E000 ; disable scanline IRQ (and ack)

+  lda #127

+  sta $C000 ; scanline counter

+  sta $C001 ; reload counter

+  sta $E001 ; enable scanline IRQ

+

+  pla

+  plp

+  rti

+

+IRQ:

+  php

+  pha

+

+  ; disable scanline IRQ (and ack)

+  sta $E000

+

+  ; delay

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+  nop

+

+  lda FRAME

+  and #$40

+

+  beq .first

+  lda #3

+  jsr chr_bank_switch_left

+  lda #%10001001

+  sta PPUCTRL

+  jmp .end

+

+.first:

+  ; select bank 0

+  lda #1

+  jsr chr_bank_switch_left

+  lda #%10001000

+  sta PPUCTRL

+.end:

+

+  pla

+  plp

+  rti

+

+chr_bank_switch_left:

+  pha

+  asl A

+  asl A

+  ldx #0

+  stx $8000

+  sta $8001

+  inx

+  ora #2

+  stx $8000

+  sta $8001

+  pla

+  rts

+

+chr_bank_switch_right:

+  pha

+  asl A

+  asl A

+  ldx #2

+  stx $8000

+  sta $8001

+  inx

+  ora #1

+  stx $8000

+  sta $8001

+  inx

+  and #%11111110

+  ora #2

+  stx $8000

+  sta $8001

+  inx

+  ora #1

+  stx $8000

+  sta $8001

+  pla

+  rts

+

+nametable_0:

+  .incbin "name_table_0.bin"

+nametable_1:

+  .incbin "name_table_1.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+attr_table_1:

+  .incbin "attr_table_1.bin"

+

+nametable_2:

+  .incbin "name_table_2.bin"

+nametable_3:

+  .incbin "name_table_3.bin"

+attr_table_2:

+  .incbin "attr_table_2.bin"

+attr_table_3:

+  .incbin "attr_table_3.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

+  .org $1000

+  .incbin "pattern_1.bin"

+  .bank 3

+  .org $0000

+  .incbin "pattern_2.bin"

+  .org $1000

+  .incbin "pattern_3.bin"

diff --git a/Samples/mmc3_split4/Makefile b/Examples/mmc3_split4/Makefile
index 1933e05..1933e05 100644
--- a/Samples/mmc3_split4/Makefile
+++ b/Examples/mmc3_split4/Makefile
diff --git a/Samples/mmc3_split4/main.asm b/Examples/mmc3_split4/main.asm
index 70dd12f..0bcad28 100644
--- a/Samples/mmc3_split4/main.asm
+++ b/Examples/mmc3_split4/main.asm
@@ -1,260 +1,260 @@
-  ; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 2   ; 2 banks of CHR data
-  .inesmap 4   ; we use mapper 4 (MMC3)
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-CHR_BANK            .rs 1
-FRAME               .rs 1
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank_simple
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-  lda #0
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$20
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #4
-  bne .loop
-  
-  sta $E000      ; disable MMC3 IRQ
-  lda #%10001000 ; enable NMI
-  sta PPUCTRL
-  jsr waitblank
-  lda #%00001010 ; enable BG
-  sta PPUMASK
-  cli            ; enable interrupts
-main_loop:
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-  lda FRAME
-.loop:
-  cmp FRAME
-  beq .loop
-  rts
-
-  ; VBlank wait subroutine
-waitblank_simple:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  php
-  pha
-  ; select bank 0
-  lda #0
-  jsr chr_bank_switch_left
-  lda #1
-  jsr chr_bank_switch_right
-  sta CHR_BANK
-  ldx #%10001000 ; enable NMI, first pattern table
-  stx PPUCTRL
-  ldx #%10010000 ; scheduled enable NMI, second pattern table
-  ; arm IRQ
-  sta $E000 ; disable scanline IRQ (and ack)
-  lda #64
-  sta $C000 ; scanline counter
-  sta $C001 ; reload counter
-  sta $E001 ; enable scanline IRQ
-  inc FRAME ; signal VBlank
-  pla
-  plp
-  rti
-
-IRQ:
-  stx PPUCTRL ; switch pattern table to scheduled
-
-  php
-  pha
-  ; switch to another pattern table and schedule next
-  inc CHR_BANK
-  lda CHR_BANK
-  and #1
-  bne .schedule_right
-  lda CHR_BANK
-  jsr chr_bank_switch_left
-  ldx #%10001000
-  jmp .schedule_end
-.schedule_right:
-  lda CHR_BANK
-  jsr chr_bank_switch_right
-  ldx #%10010000
-.schedule_end:
-  sta $E000 ; disable scanline IRQ (and ack)
-  lda #63
-  ldy #3
-  cpy CHR_BANK
-  bne .no_dec
-  lda #62
-.no_dec:
-  sta $C000 ; scanline counter
-  sta $C001 ; reload counter
-  sta $E001 ; enable scanline IRQ
-
-  pla
-  plp
-  rti
-
-chr_bank_switch_left:
-  pha
-  asl A
-  asl A
-  ldx #0
-  stx $8000
-  sta $8001
-  inx
-  ora #2
-  stx $8000
-  sta $8001
-  pla
-  rts
-
-chr_bank_switch_right:
-  pha
-  asl A
-  asl A
-  ldx #2
-  stx $8000
-  sta $8001
-  inx
-  ora #1
-  stx $8000
-  sta $8001
-  inx
-  and #%11111110
-  ora #2
-  stx $8000
-  sta $8001
-  inx
-  ora #1
-  stx $8000
-  sta $8001
-  pla
-  rts
-
-nametable_0:
-  .incbin "name_table_0.bin"
-nametable_1:
-  .incbin "name_table_1.bin"
-nametable_2:
-  .incbin "name_table_2.bin"
-nametable_3:
-  .incbin "name_table_3.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-attr_table_1:
-  .incbin "attr_table_1.bin"
-attr_table_2:
-  .incbin "attr_table_2.bin"
-attr_table_3:
-  .incbin "attr_table_3.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
-  .org $1000
-  .incbin "pattern_1.bin"
-  .bank 3
-  .org $0000
-  .incbin "pattern_2.bin"
-  .org $1000
-  .incbin "pattern_3.bin"
+  ; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 2   ; 2 banks of CHR data

+  .inesmap 4   ; we use mapper 4 (MMC3)

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+CHR_BANK            .rs 1

+FRAME               .rs 1

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank_simple

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+  lda #0

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$20

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #4

+  bne .loop

+  

+  sta $E000      ; disable MMC3 IRQ

+  lda #%10001000 ; enable NMI

+  sta PPUCTRL

+  jsr waitblank

+  lda #%00001010 ; enable BG

+  sta PPUMASK

+  cli            ; enable interrupts

+main_loop:

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+  lda FRAME

+.loop:

+  cmp FRAME

+  beq .loop

+  rts

+

+  ; VBlank wait subroutine

+waitblank_simple:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  php

+  pha

+  ; select bank 0

+  lda #0

+  jsr chr_bank_switch_left

+  lda #1

+  jsr chr_bank_switch_right

+  sta CHR_BANK

+  ldx #%10001000 ; enable NMI, first pattern table

+  stx PPUCTRL

+  ldx #%10010000 ; scheduled enable NMI, second pattern table

+  ; arm IRQ

+  sta $E000 ; disable scanline IRQ (and ack)

+  lda #64

+  sta $C000 ; scanline counter

+  sta $C001 ; reload counter

+  sta $E001 ; enable scanline IRQ

+  inc FRAME ; signal VBlank

+  pla

+  plp

+  rti

+

+IRQ:

+  stx PPUCTRL ; switch pattern table to scheduled

+

+  php

+  pha

+  ; switch to another pattern table and schedule next

+  inc CHR_BANK

+  lda CHR_BANK

+  and #1

+  bne .schedule_right

+  lda CHR_BANK

+  jsr chr_bank_switch_left

+  ldx #%10001000

+  jmp .schedule_end

+.schedule_right:

+  lda CHR_BANK

+  jsr chr_bank_switch_right

+  ldx #%10010000

+.schedule_end:

+  sta $E000 ; disable scanline IRQ (and ack)

+  lda #63

+  ldy #3

+  cpy CHR_BANK

+  bne .no_dec

+  lda #62

+.no_dec:

+  sta $C000 ; scanline counter

+  sta $C001 ; reload counter

+  sta $E001 ; enable scanline IRQ

+

+  pla

+  plp

+  rti

+

+chr_bank_switch_left:

+  pha

+  asl A

+  asl A

+  ldx #0

+  stx $8000

+  sta $8001

+  inx

+  ora #2

+  stx $8000

+  sta $8001

+  pla

+  rts

+

+chr_bank_switch_right:

+  pha

+  asl A

+  asl A

+  ldx #2

+  stx $8000

+  sta $8001

+  inx

+  ora #1

+  stx $8000

+  sta $8001

+  inx

+  and #%11111110

+  ora #2

+  stx $8000

+  sta $8001

+  inx

+  ora #1

+  stx $8000

+  sta $8001

+  pla

+  rts

+

+nametable_0:

+  .incbin "name_table_0.bin"

+nametable_1:

+  .incbin "name_table_1.bin"

+nametable_2:

+  .incbin "name_table_2.bin"

+nametable_3:

+  .incbin "name_table_3.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+attr_table_1:

+  .incbin "attr_table_1.bin"

+attr_table_2:

+  .incbin "attr_table_2.bin"

+attr_table_3:

+  .incbin "attr_table_3.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

+  .org $1000

+  .incbin "pattern_1.bin"

+  .bank 3

+  .org $0000

+  .incbin "pattern_2.bin"

+  .org $1000

+  .incbin "pattern_3.bin"

diff --git a/Samples/nrom_group_scroll/Makefile b/Examples/nrom_group_scroll/Makefile
index 40c988c..40c988c 100644
--- a/Samples/nrom_group_scroll/Makefile
+++ b/Examples/nrom_group_scroll/Makefile
diff --git a/Samples/nrom_group_scroll/main.asm b/Examples/nrom_group_scroll/main.asm
index 392f008..07465d7 100644
--- a/Samples/nrom_group_scroll/main.asm
+++ b/Examples/nrom_group_scroll/main.asm
@@ -1,182 +1,182 @@
-; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 1   ; 1 bank of CHR data
-  .inesmir 1   ; mirroring
-  .inesmap 0   ; we use mapper 0
-
-DELAY .equ 2
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-SCROLL_X            .rs 1
-PAUSE               .rs 1
-DIR                 .rs 1
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-  lda #0
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$20
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #8
-  bne .loop
-
-  ; enable PPU
-  jsr waitblank
-  lda #%00001010
-  sta PPUMASK
-  lda #%00000000
-  sta PPUCTRL
-
-  ; reset variables
-  lda #0
-  sta SCROLL_X
-  sta DIR
-
-main_loop:
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-
-  ldx SCROLL_X
-  stx PPUSCROLL
-
-  inc PAUSE
-  lda PAUSE
-  cmp #DELAY
-  bne .scroll
-  lda #0
-  sta PAUSE
-
-  lda DIR
-  bne .left
-  inx
-  bne .scroll
-  lda #1
-  sta DIR
-  dex
-  jmp .scroll
-.no_turn_left:
-  jmp .scroll
-.left:
-  dex
-  bne .scroll
-  lda #0
-  sta DIR
-  
-.scroll:
-  stx SCROLL_X
-  lda #0
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  rti
-
-IRQ:
-  rti
-
-nametable_0:
-  .incbin "name_table_0.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-nametable_1:
-  .incbin "name_table_1.bin"
-attr_table_1:
-  .incbin "attr_table_1.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
+; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 1   ; 1 bank of CHR data

+  .inesmir 1   ; mirroring

+  .inesmap 0   ; we use mapper 0

+

+DELAY .equ 2

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+SCROLL_X            .rs 1

+PAUSE               .rs 1

+DIR                 .rs 1

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+  lda #0

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$20

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #8

+  bne .loop

+

+  ; enable PPU

+  jsr waitblank

+  lda #%00001010

+  sta PPUMASK

+  lda #%00000000

+  sta PPUCTRL

+

+  ; reset variables

+  lda #0

+  sta SCROLL_X

+  sta DIR

+

+main_loop:

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+

+  ldx SCROLL_X

+  stx PPUSCROLL

+

+  inc PAUSE

+  lda PAUSE

+  cmp #DELAY

+  bne .scroll

+  lda #0

+  sta PAUSE

+

+  lda DIR

+  bne .left

+  inx

+  bne .scroll

+  lda #1

+  sta DIR

+  dex

+  jmp .scroll

+.no_turn_left:

+  jmp .scroll

+.left:

+  dex

+  bne .scroll

+  lda #0

+  sta DIR

+  

+.scroll:

+  stx SCROLL_X

+  lda #0

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  rti

+

+IRQ:

+  rti

+

+nametable_0:

+  .incbin "name_table_0.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+nametable_1:

+  .incbin "name_table_1.bin"

+attr_table_1:

+  .incbin "attr_table_1.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

diff --git a/Samples/nrom_simple/Makefile b/Examples/nrom_simple/Makefile
index ad04963..ad04963 100644
--- a/Samples/nrom_simple/Makefile
+++ b/Examples/nrom_simple/Makefile
diff --git a/Samples/nrom_simple/main.asm b/Examples/nrom_simple/main.asm
index 3f87247..77d3143 100644
--- a/Samples/nrom_simple/main.asm
+++ b/Examples/nrom_simple/main.asm
@@ -1,139 +1,139 @@
-  ; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 1   ; 1 bank of CHR data
-  .inesmir 0   ; mirroring
-  .inesmap 0   ; we use mapper 0
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-  lda #0
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$20
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #4
-  bne .loop
-
-  ; enable PPU
-  jsr waitblank
-  lda #%00001010
-  sta PPUMASK
-  lda #%00000000
-  sta PPUCTRL
-main_loop:
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  rti
-
-IRQ:
-  rti
-
-nametable_0:
-  .incbin "name_table_0.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
+  ; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 1   ; 1 bank of CHR data

+  .inesmir 0   ; mirroring

+  .inesmap 0   ; we use mapper 0

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+  lda #0

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$20

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #4

+  bne .loop

+

+  ; enable PPU

+  jsr waitblank

+  lda #%00001010

+  sta PPUMASK

+  lda #%00000000

+  sta PPUCTRL

+main_loop:

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  rti

+

+IRQ:

+  rti

+

+nametable_0:

+  .incbin "name_table_0.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

diff --git a/Samples/nrom_simple_offset/Makefile b/Examples/nrom_simple_offset/Makefile
index 84b2178..84b2178 100644
--- a/Samples/nrom_simple_offset/Makefile
+++ b/Examples/nrom_simple_offset/Makefile
diff --git a/Samples/nrom_simple_offset/main.asm b/Examples/nrom_simple_offset/main.asm
index 2fb062f..65df3f9 100644
--- a/Samples/nrom_simple_offset/main.asm
+++ b/Examples/nrom_simple_offset/main.asm
@@ -1,139 +1,139 @@
-  ; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 1   ; 1 bank of CHR data
-  .inesmir 0   ; mirroring
-  .inesmap 0   ; we use mapper 0
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-  lda #0
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$21
-  sta PPUADDR
-  lda #$40
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #4
-  bne .loop
-
-  ; enable PPU
-  jsr waitblank
-  lda #%00001010
-  sta PPUMASK
-  lda #%00000000
-  sta PPUCTRL
-main_loop:
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  rti
-
-IRQ:
-  rti
-
-nametable_0:
-  .incbin "name_table_0.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
+  ; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 1   ; 1 bank of CHR data

+  .inesmir 0   ; mirroring

+  .inesmap 0   ; we use mapper 0

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+  lda #0

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$21

+  sta PPUADDR

+  lda #$40

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #4

+  bne .loop

+

+  ; enable PPU

+  jsr waitblank

+  lda #%00001010

+  sta PPUMASK

+  lda #%00000000

+  sta PPUCTRL

+main_loop:

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  rti

+

+IRQ:

+  rti

+

+nametable_0:

+  .incbin "name_table_0.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

diff --git a/Samples/nrom_split/Makefile b/Examples/nrom_split/Makefile
index 0f90517..0f90517 100644
--- a/Samples/nrom_split/Makefile
+++ b/Examples/nrom_split/Makefile
diff --git a/Samples/nrom_split/main.asm b/Examples/nrom_split/main.asm
index 729aef5..0780961 100644
--- a/Samples/nrom_split/main.asm
+++ b/Examples/nrom_split/main.asm
@@ -1,164 +1,164 @@
-  ; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 1   ; 1 bank of CHR data
-  .inesmir 0   ; mirroring
-  .inesmap 0   ; we use mapper 0
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-TIMER               .rs 1
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-  lda #0
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$20
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #4
-  bne .loop
-
-  jsr waitblank
-main_loop:
-  lda #%00001010
-  sta PPUMASK
-  lda #%00000000
-  sta PPUCTRL
-  lda #0
-  sta TIMER
-  sta TIMER + 1
-.timer:
-  lda TIMER
-  cmp #$A5
-  bne .timer_continue
-  lda TIMER + 1
-  cmp #$03
-  bne .timer_continue
-  jmp .next_nametable
-.timer_continue:
-  inc TIMER
-  bne .timer
-  inc TIMER+1
-  jmp .timer
-.next_nametable:
-  lda #%00010000
-  sta PPUCTRL
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  rti
-
-IRQ:
-  rti
-
-nametable_0:
-  .incbin "name_table_0.bin"
-nametable_1:
-  .incbin "name_table_1.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-attr_table_1:
-  .incbin "attr_table_1.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
-  .org $1000
-  .incbin "pattern_1.bin"
+  ; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 1   ; 1 bank of CHR data

+  .inesmir 0   ; mirroring

+  .inesmap 0   ; we use mapper 0

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+TIMER               .rs 1

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+  lda #0

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$20

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #4

+  bne .loop

+

+  jsr waitblank

+main_loop:

+  lda #%00001010

+  sta PPUMASK

+  lda #%00000000

+  sta PPUCTRL

+  lda #0

+  sta TIMER

+  sta TIMER + 1

+.timer:

+  lda TIMER

+  cmp #$A5

+  bne .timer_continue

+  lda TIMER + 1

+  cmp #$03

+  bne .timer_continue

+  jmp .next_nametable

+.timer_continue:

+  inc TIMER

+  bne .timer

+  inc TIMER+1

+  jmp .timer

+.next_nametable:

+  lda #%00010000

+  sta PPUCTRL

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  rti

+

+IRQ:

+  rti

+

+nametable_0:

+  .incbin "name_table_0.bin"

+nametable_1:

+  .incbin "name_table_1.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+attr_table_1:

+  .incbin "attr_table_1.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

+  .org $1000

+  .incbin "pattern_1.bin"

diff --git a/Samples/nrom_split_lossy/Makefile b/Examples/nrom_split_lossy/Makefile
index fa1032c..fa1032c 100644
--- a/Samples/nrom_split_lossy/Makefile
+++ b/Examples/nrom_split_lossy/Makefile
diff --git a/Samples/nrom_split_lossy/main.asm b/Examples/nrom_split_lossy/main.asm
index 729aef5..0780961 100644
--- a/Samples/nrom_split_lossy/main.asm
+++ b/Examples/nrom_split_lossy/main.asm
@@ -1,164 +1,164 @@
-  ; INES header stuff
-  .inesprg 1   ; 1 bank of PRG
-  .ineschr 1   ; 1 bank of CHR data
-  .inesmir 0   ; mirroring
-  .inesmap 0   ; we use mapper 0
-
-  .rsset $0000 ; variables
-COPY_SOURCE_ADDR    .rs 2
-COPY_DEST_ADDR      .rs 2
-TIMER               .rs 1
-  
-  .bank 1
-  .org $FFFA   ; reset vectors
-  .dw NMI
-  .dw Start
-  .dw IRQ
-
-  .bank 0
-  .org $C000 ; code starts here
-Start:
-  ; disable interrupts
-  sei
-  ; reset stack
-  ldx #$ff
-  txs
-
-  ; disable PPU
-  lda #%00000000
-  sta PPUCTRL
-  lda #%00000000
-  sta PPUMASK
-
-  jsr waitblank
-
-  ; reset sound
-  lda #0
-  sta $4000
-  sta $4001
-  sta $4002
-  sta $4003
-  sta $4004
-  sta $4005
-  sta $4006
-  sta $4007
-  sta $4009
-  sta $400A
-  sta $400C
-  sta $400D
-  sta $400E
-  sta $400F
-  sta $4010
-  sta $4011
-  sta $4012
-  sta $4013
-  lda #$0F
-  sta $4015
-  lda #$40
-  sta $4017
-  lda #0
-
-load_palette:
-  lda #LOW(palette)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(palette)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$3F
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #16
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  dex
-  bne .loop
-
-load_nametable:
-  lda #LOW(nametable_0)
-  sta <COPY_SOURCE_ADDR
-  lda #HIGH(nametable_0)
-  sta <COPY_SOURCE_ADDR+1
-  lda #$20
-  sta PPUADDR
-  lda #$00
-  sta PPUADDR
-  ldy #$00
-  ldx #$00
-.loop:
-  lda [COPY_SOURCE_ADDR], y
-  sta PPUDATA
-  iny
-  bne .loop
-  inc COPY_SOURCE_ADDR+1
-  inx
-  cpx #4
-  bne .loop
-
-  jsr waitblank
-main_loop:
-  lda #%00001010
-  sta PPUMASK
-  lda #%00000000
-  sta PPUCTRL
-  lda #0
-  sta TIMER
-  sta TIMER + 1
-.timer:
-  lda TIMER
-  cmp #$A5
-  bne .timer_continue
-  lda TIMER + 1
-  cmp #$03
-  bne .timer_continue
-  jmp .next_nametable
-.timer_continue:
-  inc TIMER
-  bne .timer
-  inc TIMER+1
-  jmp .timer
-.next_nametable:
-  lda #%00010000
-  sta PPUCTRL
-  jsr waitblank
-  jmp main_loop
-
-  ; VBlank wait subroutine
-waitblank:
-  bit PPUSTATUS
-  lda #0
-  sta PPUSCROLL
-  sta PPUSCROLL
-.loop:
-  lda PPUSTATUS ; load A with value at location PPUSTATUS
-  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking
-  rts
-
-NMI:
-  rti
-
-IRQ:
-  rti
-
-nametable_0:
-  .incbin "name_table_0.bin"
-nametable_1:
-  .incbin "name_table_1.bin"
-attr_table_0:
-  .incbin "attr_table_0.bin"
-attr_table_1:
-  .incbin "attr_table_1.bin"
-
-palette:
-  .incbin "palette_0.bin"
-  .incbin "palette_1.bin"
-  .incbin "palette_2.bin"
-  .incbin "palette_3.bin"
-
-  .bank 2
-  .org $0000
-  .incbin "pattern_0.bin"
-  .org $1000
-  .incbin "pattern_1.bin"
+  ; INES header stuff

+  .inesprg 1   ; 1 bank of PRG

+  .ineschr 1   ; 1 bank of CHR data

+  .inesmir 0   ; mirroring

+  .inesmap 0   ; we use mapper 0

+

+  .rsset $0000 ; variables

+COPY_SOURCE_ADDR    .rs 2

+COPY_DEST_ADDR      .rs 2

+TIMER               .rs 1

+  

+  .bank 1

+  .org $FFFA   ; reset vectors

+  .dw NMI

+  .dw Start

+  .dw IRQ

+

+  .bank 0

+  .org $C000 ; code starts here

+Start:

+  ; disable interrupts

+  sei

+  ; reset stack

+  ldx #$ff

+  txs

+

+  ; disable PPU

+  lda #%00000000

+  sta PPUCTRL

+  lda #%00000000

+  sta PPUMASK

+

+  jsr waitblank

+

+  ; reset sound

+  lda #0

+  sta $4000

+  sta $4001

+  sta $4002

+  sta $4003

+  sta $4004

+  sta $4005

+  sta $4006

+  sta $4007

+  sta $4009

+  sta $400A

+  sta $400C

+  sta $400D

+  sta $400E

+  sta $400F

+  sta $4010

+  sta $4011

+  sta $4012

+  sta $4013

+  lda #$0F

+  sta $4015

+  lda #$40

+  sta $4017

+  lda #0

+

+load_palette:

+  lda #LOW(palette)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(palette)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$3F

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #16

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  dex

+  bne .loop

+

+load_nametable:

+  lda #LOW(nametable_0)

+  sta <COPY_SOURCE_ADDR

+  lda #HIGH(nametable_0)

+  sta <COPY_SOURCE_ADDR+1

+  lda #$20

+  sta PPUADDR

+  lda #$00

+  sta PPUADDR

+  ldy #$00

+  ldx #$00

+.loop:

+  lda [COPY_SOURCE_ADDR], y

+  sta PPUDATA

+  iny

+  bne .loop

+  inc COPY_SOURCE_ADDR+1

+  inx

+  cpx #4

+  bne .loop

+

+  jsr waitblank

+main_loop:

+  lda #%00001010

+  sta PPUMASK

+  lda #%00000000

+  sta PPUCTRL

+  lda #0

+  sta TIMER

+  sta TIMER + 1

+.timer:

+  lda TIMER

+  cmp #$A5

+  bne .timer_continue

+  lda TIMER + 1

+  cmp #$03

+  bne .timer_continue

+  jmp .next_nametable

+.timer_continue:

+  inc TIMER

+  bne .timer

+  inc TIMER+1

+  jmp .timer

+.next_nametable:

+  lda #%00010000

+  sta PPUCTRL

+  jsr waitblank

+  jmp main_loop

+

+  ; VBlank wait subroutine

+waitblank:

+  bit PPUSTATUS

+  lda #0

+  sta PPUSCROLL

+  sta PPUSCROLL

+.loop:

+  lda PPUSTATUS ; load A with value at location PPUSTATUS

+  bpl .loop     ; if bit 7 is not set (not VBlank) keep checking

+  rts

+

+NMI:

+  rti

+

+IRQ:

+  rti

+

+nametable_0:

+  .incbin "name_table_0.bin"

+nametable_1:

+  .incbin "name_table_1.bin"

+attr_table_0:

+  .incbin "attr_table_0.bin"

+attr_table_1:

+  .incbin "attr_table_1.bin"

+

+palette:

+  .incbin "palette_0.bin"

+  .incbin "palette_1.bin"

+  .incbin "palette_2.bin"

+  .incbin "palette_3.bin"

+

+  .bank 2

+  .org $0000

+  .incbin "pattern_0.bin"

+  .org $1000

+  .incbin "pattern_1.bin"

diff --git a/Samples/nrom_split_lossy/preview1.png b/Examples/nrom_split_lossy/preview1.png
index f6fac89..f6fac89 100644
--- a/Samples/nrom_split_lossy/preview1.png
+++ b/Examples/nrom_split_lossy/preview1.png
diff --git a/Samples/nrom_split_lossy/preview2.png b/Examples/nrom_split_lossy/preview2.png
index f1254a3..f1254a3 100644
--- a/Samples/nrom_split_lossy/preview2.png
+++ b/Examples/nrom_split_lossy/preview2.png
diff --git a/Samples/sprites8x16/Makefile b/Examples/sprites8x16/Makefile
index d64cec7..d64cec7 100644
--- a/Samples/sprites8x16/Makefile
+++ b/Examples/sprites8x16/Makefile
diff --git a/Samples/sprites8x16/main.asm b/Examples/sprites8x16/main.asm
index 2217ece..2217ece 100644
--- a/Samples/sprites8x16/main.asm
+++ b/Examples/sprites8x16/main.asm
diff --git a/Samples/sprites8x8/Makefile b/Examples/sprites8x8/Makefile
index 80dce3b..80dce3b 100644
--- a/Samples/sprites8x8/Makefile
+++ b/Examples/sprites8x8/Makefile
diff --git a/Samples/sprites8x8/main.asm b/Examples/sprites8x8/main.asm
index db41984..db41984 100644
--- a/Samples/sprites8x8/main.asm
+++ b/Examples/sprites8x8/main.asm
diff --git a/NesTiler/FastBitmap.cs b/NesTiler/FastBitmap.cs
index 2ee9081..70a3382 100644
--- a/NesTiler/FastBitmap.cs
+++ b/NesTiler/FastBitmap.cs
@@ -1,61 +1,61 @@
-using SkiaSharp;
-using System;
-using System.Collections.Generic;
-using System.Drawing;
-using System.Linq;
-using System.Runtime.CompilerServices;
-using System.Text;
-using System.Threading.Tasks;
-
-namespace com.clusterrr.Famicom.NesTiler
-{
-    public class FastBitmap
-    {
-        public int Width { get; }
-        public int Height { get; }
-
-        private readonly Color[] colors;
-        private static Dictionary<string, SKBitmap> imagesCache = new Dictionary<string, SKBitmap>();
-
-        private FastBitmap(SKBitmap skBitmap, int verticalOffset = 0, int height = 0)
-        {
-            Width = skBitmap.Width;
-            Height = height <= 0 ? skBitmap.Height - verticalOffset : height;
-            var pixels = skBitmap.Pixels;
-            colors = skBitmap.Pixels.Skip(verticalOffset * Width).Take(Width * Height).Select(p => Color.FromArgb(p.Alpha, p.Red, p.Green, p.Blue)).ToArray();
-        }
-
-        public static FastBitmap Decode(string filename, int verticalOffset = 0, int height = 0)
-        {
-            using var image = SKBitmap.Decode(filename);
-            if (image == null) return null;
-            imagesCache[filename] = image;
-            return new FastBitmap(image, verticalOffset, height);
-        }
-
-        public Color GetPixelColor(int x, int y)
-        {
-            return colors[y * Width + x];
-        }
-
-        public void SetPixelColor(int x, int y, Color color)
-        {
-            colors[y * Width + x] = color;
-        }
-
-        public byte[] Encode(SKEncodedImageFormat format, int v)
-        {
-            using var skImage = new SKBitmap(Width, Height);
-            for (int y = 0; y < Height; y++)
-            {
-                for (int x = 0; x < Width; x++)
-                {
-                    var color = colors[y * Width + x];
-                    var skColor = new SKColor(color.R, color.G, color.B);
-                    skImage.SetPixel(x, y, skColor);
-                }
-            }
-            return skImage.Encode(format, v).ToArray();
-        }
-    }
-}
+using SkiaSharp;

+using System;

+using System.Collections.Generic;

+using System.Drawing;

+using System.Linq;

+using System.Runtime.CompilerServices;

+using System.Text;

+using System.Threading.Tasks;

+

+namespace com.clusterrr.Famicom.NesTiler

+{

+    public class FastBitmap

+    {

+        public int Width { get; }

+        public int Height { get; }

+

+        private readonly Color[] colors;

+        private static Dictionary<string, SKBitmap> imagesCache = new Dictionary<string, SKBitmap>();

+

+        private FastBitmap(SKBitmap skBitmap, int verticalOffset = 0, int height = 0)

+        {

+            Width = skBitmap.Width;

+            Height = height <= 0 ? skBitmap.Height - verticalOffset : height;

+            var pixels = skBitmap.Pixels;

+            colors = skBitmap.Pixels.Skip(verticalOffset * Width).Take(Width * Height).Select(p => Color.FromArgb(p.Alpha, p.Red, p.Green, p.Blue)).ToArray();

+        }

+

+        public static FastBitmap Decode(string filename, int verticalOffset = 0, int height = 0)

+        {

+            using var image = SKBitmap.Decode(filename);

+            if (image == null) return null;

+            imagesCache[filename] = image;

+            return new FastBitmap(image, verticalOffset, height);

+        }

+

+        public Color GetPixelColor(int x, int y)

+        {

+            return colors[y * Width + x];

+        }

+

+        public void SetPixelColor(int x, int y, Color color)

+        {

+            colors[y * Width + x] = color;

+        }

+

+        public byte[] Encode(SKEncodedImageFormat format, int v)

+        {

+            using var skImage = new SKBitmap(Width, Height);

+            for (int y = 0; y < Height; y++)

+            {

+                for (int x = 0; x < Width; x++)

+                {

+                    var color = colors[y * Width + x];

+                    var skColor = new SKColor(color.R, color.G, color.B);

+                    skImage.SetPixel(x, y, skColor);

+                }

+            }

+            return skImage.Encode(format, v).ToArray();

+        }

+    }

+}