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diff --git a/for_altera/DreamcastReader.qpf b/for_altera/DreamcastReader.qpf
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+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2013 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 64-Bit
+# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
+# Date created = 03:15:55  September 06, 2015
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "13.0"
+DATE = "03:15:55  September 06, 2015"
+
+# Revisions
+
+PROJECT_REVISION = "DreamcastReader"
diff --git a/for_altera/DreamcastReader.qsf b/for_altera/DreamcastReader.qsf
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+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2013 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 64-Bit
+# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
+# Date created = 03:15:56  September 06, 2015
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+#		DreamcastReader_assignment_defaults.qdf
+#    If this file doesn't exist, see file:
+#		assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+#    file is updated automatically by the Quartus II software
+#    and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY MAX3000A
+set_global_assignment -name DEVICE "EPM3064ATC100-10"
+set_global_assignment -name TOP_LEVEL_ENTITY DreamcastReader
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "03:15:55  SEPTEMBER 06, 2015"
+set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
+set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
+set_location_assignment PIN_23 -to data[0]
+set_location_assignment PIN_21 -to data[1]
+set_location_assignment PIN_20 -to data[2]
+set_location_assignment PIN_17 -to data[4]
+set_location_assignment PIN_16 -to data[5]
+set_location_assignment PIN_13 -to data[6]
+set_location_assignment PIN_12 -to data[7]
+set_location_assignment PIN_100 -to controller_pin1
+set_location_assignment PIN_97 -to controller_pin5
+set_location_assignment PIN_25 -to clock
+set_location_assignment PIN_8 -to reset
+set_location_assignment PIN_19 -to data[3]
\ No newline at end of file
diff --git a/for_altera/DreamcastReader.qws b/for_altera/DreamcastReader.qws
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+++ b/for_altera/DreamcastReader.qws
diff --git a/for_altera/DreamcastReader.v b/for_altera/DreamcastReader.v
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+module DreamcastReader
+(
+	input controller_pin1,
+	input controller_pin5,
+	input reset,
+	output reg clock,
+	output reg [7:0] data
+);
+	reg [1:0] bit_counter1;
+	reg [1:0] bit_counter5;
+	
+	reg [2:0] init_counter1;
+	reg [2:0] init_counter5;
+
+	reg data0;
+	reg data1;
+	reg data2;
+	reg data3;
+	reg data4;
+	reg data5;
+	reg data6;
+	reg data7;
+
+	always @ (negedge reset, negedge controller_pin1)
+	begin
+		if (!reset)
+		begin
+			bit_counter1 = 0;
+			init_counter1 = 0;
+		end else
+		begin
+			if (init_counter1 < 1)
+			begin
+				init_counter1 = 1;
+			end else if (init_counter1 == 1 && init_counter5 == 5)
+			begin
+				case (bit_counter1)
+					0: data0 = controller_pin5;
+					1: data2 = controller_pin5;
+					2: data4 = controller_pin5;
+					3: data6 = controller_pin5;
+				endcase
+				bit_counter1 = bit_counter1+1;
+			end
+		end
+	end	
+
+	always @ (negedge reset, negedge controller_pin5)
+	begin
+		if (!reset)
+		begin
+			bit_counter5 = 0;
+			init_counter5 = 0;
+			clock = 1;
+		end else
+		begin
+			if (init_counter5 < 5)
+			begin
+				init_counter5 = init_counter5 + 1;
+			end else if (init_counter1 == 1 && init_counter5 == 5)
+			begin
+				case (bit_counter5)
+					0: data1 = controller_pin1;
+					1: data3 = controller_pin1;
+					2: data5 = controller_pin1;
+					3: data7 = controller_pin1;
+				endcase
+				bit_counter5 = bit_counter5+1;
+				if (bit_counter1 == 0 && bit_counter5 == 0)
+				begin
+					data = {data0, data1, data2, data3, data4, data5, data6, data7};
+					clock = 0;
+				end 
+				else if (bit_counter5 == 2)
+					clock = 1;
+			end
+		end
+	end	
+endmodule