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| author | Alexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com> | 2022-11-02 19:31:12 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-11-02 19:31:12 +0300 |
| commit | 9962be0f6ae9e745bdc571359485aa688f6210c1 (patch) | |
| tree | 858563359734900e1334a4b16ca0004ab0776c2a | |
| parent | 900dcf906661e56c9d95bc1859e9f239c93be4a0 (diff) | |
Update README.md
| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -3,7 +3,7 @@ ## Overview
-This is a advanced dumper/writer for Famicom/NES cartridges and Famicom Disc System cards. The goal of the project is to create an ideal famicom data bus simulator. It's using a very accurate M2 cycle simulation and FSMC (Flexible Static Memory Controller) to access PRG and CHR memory. FSMC is precisely synchronized with the M2 clock signal using a CPLD chip. Also, this device is very fast.
+This is a powerfull dumper/writer for Famicom/NES cartridges and Famicom Disc System cards. The goal of the project is to create an ideal famicom data bus simulator. It's using a very accurate M2 cycle simulation and FSMC (Flexible Static Memory Controller) to access PRG and CHR memory. FSMC is precisely synchronized with the M2 clock signal using a CPLD chip. Also, this device is very fast.
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