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Diffstat (limited to 'FamicomDumperBootloader/Core/Src/stm32f1xx_hal_msp.c')
-rw-r--r--FamicomDumperBootloader/Core/Src/stm32f1xx_hal_msp.c267
1 files changed, 267 insertions, 0 deletions
diff --git a/FamicomDumperBootloader/Core/Src/stm32f1xx_hal_msp.c b/FamicomDumperBootloader/Core/Src/stm32f1xx_hal_msp.c
new file mode 100644
index 0000000..d32a39d
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+++ b/FamicomDumperBootloader/Core/Src/stm32f1xx_hal_msp.c
@@ -0,0 +1,267 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f1xx_hal_msp.c
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_tim5_ch3_up;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+ /**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_AFIO_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
+ */
+ __HAL_AFIO_REMAP_SWJ_NOJTAG();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM1)
+ {
+ /* USER CODE BEGIN TIM1_MspInit 0 */
+
+ /* USER CODE END TIM1_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM1_CLK_ENABLE();
+ /* USER CODE BEGIN TIM1_MspInit 1 */
+
+ /* USER CODE END TIM1_MspInit 1 */
+ }
+ else if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspInit 0 */
+
+ /* USER CODE END TIM2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ /* USER CODE BEGIN TIM2_MspInit 1 */
+
+ /* USER CODE END TIM2_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_PWM MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
+{
+ if(htim_pwm->Instance==TIM5)
+ {
+ /* USER CODE BEGIN TIM5_MspInit 0 */
+
+ /* USER CODE END TIM5_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM5_CLK_ENABLE();
+
+ /* TIM5 DMA Init */
+ /* TIM5_CH3_UP Init */
+ hdma_tim5_ch3_up.Instance = DMA2_Channel2;
+ hdma_tim5_ch3_up.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_tim5_ch3_up.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_tim5_ch3_up.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_tim5_ch3_up.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+ hdma_tim5_ch3_up.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_tim5_ch3_up.Init.Mode = DMA_NORMAL;
+ hdma_tim5_ch3_up.Init.Priority = DMA_PRIORITY_VERY_HIGH;
+ if (HAL_DMA_Init(&hdma_tim5_ch3_up) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Several peripheral DMA handle pointers point to the same DMA handle.
+ Be aware that there is only one channel to perform all the requested DMAs. */
+ __HAL_LINKDMA(htim_pwm,hdma[TIM_DMA_ID_CC3],hdma_tim5_ch3_up);
+ __HAL_LINKDMA(htim_pwm,hdma[TIM_DMA_ID_UPDATE],hdma_tim5_ch3_up);
+
+ /* USER CODE BEGIN TIM5_MspInit 1 */
+
+ /* USER CODE END TIM5_MspInit 1 */
+ }
+
+}
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(htim->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspPostInit 0 */
+
+ /* USER CODE END TIM2_MspPostInit 0 */
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**TIM2 GPIO Configuration
+ PA0-WKUP ------> TIM2_CH1
+ */
+ GPIO_InitStruct.Pin = M2_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(M2_GPIO_Port, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM2_MspPostInit 1 */
+
+ /* USER CODE END TIM2_MspPostInit 1 */
+ }
+ else if(htim->Instance==TIM5)
+ {
+ /* USER CODE BEGIN TIM5_MspPostInit 0 */
+
+ /* USER CODE END TIM5_MspPostInit 0 */
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**TIM5 GPIO Configuration
+ PA2 ------> TIM5_CH3
+ */
+ GPIO_InitStruct.Pin = WS2812_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(WS2812_GPIO_Port, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM5_MspPostInit 1 */
+
+ /* USER CODE END TIM5_MspPostInit 1 */
+ }
+
+}
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM1)
+ {
+ /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+ /* USER CODE END TIM1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM1_CLK_DISABLE();
+ /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+ /* USER CODE END TIM1_MspDeInit 1 */
+ }
+ else if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+ /* USER CODE END TIM2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM2_CLK_DISABLE();
+ /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+ /* USER CODE END TIM2_MspDeInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_PWM MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
+{
+ if(htim_pwm->Instance==TIM5)
+ {
+ /* USER CODE BEGIN TIM5_MspDeInit 0 */
+
+ /* USER CODE END TIM5_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM5_CLK_DISABLE();
+
+ /* TIM5 DMA DeInit */
+ HAL_DMA_DeInit(htim_pwm->hdma[TIM_DMA_ID_CC3]);
+ HAL_DMA_DeInit(htim_pwm->hdma[TIM_DMA_ID_UPDATE]);
+ /* USER CODE BEGIN TIM5_MspDeInit 1 */
+
+ /* USER CODE END TIM5_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */