Welcome to mirror list, hosted at ThFree Co, Russian Federation.

github.com/ClusterM/famicom-dumper-writer.git - Unnamed repository; edit this file 'description' to name the repository.
summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat (limited to 'STM32/Core/Src/main.c')
-rw-r--r--STM32/Core/Src/main.c153
1 files changed, 79 insertions, 74 deletions
diff --git a/STM32/Core/Src/main.c b/STM32/Core/Src/main.c
index b1ed729..263803f 100644
--- a/STM32/Core/Src/main.c
+++ b/STM32/Core/Src/main.c
@@ -44,7 +44,7 @@
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
- TIM_HandleTypeDef htim1;
+TIM_HandleTypeDef htim1;
TIM_HandleTypeDef htim2;
TIM_HandleTypeDef htim3;
TIM_HandleTypeDef htim4;
@@ -85,9 +85,9 @@ int _write(int file, char *ptr, int len)
/* USER CODE END 0 */
/**
- * @brief The application entry point.
- * @retval int
- */
+ * @brief The application entry point.
+ * @retval int
+ */
int main(void)
{
/* USER CODE BEGIN 1 */
@@ -149,7 +149,7 @@ int main(void)
switch (comm_recv_command)
{
case COMMAND_PRG_INIT:
- comm_start(COMMAND_PRG_STARTED, 9);
+ comm_start(COMMAND_PRG_STARTED, 13);
comm_send_byte(PROTOCOL_VERSION);
comm_send_byte(0xFF);
comm_send_byte(0xFF); // unlimited send buffer
@@ -157,12 +157,19 @@ int main(void)
comm_send_byte(((RECV_BUFFER_SIZE - 5) >> 8) & 0xFF);
comm_send_byte(FIRMWARE_VERSION_MAJOR & 0xFF);
comm_send_byte((FIRMWARE_VERSION_MAJOR >> 8) & 0xFF);
- comm_send_byte(FIRMWARE_VERSION_MINOR & 0xFF);
- comm_send_byte((FIRMWARE_VERSION_MINOR >> 8) & 0xFF);
- comm_send_byte(FIRMWARE_VERSION_MAJOR & 0xFF);
- comm_send_byte((FIRMWARE_VERSION_MAJOR >> 8) & 0xFF);
- comm_send_byte(FIRMWARE_VERSION_MINOR & 0xFF);
- comm_send_byte((FIRMWARE_VERSION_MINOR >> 8) & 0xFF);
+ comm_send_byte(FIRMWARE_VERSION_MINOR);
+ comm_send_byte(FIRMWARE_VERSION_SUFFIX);
+#ifndef DEBUG
+ comm_send_byte(HARDWARE_VERSION[0]);
+ comm_send_byte(HARDWARE_VERSION[1]);
+ comm_send_byte(HARDWARE_VERSION[2]);
+ comm_send_byte(HARDWARE_VERSION[3]);
+#else
+ comm_send_byte(0);
+ comm_send_byte(0);
+ comm_send_byte(0);
+ comm_send_byte(0);
+#endif
set_coolboy_gpio_mode(0);
break;
@@ -231,8 +238,7 @@ int main(void)
break;
case COMMAND_FDS_WRITE_REQUEST:
- fds_transfer(0, 0, recv_buffer[0], (uint8_t*) &recv_buffer[1], (uint16_t*) &recv_buffer[1 + recv_buffer[0]],
- (uint8_t*) &recv_buffer[1 + recv_buffer[0] + recv_buffer[0] * 2]);
+ fds_transfer(0, 0, recv_buffer[0], (uint8_t*) &recv_buffer[1], (uint16_t*) &recv_buffer[1 + recv_buffer[0]], (uint8_t*) &recv_buffer[1 + recv_buffer[0] + recv_buffer[0] * 2]);
break;
case COMMAND_MIRRORING_REQUEST:
@@ -245,7 +251,7 @@ int main(void)
break;
case COMMAND_SET_COOLBOY_GPIO_MODE:
- set_coolboy_gpio_mode(recv_buffer[0]);
+ set_coolboy_gpio_mode(recv_buffer[0]);
comm_start(COMMAND_SET_VALUE_DONE, 0);
break;
}
@@ -259,18 +265,18 @@ int main(void)
}
/**
- * @brief System Clock Configuration
- * @retval None
- */
+ * @brief System Clock Configuration
+ * @retval None
+ */
void SystemClock_Config(void)
{
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 };
/** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
+ * in the RCC_OscInitTypeDef structure.
+ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
@@ -284,9 +290,8 @@ void SystemClock_Config(void)
}
/** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
@@ -306,10 +311,10 @@ void SystemClock_Config(void)
}
/**
- * @brief TIM1 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM1 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM1_Init(void)
{
@@ -317,8 +322,8 @@ static void MX_TIM1_Init(void)
/* USER CODE END TIM1_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
/* USER CODE BEGIN TIM1_Init 1 */
@@ -352,10 +357,10 @@ static void MX_TIM1_Init(void)
}
/**
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM2 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM2_Init(void)
{
@@ -363,9 +368,9 @@ static void MX_TIM2_Init(void)
/* USER CODE END TIM2_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
+ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
+ TIM_OC_InitTypeDef sConfigOC = { 0 };
/* USER CODE BEGIN TIM2_Init 1 */
@@ -411,10 +416,10 @@ static void MX_TIM2_Init(void)
}
/**
- * @brief TIM3 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM3 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM3_Init(void)
{
@@ -422,8 +427,8 @@ static void MX_TIM3_Init(void)
/* USER CODE END TIM3_Init 0 */
- TIM_SlaveConfigTypeDef sSlaveConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_SlaveConfigTypeDef sSlaveConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
/* USER CODE BEGIN TIM3_Init 1 */
@@ -457,10 +462,10 @@ static void MX_TIM3_Init(void)
}
/**
- * @brief TIM4 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM4 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM4_Init(void)
{
@@ -468,8 +473,8 @@ static void MX_TIM4_Init(void)
/* USER CODE END TIM4_Init 0 */
- TIM_SlaveConfigTypeDef sSlaveConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_SlaveConfigTypeDef sSlaveConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
/* USER CODE BEGIN TIM4_Init 1 */
@@ -503,10 +508,10 @@ static void MX_TIM4_Init(void)
}
/**
- * @brief TIM5 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM5 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM5_Init(void)
{
@@ -514,9 +519,9 @@ static void MX_TIM5_Init(void)
/* USER CODE END TIM5_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
+ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
+ TIM_OC_InitTypeDef sConfigOC = { 0 };
/* USER CODE BEGIN TIM5_Init 1 */
@@ -562,8 +567,8 @@ static void MX_TIM5_Init(void)
}
/**
- * Enable DMA controller clock
- */
+ * Enable DMA controller clock
+ */
static void MX_DMA_Init(void)
{
@@ -578,13 +583,13 @@ static void MX_DMA_Init(void)
}
/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_GPIO_Init(void)
{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
+ GPIO_InitTypeDef GPIO_InitStruct = { 0 };
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
@@ -614,7 +619,7 @@ static void MX_GPIO_Init(void)
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : CIRAM_CE_Pin CIRAM_A10_Pin */
- GPIO_InitStruct.Pin = CIRAM_CE_Pin|CIRAM_A10_Pin;
+ GPIO_InitStruct.Pin = CIRAM_CE_Pin | CIRAM_A10_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
@@ -642,14 +647,14 @@ static void MX_FSMC_Init(void)
/* USER CODE END FSMC_Init 0 */
- FSMC_NORSRAM_TimingTypeDef Timing = {0};
+ FSMC_NORSRAM_TimingTypeDef Timing = { 0 };
/* USER CODE BEGIN FSMC_Init 1 */
/* USER CODE END FSMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
- */
+ */
hsram1.Instance = FSMC_NORSRAM_DEVICE;
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
@@ -678,11 +683,11 @@ static void MX_FSMC_Init(void)
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
- Error_Handler( );
+ Error_Handler();
}
/** Perform the SRAM2 memory initialization sequence
- */
+ */
hsram2.Instance = FSMC_NORSRAM_DEVICE;
hsram2.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
/* hsram2.Init */
@@ -711,11 +716,11 @@ static void MX_FSMC_Init(void)
if (HAL_SRAM_Init(&hsram2, &Timing, NULL) != HAL_OK)
{
- Error_Handler( );
+ Error_Handler();
}
/** Disconnect NADV
- */
+ */
__HAL_AFIO_FSMCNADV_DISCONNECTED();
@@ -729,9 +734,9 @@ static void MX_FSMC_Init(void)
/* USER CODE END 4 */
/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */