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authorAlexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com>2020-11-19 17:51:34 +0300
committerAlexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com>2020-11-19 17:51:34 +0300
commita7d726d601d4019ef7fc19b2671f046314e15dd7 (patch)
treeb8cd81b039a77e9b89ba65a01c0ca95ba9fd5b6d
First commit
-rw-r--r--.gitignore7
-rw-r--r--.gitmodules3
-rw-r--r--Makefile40
-rw-r--r--bg.pngbin0 -> 6336 bytes
-rw-r--r--bg.psdbin0 -> 119164 bytes
-rw-r--r--bits.pngbin0 -> 1799 bytes
-rw-r--r--controller.asm912
m---------tools_sources/NesTiler0
8 files changed, 962 insertions, 0 deletions
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..347990a
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,7 @@
+tools/
+*.nes
+*.deb
+*.lst
+*.nl
+*.bin
+
diff --git a/.gitmodules b/.gitmodules
new file mode 100644
index 0000000..f6f8dd0
--- /dev/null
+++ b/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "tools_sources/NesTiler"]
+ path = tools_sources/NesTiler
+ url = https://github.com/ClusterM/NesTiler.git
diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..cfff82f
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,40 @@
+NESASM=tools/NESASM.EXE
+EMU=fceux
+TILER=tools/NesTiler.exe
+TEXT_CONVERTER=tools/TextConverter.exe
+SOURCE=controller.asm
+EXECUTABLE=controller.nes
+BG_IMAGE=bg.png
+BITS_IMAGE=bits.png
+
+BG_PATTERN=bg_pattern_table.bin
+BG_NAME_TABLE=bg_name_table.bin
+BG_ATTR_TABLE=bg_attr_table.bin
+BITS_PATTERN=bits_pattern_table.bin
+PALETTE0=palette0.bin
+PALETTE1=palette1.bin
+
+all: $(EXECUTABLE)
+
+build: $(EXECUTABLE)
+
+$(EXECUTABLE): $(SOURCE) $(BG_PATTERN) $(BG_NAME_TABLE) $(BITS_PATTERN) $(PALETTE0) $(PALETTE1)
+ rm -f $(EXECUTABLE)
+ $(NESASM) $(SOURCE) -o $(EXECUTABLE) --symbols=$(EXECUTABLE) -iWss
+
+clean:
+ rm -f $(EXECUTABLE) *.lst *.nl *.bin
+
+run: $(EXECUTABLE)
+ $(EMU) $(EXECUTABLE)
+
+$(BG_PATTERN) $(BG_NAME_TABLE) $(BITS_PATTERN) $(PALETTE0) $(PALETTE1): $(BG_IMAGE) $(BITS_IMAGE)
+ $(TILER) -i0 $(BG_IMAGE) -i1 $(BITS_IMAGE) --enable-palettes 0,1 \
+ --out-pattern-table0 $(BG_PATTERN) \
+ --out-pattern-table1 $(BITS_PATTERN) \
+ --out-name-table0 $(BG_NAME_TABLE) \
+ --out-attribute-table0 $(BG_ATTR_TABLE) \
+ --bgcolor \#FFFFFF --palette1 \#0000FF \
+ --out-palette0 $(PALETTE0) --out-palette1 $(PALETTE1)
+
+.PHONY: clean
diff --git a/bg.png b/bg.png
new file mode 100644
index 0000000..78c351c
--- /dev/null
+++ b/bg.png
Binary files differ
diff --git a/bg.psd b/bg.psd
new file mode 100644
index 0000000..07297dc
--- /dev/null
+++ b/bg.psd
Binary files differ
diff --git a/bits.png b/bits.png
new file mode 100644
index 0000000..4d55e69
--- /dev/null
+++ b/bits.png
Binary files differ
diff --git a/controller.asm b/controller.asm
new file mode 100644
index 0000000..47ae350
--- /dev/null
+++ b/controller.asm
@@ -0,0 +1,912 @@
+; INES header stuff
+ .inesprg 1 ; 1 banks of PRG (16kbytes)
+ .ineschr 1 ; 1 bank of CHR (8kbytes)
+ .inesmir 0 ; mirroring doesn't matter
+ .inesmap 0 ; we use mapper 0 (no mapper)
+
+ .rsset $0000 ; set the initial value of
+ ; the RS internal counter
+COPY_SOURCE_ADDR .rs 2
+COPY_DEST_ADDR .rs 2
+
+ .bank 1 ; following goes in bank 1
+ .org $FFFA ; start at $FFFA
+ .dw NMI
+ .dw Start
+ .dw IRQ
+
+ .bank 0
+ .org $C000 ; code starts at $C000
+
+Start:
+ sei ; no interrupts
+
+ ; reset stack
+ ldx #$FF
+ txs
+
+ lda #%00000000 ; PPU disabled
+ sta PPUCTRL
+ sta PPUMASK
+ jsr waitblank
+
+ ; clean memory
+ lda #$00
+ sta <COPY_SOURCE_ADDR
+ sta <COPY_SOURCE_ADDR+1
+ ldy #$02
+ ldx #$08
+.loop:
+ sta [COPY_SOURCE_ADDR], y
+ iny
+ bne .loop
+ inc <COPY_SOURCE_ADDR+1
+ dex
+ bne .loop
+
+ ; loading palette
+load_palette:
+ jsr waitblank
+ lda #$3F
+ sta PPUADDR
+ lda #$00
+ sta PPUADDR
+ ldx #$00
+.loop:
+ lda palette, x
+ sta PPUDATA
+ inx
+ cpx #8
+ bne .loop
+
+ ; loading nametable and attribute table to PPUCTRL @ PPU
+load_nametable:
+ lda #LOW(nametable)
+ sta <COPY_SOURCE_ADDR
+ lda #HIGH(nametable)
+ sta <COPY_SOURCE_ADDR+1
+ lda PPUSTATUS
+ lda #$20
+ sta PPUADDR
+ lda #$00
+ sta PPUADDR
+ ldy #0
+ ldx #4
+.loop:
+ lda [COPY_SOURCE_ADDR], y
+ sta PPUDATA
+ iny
+ bne .loop
+ inc <COPY_SOURCE_ADDR+1
+ dex
+ bne .loop
+
+load_drawing_offsets:
+ lda #LOW(draw_offsets)
+ sta <COPY_SOURCE_ADDR
+ lda #HIGH(draw_offsets) + $E0
+ sta <COPY_SOURCE_ADDR+1
+ lda #LOW(draw_offsets)
+ sta <COPY_DEST_ADDR
+ lda #HIGH(draw_offsets)
+ sta <COPY_DEST_ADDR+1
+ ldy #0
+ ldx #32
+.loop:
+ lda [COPY_SOURCE_ADDR], y
+ sta [COPY_DEST_ADDR], y
+ iny
+ dex
+ bne .loop
+
+load_drawing_routine:
+ lda #LOW(draw_bits)
+ sta <COPY_SOURCE_ADDR
+ lda #HIGH(draw_bits) + $E0
+ sta <COPY_SOURCE_ADDR+1
+ lda #LOW(draw_bits)
+ sta <COPY_DEST_ADDR
+ lda #HIGH(draw_bits)
+ sta <COPY_DEST_ADDR+1
+ ldy #0
+ ldx #6
+.loop:
+ lda [COPY_SOURCE_ADDR], y
+ sta [COPY_DEST_ADDR], y
+ iny
+ bne .loop
+ inc <COPY_SOURCE_ADDR+1
+ inc <COPY_DEST_ADDR+1
+ dex
+ bne .loop
+
+ ; call it
+ jsr draw_bits
+
+ ; enable PPU
+ jsr waitblank
+ ; show background
+ lda #%00001010
+ sta PPUMASK
+
+ ; main loop
+infin:
+ jsr read_controller
+ jsr waitblank
+ jsr draw_bits
+ jsr fix_scroll
+ jmp infin
+
+read_controller:
+ ; strobe
+ ldx #1
+ stx JOY1
+ dex
+ stx JOY1
+ ldy #0
+.loop:
+ lda JOY1
+ lsr A
+ ldx #$8C
+ bcs .joy1_d0_1
+ inx
+ inx
+.joy1_d0_1:
+ pha
+ txa
+ sta [draw_offsets], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_1
+ inx
+ inx
+.joy1_d1_1:
+ pha
+ txa
+ sta [draw_offsets + 2], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_2
+ inx
+ inx
+.joy1_d1_2:
+ pha
+ txa
+ sta [draw_offsets + 4], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_3
+ inx
+ inx
+.joy1_d1_3:
+ pha
+ txa
+ sta [draw_offsets + 6], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_4
+ inx
+ inx
+.joy1_d1_4:
+ pha
+ txa
+ sta [draw_offsets + 8], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_5
+ inx
+ inx
+.joy1_d1_5:
+ pha
+ txa
+ sta [draw_offsets + 10], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_6
+ inx
+ inx
+.joy1_d1_6:
+ pha
+ txa
+ sta [draw_offsets + 12], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy1_d1_7
+ inx
+ inx
+.joy1_d1_7:
+ pha
+ txa
+ sta [draw_offsets + 14], y
+ pla
+
+ lda JOY2
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d0_1
+ inx
+ inx
+.joy2_d0_1:
+ pha
+ txa
+ sta [draw_offsets + 16], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_1
+ inx
+ inx
+.joy2_d1_1:
+ pha
+ txa
+ sta [draw_offsets + 18], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_2
+ inx
+ inx
+.joy2_d1_2:
+ pha
+ txa
+ sta [draw_offsets + 20], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_3
+ inx
+ inx
+.joy2_d1_3:
+ pha
+ txa
+ sta [draw_offsets + 22], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_4
+ inx
+ inx
+.joy2_d1_4:
+ pha
+ txa
+ sta [draw_offsets + 24], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_5
+ inx
+ inx
+.joy2_d1_5:
+ pha
+ txa
+ sta [draw_offsets + 26], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_6
+ inx
+ inx
+.joy2_d1_6:
+ pha
+ txa
+ sta [draw_offsets + 28], y
+ pla
+
+ lsr A
+ ldx #$8C
+ bcs .joy2_d1_7
+ inx
+ inx
+.joy2_d1_7:
+ pha
+ txa
+ sta [draw_offsets + 30], y
+ pla
+
+ iny
+ iny
+ iny
+ cpy #24
+ bne .not24
+ iny
+ iny
+ iny
+ .not24:
+ cpy #51
+ bne .not51
+ iny
+ iny
+ iny
+.not51:
+ cpy #78
+ beq .end
+ jmp .loop
+.end:
+ rts
+
+waitblank:
+ jsr fix_scroll
+ pha
+ bit PPUSTATUS
+.loop:
+ lda PPUSTATUS ; load A with value at location PPUSTATUS
+ bpl .loop ; if bit 7 is not set (not VBlank) keep checking
+ pla
+ rts
+
+fix_scroll:
+ ; fix scrolling
+ bit PPUSTATUS
+ lda #0
+ sta PPUSCROLL
+ sta PPUSCROLL
+ rts
+
+IRQ:
+ rti
+
+NMI:
+ rti
+
+nametable:
+ .incbin "bg_name_table.bin"
+ .org nametable + $3C0
+ .incbin "bg_attr_table.bin"
+palette:
+ .incbin "palette0.bin"
+ .incbin "palette1.bin"
+
+ .bank 1
+ .org $0100 - 32
+draw_offsets:
+ .dw draw_bits + $0013 + ($5A * 0), draw_bits + $0013 + ($5A * 1), draw_bits + $0013 + ($5A * 2), draw_bits + $0013 + ($5A * 3)
+ .dw draw_bits + $0013 + ($5A * 4), draw_bits + $0013 + ($5A * 5), draw_bits + $0013 + ($5A * 6), draw_bits + $0013 + ($5A * 7)
+ .dw draw_bits + $0013 + ($5A * 8), draw_bits + $0013 + ($5A * 9), draw_bits + $0013 + ($5A * 10), draw_bits + $0013 + ($5A * 11)
+ .dw draw_bits + $0013 + ($5A * 12), draw_bits + $0013 + ($5A * 13), draw_bits + $0013 + ($5A * 14), draw_bits + $0013 + ($5A * 15)
+
+ .org $0200
+draw_bits:
+ ldx #$FD
+ ldy #$FE
+ bit PPUSTATUS
+
+ lda #$20
+ sta PPUADDR
+ lda #$84
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$20
+ sta PPUADDR
+ lda #$A4
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$20
+ sta PPUADDR
+ lda #$C4
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$20
+ sta PPUADDR
+ lda #$E4
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$21
+ sta PPUADDR
+ lda #$04
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$21
+ sta PPUADDR
+ lda #$24
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$21
+ sta PPUADDR
+ lda #$44
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$21
+ sta PPUADDR
+ lda #$64
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$04
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$24
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$44
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$64
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$84
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$A4
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$C4
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ lda #$22
+ sta PPUADDR
+ lda #$E4
+ sta PPUADDR
+ lda #$FF
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ sta PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+ stx PPUDATA
+
+ rts
+
+ .bank 2 ; switch to bank 4 (CHR bank 0)
+ .org $0000 ; start at $0000
+ .incbin "bg_pattern_table.bin"
+ .org $0FD0
+ .incbin "bits_pattern_table.bin"
diff --git a/tools_sources/NesTiler b/tools_sources/NesTiler
new file mode 160000
+Subproject f8b7349e7b6de6b393c0c8c771c6fd5f3f6b749