diff options
| author | James Almer <jamrial@gmail.com> | 2016-07-18 01:14:12 +0300 |
|---|---|---|
| committer | James Almer <jamrial@gmail.com> | 2016-07-20 02:45:48 +0300 |
| commit | 114870dbc9394cace08fc35d8474a733a7db0e1e (patch) | |
| tree | 1b697c7f312daa08d64adb43d3e27a2833bf0d28 /configure | |
| parent | 9bf3fdcd3c21b22cdbee43ae1c15c65f973a12fe (diff) | |
configure: add support for new CPUs
Add new -march values for Intel and AMD CPUs introduced with GCC 5 and 6, and
improve SunCC flags accordingly.
Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: James Almer <jamrial@gmail.com>
Diffstat (limited to 'configure')
| -rwxr-xr-x | configure | 7 |
1 files changed, 4 insertions, 3 deletions
@@ -3801,11 +3801,11 @@ suncc_flags(){ westmere) echo -xtarget=westmere ;; silvermont) echo -xarch=sse4_2 ;; corei7-avx|sandybridge) echo -xtarget=sandybridge ;; - core-avx*|ivybridge|haswell|broadwell) + core-avx*|ivybridge|haswell|broadwell|skylake*|knl) echo -xarch=avx ;; amdfam10|barcelona) echo -xtarget=barcelona ;; btver1) echo -xarch=amdsse4a ;; - btver2|bdver*) echo -xarch=avx ;; + btver2|bdver*|znver*) echo -xarch=avx ;; athlon-4|athlon-[mx]p) echo -xarch=ssea ;; k8|opteron|athlon64|athlon-fx) echo -xarch=sse2a ;; @@ -4501,7 +4501,8 @@ elif enabled x86; then ;; # targets that do support nopl and conditional mov (cmov) i686|pentiumpro|pentium[23]|pentium-m|athlon|athlon-tbird|athlon-4|athlon-[mx]p|athlon64*|k8*|opteron*|athlon-fx\ - |core*|atom|bonnell|nehalem|westmere|silvermont|sandybridge|ivybridge|haswell|broadwell|amdfam10|barcelona|b[dt]ver*) + |core*|atom|bonnell|nehalem|westmere|silvermont|sandybridge|ivybridge|haswell|broadwell|skylake*|knl\ + |amdfam10|barcelona|b[dt]ver*|znver*) cpuflags="-march=$cpu" enable i686 enable fast_cmov |