diff options
| author | Rémi Denis-Courmont <remi@remlab.net> | 2022-10-04 20:17:18 +0300 |
|---|---|---|
| committer | Lynne <dev@lynne.ee> | 2022-10-05 07:51:11 +0300 |
| commit | f0d1637c11c91b4729d4385a4bf9c61c213d3173 (patch) | |
| tree | db7adcb08dba50c5a46deebe206f1fccace19d9b /libavcodec/riscv | |
| parent | 55bde97f29cb41c8bce30f4a6e72d18b05289184 (diff) | |
lavc/alacdsp: RISC-V V append_extra_bits[1]
Diffstat (limited to 'libavcodec/riscv')
| -rw-r--r-- | libavcodec/riscv/alacdsp_init.c | 5 | ||||
| -rw-r--r-- | libavcodec/riscv/alacdsp_rvv.S | 27 |
2 files changed, 32 insertions, 0 deletions
diff --git a/libavcodec/riscv/alacdsp_init.c b/libavcodec/riscv/alacdsp_init.c index 37688be67b..fa8a7c8129 100644 --- a/libavcodec/riscv/alacdsp_init.c +++ b/libavcodec/riscv/alacdsp_init.c @@ -31,6 +31,10 @@ void ff_alac_append_extra_bits_mono_rvv(int32_t *buffer[2], int32_t *extra_bits_buf[2], int extra_bits, int channels, int nb_samples); +void ff_alac_append_extra_bits_stereo_rvv(int32_t *buffer[2], + int32_t *extra_bits_buf[2], + int extra_bits, int channels, + int nb_samples); av_cold void ff_alacdsp_init_riscv(ALACDSPContext *c) { @@ -40,6 +44,7 @@ av_cold void ff_alacdsp_init_riscv(ALACDSPContext *c) if (flags & AV_CPU_FLAG_RVV_I32) { c->decorrelate_stereo = ff_alac_decorrelate_stereo_rvv; c->append_extra_bits[0] = ff_alac_append_extra_bits_mono_rvv; + c->append_extra_bits[1] = ff_alac_append_extra_bits_stereo_rvv; } #endif } diff --git a/libavcodec/riscv/alacdsp_rvv.S b/libavcodec/riscv/alacdsp_rvv.S index 7478ab228b..21b89ca0e7 100644 --- a/libavcodec/riscv/alacdsp_rvv.S +++ b/libavcodec/riscv/alacdsp_rvv.S @@ -61,4 +61,31 @@ func ff_alac_append_extra_bits_mono_rvv, zve32x ret endfunc + +func ff_alac_append_extra_bits_stereo_rvv, zve32x + ld a6, 8(a0) + ld a0, (a0) + ld a7, 8(a1) + ld a1, (a1) +1: + vsetvli t0, a4, e32, m1, ta, ma + vle32.v v16, (a0) + sub a4, a4, t0 + vle32.v v0, (a6) + vsll.vx v16, v16, a2 + vsll.vx v0, v0, a2 + vle32.v v24, (a1) + sh2add a1, t0, a1 + vle32.v v8, (a7) + sh2add a7, t0, a7 + vor.vv v16, v24, v16 + vor.vv v0, v8, v0 + vse32.v v16, (a0) + sh2add a0, t0, a0 + vse32.v v0, (a6) + sh2add a6, t0, a6 + bnez a4, 1b + + ret +endfunc #endif |