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author | Sam Guyer <sam.guyer@gmail.com> | 2021-03-15 18:54:07 +0300 |
---|---|---|
committer | GitHub <noreply@github.com> | 2021-03-15 18:54:07 +0300 |
commit | 56deb896330535bca2670bcbf9c6b5b3fbd73875 (patch) | |
tree | 77b8a262b9fd1da0c90a8e363f26b239808e2a94 | |
parent | d3383df89de0e029d30249f7d092d60ec8f081c6 (diff) | |
parent | 2265bc6f5238e31914b122dc85af10256bc943b4 (diff) |
Merge pull request #1181 from chroma-tech/fix_rmt_esp32s2
Fixed ESP32 clockless RMT to work on ESP32S2
-rw-r--r-- | src/platforms/esp/32/clockless_rmt_esp32.cpp | 4 | ||||
-rw-r--r-- | src/platforms/esp/32/clockless_rmt_esp32.h | 6 |
2 files changed, 9 insertions, 1 deletions
diff --git a/src/platforms/esp/32/clockless_rmt_esp32.cpp b/src/platforms/esp/32/clockless_rmt_esp32.cpp index 9fbdab59..42db3415 100644 --- a/src/platforms/esp/32/clockless_rmt_esp32.cpp +++ b/src/platforms/esp/32/clockless_rmt_esp32.cpp @@ -328,7 +328,11 @@ void IRAM_ATTR ESP32RMTController::interruptHandler(void *arg) for (channel = 0; channel < gMaxChannel; channel++) { int tx_done_bit = channel * 3; + #ifdef CONFIG_IDF_TARGET_ESP32S2 + int tx_next_bit = channel + 12; + #else int tx_next_bit = channel + 24; + #endif ESP32RMTController * pController = gOnChannel[channel]; if (pController != NULL) { diff --git a/src/platforms/esp/32/clockless_rmt_esp32.h b/src/platforms/esp/32/clockless_rmt_esp32.h index faa31dc5..2a8555ab 100644 --- a/src/platforms/esp/32/clockless_rmt_esp32.h +++ b/src/platforms/esp/32/clockless_rmt_esp32.h @@ -188,10 +188,14 @@ __attribute__ ((always_inline)) inline static uint32_t __clock_cycles() { #define FASTLED_RMT_MAX_CONTROLLERS 32 #endif -// -- Max RMT channel (default to 8) +// -- Max RMT channel (default to 8 on ESP32 and 4 on ESP32-S2) #ifndef FASTLED_RMT_MAX_CHANNELS +#ifdef CONFIG_IDF_TARGET_ESP32S2 +#define FASTLED_RMT_MAX_CHANNELS 4 +#else #define FASTLED_RMT_MAX_CHANNELS 8 #endif +#endif class ESP32RMTController { |