diff options
| author | Daniel Garcia <danielgarcia@gmail.com> | 2017-08-17 00:50:04 +0300 |
|---|---|---|
| committer | Daniel Garcia <danielgarcia@gmail.com> | 2017-08-17 00:50:04 +0300 |
| commit | 6f445905267b0b1c4d1fd9f2a8ee6cb0ce6e968b (patch) | |
| tree | 612046d876280bc55c12b28468f72aaa6e9a0ef3 | |
| parent | 06521a48e9febdea8dbf3a5520620a578c051f95 (diff) | |
Pull the SPI race condition fix over to the teensy 3.6 spi code as well. Fixes #419 for teensy 3.6 as wellv3.1.6
| -rw-r--r-- | platforms/arm/k66/fastspi_arm_k66.h | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/platforms/arm/k66/fastspi_arm_k66.h b/platforms/arm/k66/fastspi_arm_k66.h index b13f0ddc..7e598cff 100644 --- a/platforms/arm/k66/fastspi_arm_k66.h +++ b/platforms/arm/k66/fastspi_arm_k66.h @@ -285,13 +285,19 @@ public: static void waitFully() __attribute__((always_inline)) { // Wait for the last byte to get shifted into the register - cli(); - while( (SPIX.SR & 0xF000) > 0) { - // reset the TCF flag - SPIX.SR |= SPI_SR_TCF; - } - sei(); - + bool empty = false; + + do { + cli(); + if ((SPIX.SR & 0xF000) > 0) { + // reset the TCF flag + SPIX.SR |= SPI_SR_TCF; + } else { + empty = true; + } + sei(); + } while (!empty); + // wait for the TCF flag to get set while (!(SPIX.SR & SPI_SR_TCF)); SPIX.SR |= (SPI_SR_TCF | SPI_SR_EOQF); |