diff options
author | Craig Link <craigl@zillowgroup.com> | 2021-03-18 20:07:00 +0300 |
---|---|---|
committer | Craig Link <craigl@zillowgroup.com> | 2021-03-18 20:07:00 +0300 |
commit | c784b2456782afe1afd551ddc60eb53213e5d46f (patch) | |
tree | 8cb7fe9a0929b4a7e18f2e451a6e98fceecca847 /src | |
parent | ba1e3583c8768e25ba28b36e0141a09ed6b54fca (diff) | |
parent | 2cb3ca46c78c7dcf17007975427c2318721b0961 (diff) |
fix merge conflict
Diffstat (limited to 'src')
-rw-r--r-- | src/led_sysdefs.h | 2 | ||||
-rw-r--r-- | src/platforms.h | 2 | ||||
-rw-r--r-- | src/platforms/arm/d51/fastpin_arm_d51.h | 35 | ||||
-rw-r--r-- | src/platforms/arm/stm32/clockless_arm_stm32.h | 21 | ||||
-rw-r--r-- | src/platforms/arm/stm32/fastpin_arm_stm32.h | 62 | ||||
-rw-r--r-- | src/platforms/arm/stm32/led_sysdefs_arm_stm32.h | 13 | ||||
-rw-r--r-- | src/platforms/avr/clockless_trinket.h | 17 | ||||
-rw-r--r-- | src/platforms/avr/fastpin_avr.h | 22 | ||||
-rw-r--r-- | src/platforms/esp/32/clockless_rmt_esp32.cpp | 4 | ||||
-rw-r--r-- | src/platforms/esp/32/clockless_rmt_esp32.h | 6 |
10 files changed, 153 insertions, 31 deletions
diff --git a/src/led_sysdefs.h b/src/led_sysdefs.h index d1b1ddab..5db322f8 100644 --- a/src/led_sysdefs.h +++ b/src/led_sysdefs.h @@ -24,7 +24,7 @@ #elif defined(__SAM3X8E__) // Include sam/due headers #include "platforms/arm/sam/led_sysdefs_arm_sam.h" -#elif defined(STM32F10X_MD) || defined(__STM32F1__) +#elif defined(STM32F10X_MD) || defined(__STM32F1__) || defined(STM32F2XX) #include "platforms/arm/stm32/led_sysdefs_arm_stm32.h" #elif defined(__SAMD21G18A__) || defined(__SAMD21J18A__) || defined(__SAMD21E17A__) || defined(__SAMD21E18A__) #include "platforms/arm/d21/led_sysdefs_arm_d21.h" diff --git a/src/platforms.h b/src/platforms.h index 8953ceff..5351e2c1 100644 --- a/src/platforms.h +++ b/src/platforms.h @@ -24,7 +24,7 @@ #elif defined(__SAM3X8E__) // Include sam/due headers #include "platforms/arm/sam/fastled_arm_sam.h" -#elif defined(STM32F10X_MD) || defined(__STM32F1__) +#elif defined(STM32F10X_MD) || defined(__STM32F1__) || defined(STM32F2XX) #include "platforms/arm/stm32/fastled_arm_stm32.h" #elif defined(__SAMD21G18A__) || defined(__SAMD21J18A__) || defined(__SAMD21E17A__) || defined(__SAMD21E18A__) #include "platforms/arm/d21/fastled_arm_d21.h" diff --git a/src/platforms/arm/d51/fastpin_arm_d51.h b/src/platforms/arm/d51/fastpin_arm_d51.h index c2a34cc4..6fb5682f 100644 --- a/src/platforms/arm/d51/fastpin_arm_d51.h +++ b/src/platforms/arm/d51/fastpin_arm_d51.h @@ -59,7 +59,7 @@ public: #define _FL_IO(L) _RD32(GPIO ## L) -#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, L> {}; +#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1ul << BIT, L> {}; // Actual pin definitions #if defined(ADAFRUIT_ITSYBITSY_M4_EXPRESS) @@ -143,10 +143,41 @@ _FL_DEFPIN(PIN_SPI_MISO, 0, 1); _FL_DEFPIN(PIN_SPI_MOSI, 2, 1); _FL_DEFPIN(PIN_S #define SPI_DATA PIN_SPI_MOSI #define SPI_CLOCK PIN_SPI_SCK - #define ARDUNIO_CORE_SPI #define HAS_HARDWARE_PIN_SUPPORT 1 +#elif defined(ADAFRUIT_MATRIXPORTAL_M4_EXPRESS) + +#define MAX_PIN 21 +// 0/1 - SERCOM/UART (Serial1) +_FL_DEFPIN( 0, 1, 0); _FL_DEFPIN( 1, 0, 0); +// 2..3 buttons +_FL_DEFPIN( 2, 22, 1); _FL_DEFPIN( 3, 23, 1); +// 4 neopixel +_FL_DEFPIN( 4, 23, 0); +// SDA/SCL +_FL_DEFPIN( 5, 31, 1); _FL_DEFPIN( 6, 30, 1); +// 7..12 RGBRGB pins +_FL_DEFPIN( 7, 0, 1); _FL_DEFPIN( 8, 1, 1); _FL_DEFPIN( 9, 2, 1); _FL_DEFPIN(10, 3, 1); +_FL_DEFPIN(11, 4, 1); _FL_DEFPIN(12, 5, 1); +// 13 LED +_FL_DEFPIN(13, 14, 0); +// 14..21 Control pins +_FL_DEFPIN(14, 6, 1); _FL_DEFPIN(15, 14, 1); _FL_DEFPIN(16, 12, 1); _FL_DEFPIN(17, 7, 1); +_FL_DEFPIN(18, 8, 1); _FL_DEFPIN(19, 9, 1); _FL_DEFPIN(20, 15, 1); _FL_DEFPIN(21, 13, 1); +// 22..26 Analog pins +_FL_DEFPIN(22, 2, 1); _FL_DEFPIN(23, 5, 1); _FL_DEFPIN(24, 4, 1); _FL_DEFPIN(25, 6, 1); +_FL_DEFPIN(26, 7, 1); +// 34..36 ESP SPI +_FL_DEFPIN(34, 16, 0); _FL_DEFPIN(35, 17, 0); _FL_DEFPIN(36, 19, 0); +// 48..50 external SPI #2 on sercom 0 +_FL_DEFPIN(48, 5, 0); _FL_DEFPIN(49, 4, 0); _FL_DEFPIN(50, 7, 0); + +#define SPI_DATA 4 +#define SPI_CLOCK 7 + +#define HAS_HARDWARE_PIN_SUPPORT 1 + #endif diff --git a/src/platforms/arm/stm32/clockless_arm_stm32.h b/src/platforms/arm/stm32/clockless_arm_stm32.h index 0ac8a5d4..d87b78c6 100644 --- a/src/platforms/arm/stm32/clockless_arm_stm32.h +++ b/src/platforms/arm/stm32/clockless_arm_stm32.h @@ -7,6 +7,13 @@ FASTLED_NAMESPACE_BEGIN #define FASTLED_HAS_CLOCKLESS 1 +#if defined(STM32F2XX) +// The photon runs faster than the others +#define ADJ 8 +#else +#define ADJ 20 +#endif + template <int DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 50> class ClocklessController : public CPixelLEDController<RGB_ORDER> { typedef typename FastPin<DATA_PIN>::port_ptr_t data_ptr_t; @@ -23,7 +30,7 @@ public: mPort = FastPin<DATA_PIN>::port(); } - virtual uint16_t getMaxRefreshRate() const { return 400; } + virtual uint16_t getMaxRefreshRate() const { return 400; } protected: virtual void showPixels(PixelController<RGB_ORDER> & pixels) { @@ -39,28 +46,28 @@ protected: template<int BITS> __attribute__ ((always_inline)) inline static void writeBits(register uint32_t & next_mark, register data_ptr_t port, register data_t hi, register data_t lo, register uint8_t & b) { for(register uint32_t i = BITS-1; i > 0; --i) { - while(_CYCCNT < (T1+T2+T3-20)); + while(_CYCCNT < (T1+T2+T3-ADJ)); FastPin<DATA_PIN>::fastset(port, hi); _CYCCNT = 4; if(b&0x80) { - while(_CYCCNT < (T1+T2-20)); + while(_CYCCNT < (T1+T2-ADJ)); FastPin<DATA_PIN>::fastset(port, lo); } else { - while(_CYCCNT < (T1-10)); + while(_CYCCNT < (T1-ADJ/2)); FastPin<DATA_PIN>::fastset(port, lo); } b <<= 1; } - while(_CYCCNT < (T1+T2+T3-20)); + while(_CYCCNT < (T1+T2+T3-ADJ)); FastPin<DATA_PIN>::fastset(port, hi); _CYCCNT = 4; if(b&0x80) { - while(_CYCCNT < (T1+T2-20)); + while(_CYCCNT < (T1+T2-ADJ)); FastPin<DATA_PIN>::fastset(port, lo); } else { - while(_CYCCNT < (T1-10)); + while(_CYCCNT < (T1-ADJ/2)); FastPin<DATA_PIN>::fastset(port, lo); } } diff --git a/src/platforms/arm/stm32/fastpin_arm_stm32.h b/src/platforms/arm/stm32/fastpin_arm_stm32.h index bc69912c..548fdc9d 100644 --- a/src/platforms/arm/stm32/fastpin_arm_stm32.h +++ b/src/platforms/arm/stm32/fastpin_arm_stm32.h @@ -35,9 +35,14 @@ public: inline static void setOutput() { pinMode(PIN, OUTPUT); } // TODO: perform MUX config { _PDDR::r() |= _MASK; } inline static void setInput() { pinMode(PIN, INPUT); } // TODO: preform MUX config { _PDDR::r() &= ~_MASK; } +#if defined(STM32F2XX) + inline static void hi() __attribute__ ((always_inline)) { _GPIO::r()->BSRRL = _MASK; } + inline static void lo() __attribute__ ((always_inline)) { _GPIO::r()->BSRRH = _MASK; } +#else inline static void hi() __attribute__ ((always_inline)) { _GPIO::r()->BSRR = _MASK; } inline static void lo() __attribute__ ((always_inline)) { _GPIO::r()->BRR = _MASK; } // inline static void lo() __attribute__ ((always_inline)) { _GPIO::r()->BSRR = (_MASK<<16); } +#endif inline static void set(register port_t val) __attribute__ ((always_inline)) { _GPIO::r()->ODR = val; } inline static void strobe() __attribute__ ((always_inline)) { toggle(); toggle(); } @@ -51,25 +56,37 @@ public: inline static port_t hival() __attribute__ ((always_inline)) { return _GPIO::r()->ODR | _MASK; } inline static port_t loval() __attribute__ ((always_inline)) { return _GPIO::r()->ODR & ~_MASK; } inline static port_ptr_t port() __attribute__ ((always_inline)) { return &_GPIO::r()->ODR; } + +#if defined(STM32F2XX) + inline static port_ptr_t sport() __attribute__ ((always_inline)) { return &_GPIO::r()->BSRRL; } + inline static port_ptr_t cport() __attribute__ ((always_inline)) { return &_GPIO::r()->BSRRH; } +#else inline static port_ptr_t sport() __attribute__ ((always_inline)) { return &_GPIO::r()->BSRR; } inline static port_ptr_t cport() __attribute__ ((always_inline)) { return &_GPIO::r()->BRR; } +#endif + inline static port_t mask() __attribute__ ((always_inline)) { return _MASK; } }; -#if defined(STM32F10X_MD) + #define _R(T) struct __gen_struct_ ## T +#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L)> {}; + +#if defined(STM32F10X_MD) #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile GPIO_TypeDef * r() { return T; } }; #define _FL_IO(L,C) _RD32(GPIO ## L); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L)); + #elif defined(__STM32F1__) -#define _R(T) struct __gen_struct_ ## T #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline gpio_reg_map* r() { return T->regs; } }; -#define _FL_IO(L,C) _RD32(GPIO ## L); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L)); +#define _FL_IO(L,C) _RD32(GPIO ## L); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L)); + +#elif defined(STM32F2XX) +#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile GPIO_TypeDef * r() { return T; } }; +#define _FL_IO(L,C) _RD32(GPIO ## L); #else #error "Platform not supported" #endif -#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L)> {}; - #ifdef GPIOA _FL_IO(A,0); #endif @@ -93,7 +110,36 @@ _FL_IO(G,6); #endif // Actual pin definitions -#if defined(SPARK) // Sparkfun STM32F103 based board +#if defined(STM32F2XX) // Photon Particle + +// https://github.com/focalintent/FastLED-Sparkcore/blob/master/firmware/fastpin_arm_stm32.h +#define MAX_PIN 20 +_FL_DEFPIN(0, 7, B); +_FL_DEFPIN(1, 6, B); +_FL_DEFPIN(2, 5, B); +_FL_DEFPIN(3, 4, B); +_FL_DEFPIN(4, 3, B); +_FL_DEFPIN(5, 15, A); +_FL_DEFPIN(6, 14, A); +_FL_DEFPIN(7, 13, A); +_FL_DEFPIN(10, 5, C); +_FL_DEFPIN(11, 3, C); +_FL_DEFPIN(12, 2, C); +_FL_DEFPIN(13, 5, A); +_FL_DEFPIN(14, 6, A); +_FL_DEFPIN(15, 7, A); +_FL_DEFPIN(16, 4, A); +_FL_DEFPIN(17, 0, A); +_FL_DEFPIN(18, 10, A); +_FL_DEFPIN(19, 9, A); +_FL_DEFPIN(20, 7, C); + +#define SPI_DATA 15 +#define SPI_CLOCK 13 + +#define HAS_HARDWARE_PIN_SUPPORT + +#elif defined(SPARK) // Sparkfun STM32F103 based board #define MAX_PIN 19 _FL_DEFPIN(0, 7, B); @@ -122,9 +168,7 @@ _FL_DEFPIN(19, 2, A); #define HAS_HARDWARE_PIN_SUPPORT -#endif // SPARK - -#if defined(__STM32F1__) // Generic STM32F103 aka "Blue Pill" +#elif defined(__STM32F1__) // Generic STM32F103 aka "Blue Pill" #define MAX_PIN 46 diff --git a/src/platforms/arm/stm32/led_sysdefs_arm_stm32.h b/src/platforms/arm/stm32/led_sysdefs_arm_stm32.h index afcf1785..b58779ff 100644 --- a/src/platforms/arm/stm32/led_sysdefs_arm_stm32.h +++ b/src/platforms/arm/stm32/led_sysdefs_arm_stm32.h @@ -1,7 +1,7 @@ #ifndef __INC_LED_SYSDEFS_ARM_SAM_H #define __INC_LED_SYSDEFS_ARM_SAM_H -#if defined(STM32F10X_MD) +#if defined(STM32F10X_MD) || defined(STM32F2XX) #include <application.h> @@ -55,7 +55,16 @@ typedef volatile uint8_t RwReg; /**< Read-Write 8-bit register (volatile u #define FASTLED_NO_PINMAP -#ifndef F_CPU +#if defined(STM32F2XX) +#define F_CPU 120000000 +#else #define F_CPU 72000000 #endif + +#if defined(STM32F2XX) +// Photon doesn't provide yield +#define FASTLED_NEEDS_YIELD +extern "C" void yield(); #endif + +#endif // defined(STM32F10X_MD) || defined(STM32F2XX) diff --git a/src/platforms/avr/clockless_trinket.h b/src/platforms/avr/clockless_trinket.h index 971a5a71..2cfbef0d 100644 --- a/src/platforms/avr/clockless_trinket.h +++ b/src/platforms/avr/clockless_trinket.h @@ -172,7 +172,8 @@ protected: #define USE_ASM_MACROS #if defined(__AVR_ATmega4809__) -#define ASM_VAR_PORT "r" (((PORT_t*)FastPin<DATA_PIN>::port())->OUT) +// Not used - place holder so existing ASM_VARS macro can remain the same +#define ASM_VAR_PORT "r" (*FastPin<DATA_PIN>::port()) #else #define ASM_VAR_PORT "M" (FastPin<DATA_PIN>::port() - 0x20) #endif @@ -204,12 +205,24 @@ protected: [O1] "M" (RGB_BYTE1(RGB_ORDER)), \ [O2] "M" (RGB_BYTE2(RGB_ORDER)) \ : "cc" /* clobber registers */ -// Note: the code in the else in HI1/LO1 will be turned into an sts (2 cycle, 2 word) opcode + +#if defined(__AVR_ATmega4809__) + +// 1 cycle, write hi to the port +#define HI1 do {*FastPin<DATA_PIN>::port()=hi;} while(0); +// 1 cycle, write lo to the port +#define LO1 do {*FastPin<DATA_PIN>::port()=lo;} while(0); + +#else + +// Note: the code in the else in HI1/LO1 will be turned into an sts (2 cycle, 2 word) // 1 cycle, write hi to the port #define HI1 FASTLED_SLOW_CLOCK_ADJUST if((int)(FastPin<DATA_PIN>::port())-0x20 < 64) { asm __volatile__("out %[PORT], %[hi]" ASM_VARS ); } else { *FastPin<DATA_PIN>::port()=hi; } // 1 cycle, write lo to the port #define LO1 if((int)(FastPin<DATA_PIN>::port())-0x20 < 64) { asm __volatile__("out %[PORT], %[lo]" ASM_VARS ); } else { *FastPin<DATA_PIN>::port()=lo; } +#endif + // 2 cycles, sbrs on flipping the line to lo if we're pushing out a 0 #define QLO2(B, N) asm __volatile__("sbrs %[" #B "], " #N ASM_VARS ); LO1; // load a byte from ram into the given var with the given offset diff --git a/src/platforms/avr/fastpin_avr.h b/src/platforms/avr/fastpin_avr.h index 99a78958..741d3f34 100644 --- a/src/platforms/avr/fastpin_avr.h +++ b/src/platforms/avr/fastpin_avr.h @@ -37,6 +37,7 @@ public: inline static port_t hival() __attribute__ ((always_inline)) { return _PORT::r() | _MASK; } inline static port_t loval() __attribute__ ((always_inline)) { return _PORT::r() & ~_MASK; } inline static port_ptr_t port() __attribute__ ((always_inline)) { return &_PORT::r(); } + inline static port_t mask() __attribute__ ((always_inline)) { return _MASK; } }; @@ -46,15 +47,25 @@ public: /// a custom type for each GPIO register with a single, static, aggressively inlined function that returns that specific GPIO register. A similar /// trick is used a bit further below for the ARM GPIO registers (of which there are far more than on AVR!) typedef volatile uint8_t & reg8_t; + #define _R(T) struct __gen_struct_ ## T #define _RD8(T) struct __gen_struct_ ## T { static inline reg8_t r() { return T; }}; // Register name equivalent (using flat names) -#if defined(AVR_ATtinyxy7) || defined(AVR_ATtinyxy6) || defined(AVR_ATtinyxy4) || defined(AVR_ATtinyxy2) || defined(__AVR_ATmega4809__) +#if defined(AVR_ATtinyxy7) || defined(AVR_ATtinyxy6) || defined(AVR_ATtinyxy4) || defined(AVR_ATtinyxy2) + // ATtiny series 0/1 and ATmega series 0 #define _FL_IO(L,C) _RD8(PORT ## L ## _DIR); _RD8(PORT ## L ## _OUT); _RD8(PORT ## L ## _IN); _FL_DEFINE_PORT3(L, C, _R(PORT ## L ## _OUT)); #define _FL_DEFPIN(_PIN, BIT, L) template<> class FastPin<_PIN> : public _AVRPIN<_PIN, 1<<BIT, _R(PORT ## L ## _OUT), _R(PORT ## L ## _DIR), _R(PORT ## L ## _IN)> {}; + +#elif defined(__AVR_ATmega4809__) + +// Leverage VPORTs instead of PORTs for faster access +#define _FL_IO(L,C) _RD8(VPORT ## L ## _DIR); _RD8(VPORT ## L ## _OUT); _RD8(VPORT ## L ## _IN); _FL_DEFINE_PORT3(L, C, _R(VPORT ## L ## _OUT)); +#define _FL_DEFPIN(_PIN, BIT, L) template<> class FastPin<_PIN> : public _AVRPIN<_PIN, 1<<BIT, _R(VPORT ## L ## _OUT), _R(VPORT ## L ## _DIR), _R(VPORT ## L ## _IN)> {}; + #else + // Others #define _FL_IO(L,C) _RD8(DDR ## L); _RD8(PORT ## L); _RD8(PIN ## L); _FL_DEFINE_PORT3(L, C, _R(PORT ## L)); #define _FL_DEFPIN(_PIN, BIT, L) template<> class FastPin<_PIN> : public _AVRPIN<_PIN, 1<<BIT, _R(PORT ## L), _R(DDR ## L), _R(PIN ## L)> {}; @@ -231,11 +242,10 @@ _FL_DEFPIN(12, 1, E); _FL_DEFPIN(13, 2, E); _FL_DEFPIN(14, 3, D); _FL_DEFPIN(15, _FL_DEFPIN(16, 1, D); _FL_DEFPIN(17, 0, D); _FL_DEFPIN(18, 2, A); _FL_DEFPIN(19, 3, A); _FL_DEFPIN(20, 4, D); _FL_DEFPIN(21, 5, D); -// To confirm for the SPI interfaces -//#define SPI_DATA 18 -//#define SPI_CLOCK 13 -//#define SPI_SELECT 19 -//#define AVR_HARDWARE_SPI 1 +#define SPI_DATA 11 +#define SPI_CLOCK 13 +#define SPI_SELECT 8 +#define AVR_HARDWARE_SPI 1 #define HAS_HARDWARE_PIN_SUPPORT 1 //#define SPI_UART0_DATA 1 diff --git a/src/platforms/esp/32/clockless_rmt_esp32.cpp b/src/platforms/esp/32/clockless_rmt_esp32.cpp index 9fbdab59..42db3415 100644 --- a/src/platforms/esp/32/clockless_rmt_esp32.cpp +++ b/src/platforms/esp/32/clockless_rmt_esp32.cpp @@ -328,7 +328,11 @@ void IRAM_ATTR ESP32RMTController::interruptHandler(void *arg) for (channel = 0; channel < gMaxChannel; channel++) { int tx_done_bit = channel * 3; + #ifdef CONFIG_IDF_TARGET_ESP32S2 + int tx_next_bit = channel + 12; + #else int tx_next_bit = channel + 24; + #endif ESP32RMTController * pController = gOnChannel[channel]; if (pController != NULL) { diff --git a/src/platforms/esp/32/clockless_rmt_esp32.h b/src/platforms/esp/32/clockless_rmt_esp32.h index faa31dc5..2a8555ab 100644 --- a/src/platforms/esp/32/clockless_rmt_esp32.h +++ b/src/platforms/esp/32/clockless_rmt_esp32.h @@ -188,10 +188,14 @@ __attribute__ ((always_inline)) inline static uint32_t __clock_cycles() { #define FASTLED_RMT_MAX_CONTROLLERS 32 #endif -// -- Max RMT channel (default to 8) +// -- Max RMT channel (default to 8 on ESP32 and 4 on ESP32-S2) #ifndef FASTLED_RMT_MAX_CHANNELS +#ifdef CONFIG_IDF_TARGET_ESP32S2 +#define FASTLED_RMT_MAX_CHANNELS 4 +#else #define FASTLED_RMT_MAX_CHANNELS 8 #endif +#endif class ESP32RMTController { |