* Bring fastpin_avr in line with standard defpin macros (to simplify porting document notes
* checkpoint - bring all the arm and esp platforms in line w/defpin macro naming/ordering
* checkpoint - update PORTING.md to include information around just adding pin definitions if needed
* Kick all the pin definitions to allow for some runtime querying of ports and tweak pintest to have it provide pin definitions for platforms that have port definitions but might be missing pin specifics (e.g. not yet-supported avr platforms
* Pre-teensy4 work - with a 600Mhz clock, a 1Mhz clock was giving us a clock divider that overflowed a uint8_t - whoops...
* Some tweaks to chipset definitions to help out the Teensy 4 implementation
* Updating the pintest program w/Teensy 4 defs
* Preliminary Teensy 4 support, including hardware SPI and clockless chipsets - no support for parallel output or DMA'd output yet - also not fully tested for all chipsets on all pins, but smoke tested with some chipsets and pin combinations and logic analyzer in the meantime
* Checking in initial block clockless output - it compiles, but no testing yet, so it shouldn't be hooked up anywhere yet.
* Tweak and fix parallel output - still need to hook it up to the default addLeds setup
* more kicking
