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authorrihab kouki <rihab.kouki@st.com>2021-07-23 12:14:42 +0300
committerrihab kouki <rihab.kouki@st.com>2021-07-23 16:12:38 +0300
commit95f19205e36f1e26409b88e302537cbc8918f7e9 (patch)
tree300d4ed71cc66e1e68c12ebc51aedb5d5136b6c8 /Projects/NUCLEO-WB15CC/Applications/BLE_LLD
parent2d1f0ea0748169a268228d0f7b6416e5127e6027 (diff)
Release v1.12.0
Diffstat (limited to 'Projects/NUCLEO-WB15CC/Applications/BLE_LLD')
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_common.h124
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_conf.h323
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_entry.h69
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/gpio_lld.h179
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_conf.h125
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_if.h111
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/main.h107
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/nucleo_wb15cc_conf.h77
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32_lpm_if.h79
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_hal_conf.h353
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_it.h84
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm_logging.h63
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/utilities_conf.h68
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/app_entry.c418
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/gpio_lld.c132
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/hw_uart.c442
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/main.c605
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/standby_stm32wb15.c159
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32_lpm_if.c288
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_hal_msp.c286
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_it.c333
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm_logging.c213
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/system_stm32wbxx.c355
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewd1419
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewp1225
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.eww7
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/startup_stm32wb15xx_cm4.s432
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/stm32wb15xx_flash_cm4.icf42
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvoptx793
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvprojx689
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/startup_stm32wb15xx_cm4.s336
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/stm32wb15xx_flash_cm4.sct21
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.cproject199
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.project249
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s394
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/syscalls.c159
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/sysmem.c80
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/STM32WB15CCUX_FLASH.ld179
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.c390
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.h71
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.c357
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.h50
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/tl_dbg_conf.h126
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/Target/hw_ipcc.c676
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/readme.txt152
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_common.h124
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_conf.h337
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_entry.h69
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/gpio_lld.h179
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_conf.h186
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_if.h287
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/main.h107
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/nucleo_wb15cc_conf.h77
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32_lpm_if.h79
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_hal_conf.h353
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_it.h83
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm_logging.h63
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/utilities_conf.h68
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/app_entry.c421
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/gpio_lld.c132
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_timerserver.c893
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_uart.c442
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/main.c607
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/standby_stm32wb15.c159
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32_lpm_if.c288
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_hal_msp.c332
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_it.c323
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm_logging.c213
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/system_stm32wbxx.c355
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewd1419
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewp1235
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.eww7
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/startup_stm32wb15xx_cm4.s432
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/stm32wb15xx_flash_cm4.icf42
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx829
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvprojx704
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s336
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct21
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.cproject201
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.project264
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s394
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/syscalls.c159
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/sysmem.c80
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/STM32WB15CCUX_FLASH.ld179
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.c390
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.h71
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.c167
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.h50
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/tl_dbg_conf.h126
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/Target/hw_ipcc.c676
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/readme.txt140
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_conf.h38
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/gpio_lld.h152
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_if.h8
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32wbxx_it.h18
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c82
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/gpio_lld.c591
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c148
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/main.c135
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/pressbutton_app.c407
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32_lpm_if.c6
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_hal_msp.c48
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_it.c73
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/system_stm32wbxx.c30
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewd8
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewp30
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/stm32wb15xx_flash_cm4.icf2
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvoptx793
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvprojx689
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/startup_stm32wb15xx_cm4.s336
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/stm32wb15xx_flash_cm4.sct21
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.cproject199
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.project249
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s394
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/syscalls.c159
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/sysmem.c80
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/STM32WB15CCUX_FLASH.ld179
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.c261
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.h29
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.c558
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.h217
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld_private.h310
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.c161
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.h (renamed from Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/pressbutton_app.h)1
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.c233
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.h57
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/readme.txt78
127 files changed, 30956 insertions, 2962 deletions
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_common.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_common.h
new file mode 100644
index 000000000..5bb0f82f1
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_common.h
@@ -0,0 +1,124 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : app_common.h
+ * Description : App Common application configuration file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_COMMON_H
+#define APP_COMMON_H
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "main.h"
+#include "app_conf.h"
+
+ /* -------------------------------- *
+ * Basic definitions *
+ * -------------------------------- */
+
+#undef NULL
+#define NULL 0
+
+#undef FALSE
+#define FALSE 0
+
+#undef TRUE
+#define TRUE (!0)
+
+ /* -------------------------------- *
+ * Critical Section definition *
+ * -------------------------------- */
+#define BACKUP_PRIMASK() uint32_t primask_bit= __get_PRIMASK()
+#define DISABLE_IRQ() __disable_irq()
+#define RESTORE_PRIMASK() __set_PRIMASK(primask_bit)
+
+ /* -------------------------------- *
+ * Macro delimiters *
+ * -------------------------------- */
+
+#define M_BEGIN do {
+
+#define M_END } while(0)
+
+ /* -------------------------------- *
+ * Some useful macro definitions *
+ * -------------------------------- */
+
+#ifndef MAX
+#define MAX( x, y ) (((x)>(y))?(x):(y))
+#endif
+
+#ifndef MIN
+#define MIN( x, y ) (((x)<(y))?(x):(y))
+#endif
+
+#define MODINC( a, m ) M_BEGIN (a)++; if ((a)>=(m)) (a)=0; M_END
+
+#define MODDEC( a, m ) M_BEGIN if ((a)==0) (a)=(m); (a)--; M_END
+
+#define MODADD( a, b, m ) M_BEGIN (a)+=(b); if ((a)>=(m)) (a)-=(m); M_END
+
+#define MODSUB( a, b, m ) MODADD( a, (m)-(b), m )
+
+#define PAUSE( t ) M_BEGIN \
+ __IO int _i; \
+ for ( _i = t; _i > 0; _i -- ); \
+ M_END
+
+#define DIVF( x, y ) ((x)/(y))
+
+#define DIVC( x, y ) (((x)+(y)-1)/(y))
+
+#define DIVR( x, y ) (((x)+((y)/2))/(y))
+
+#define SHRR( x, n ) ((((x)>>((n)-1))+1)>>1)
+
+#define BITN( w, n ) (((w)[(n)/32] >> ((n)%32)) & 1)
+
+#define BITNSET( w, n, b ) M_BEGIN (w)[(n)/32] |= ((U32)(b))<<((n)%32); M_END
+
+#define CRITICAL_BEGIN( ) M_BEGIN BACKUP_PRIMASK(); DISABLE_IRQ()
+
+#define CRITICAL_END( ) RESTORE_PRIMASK(); M_END
+
+ /* -------------------------------- *
+ * Compiler *
+ * -------------------------------- */
+#define PLACE_IN_SECTION( __x__ ) __attribute__((section (__x__)))
+
+#ifdef WIN32
+#define ALIGN(n)
+#else
+#define ALIGN(n) __attribute__((aligned(n)))
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_COMMON_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_conf.h
new file mode 100644
index 000000000..7002bdab9
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_conf.h
@@ -0,0 +1,323 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : app_conf.h
+ * Description : Application configuration file for STM32WPAN Middleware.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_CONF_H
+#define APP_CONF_H
+
+#include "hw.h"
+#include "hw_conf.h"
+#include "hw_if.h"
+
+/******************************************************************************
+ * Application Config
+ ******************************************************************************/
+#define CFG_HS_STARTUP_TIME 0x0099 /* Start up time of the high speed oscillator in system time units (625/256us) */
+
+#define CFG_BACK2BACK_TIME 200 /* Back to back time (us) */
+
+/******************************************************************************
+ * Transport Layer
+ ******************************************************************************/
+/**
+ * Queue length of M0 traces/log messages
+ * This parameter defines the number of asynchronous events that can be stored in the M0 test FW before
+ * being reported to the M4 which will re-build traces/log messages before to send them to UART.
+ * This parameter is combined with the CFG_TL_MOST_EVENT_PAYLOAD_SIZE to calculate the queue size needed by M0 for traces.
+ */
+#define CFG_TL_EVT_QUEUE_LENGTH 20
+/**
+ * TL_EVENT_FRAME_SIZE is the size of the packets transfered between M0 and M4 through IPCC.
+ * Note 1 : thoose packets are first put in a trace queue (see DBG_TRACE_MSG_QUEUE_SIZE) before beeing sent to UART
+ * Note 2 : Queue size must be higher than a M0 trace buffer max size (see LOG_BUFFER_SIZE_MAX in M0 FW)
+ */
+#define CFG_TL_MOST_EVENT_PAYLOAD_SIZE 255
+
+#define TL_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TL_MOST_EVENT_PAYLOAD_SIZE )
+
+/******************************************************************************
+ * UART interfaces
+ ******************************************************************************/
+/**
+ * Select UART interfaces
+ */
+#define CFG_DEBUG_TRACE_UART hw_lpuart1
+#define CFG_UART hw_uart1
+
+/******************************************************************************
+ * USB interface
+ ******************************************************************************/
+
+/**
+ * Enable/Disable USB interface
+ */
+#define CFG_USB_INTERFACE_ENABLE 0
+
+/******************************************************************************
+ * Low Power
+ *
+ * When BLE_LLD_LP is set to 1:
+ * the system is configured in low power mode CFG_LPM_SUPPORTED
+ *
+ * When BLE_LLD_LP is not set, the low power mode is not activated
+ *
+ ******************************************************************************/
+#define CFG_LPM_SUPPORTED 0
+
+#ifdef BLE_LLD_LP
+#undef CFG_LPM_SUPPORTED
+#define CFG_LPM_SUPPORTED 1
+#endif
+
+#define CFG_PWR_MODE_STOP LL_PWR_MODE_STOP1
+
+/******************************************************************************
+ * Timer Server
+ ******************************************************************************/
+/**
+ * CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
+ * The higher is the value, the better is the power consumption and the accuracy of the timerserver
+ * The lower is the value, the finest is the granularity
+ *
+ * CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput
+ * clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
+ * the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
+ *
+ * CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
+ * When the 1Hz calendar clock is required, it shall be sets according to other settings
+ * When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
+ *
+ * CFG_RTCCLK_DIVIDER_CONF:
+ * Shall be set to either 0,2,4,8,16
+ * When set to either 2,4,8,16, the 1Hhz calendar is supported
+ * When set to 0, the user sets its own configuration
+ *
+ * The following settings are computed with LSI as input to the RTC
+ */
+#define CFG_RTCCLK_DIVIDER_CONF 0
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 0)
+/**
+ * Custom configuration
+ * It does not support 1Hz calendar
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTCCLK_DIV (16)
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
+
+#else
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 2)
+/**
+ * It divides the RTC CLK by 2
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (3)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 4)
+/**
+ * It divides the RTC CLK by 4
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (2)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 8)
+/**
+ * It divides the RTC CLK by 8
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (1)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 16)
+/**
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#endif
+
+#define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
+#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
+
+#endif
+
+/** tick timer value in us */
+#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
+
+typedef enum
+{
+ CFG_TIM_PROC_ID_ISR,
+} CFG_TimProcID_t;
+
+/******************************************************************************
+ * Debug
+ ******************************************************************************/
+/**
+ * When set, this resets some hw resources to set the device in the same state than the power up
+ * The FW resets only register that may prevent the FW to run properly
+ *
+ * This shall be set to 0 in a final product
+ *
+ */
+#define CFG_HW_RESET_BY_FW 1
+
+/**
+ * keep debugger enabled while in any low power mode when set to 1
+ * should be set to 0 in production
+ */
+#define CFG_DEBUGGER_SUPPORTED 1
+
+/*****************************************************************************
+ * Traces
+ * Enable or Disable traces in application
+ * When CFG_DEBUG_TRACE is set, traces are activated
+ *
+ * Note : Refer to utilities_conf.h file in order to details
+ * the level of traces : CFG_DEBUG_TRACE_FULL or CFG_DEBUG_TRACE_LIGHT
+ *****************************************************************************/
+#define CFG_DEBUG_TRACE 1
+
+/**
+ * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
+ * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
+ *
+ * When both are set to 0, no trace are output
+ * When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
+ */
+#define CFG_DEBUG_TRACE_LIGHT 1
+#define CFG_DEBUG_TRACE_FULL 0
+
+#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL 0
+#define CFG_DEBUG_TRACE_LIGHT 1
+#endif
+
+#if ( CFG_DEBUG_TRACE == 0 )
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL 0
+#define CFG_DEBUG_TRACE_LIGHT 0
+#endif
+
+/**
+ * When not set, the traces is looping on sending the trace over UART
+ */
+#define DBG_TRACE_USE_CIRCULAR_QUEUE 1
+
+/**
+ * max buffer Size to queue data traces and max data trace allowed.
+ * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
+ */
+#define DBG_TRACE_MSG_QUEUE_SIZE 4096
+#define MAX_DBG_TRACE_MSG_SIZE 1024
+
+/******************************************************************************
+ * Configure Log level for Application
+ ******************************************************************************/
+#define APPLI_CONFIG_LOG_LEVEL LOG_LEVEL_INFO
+#define APPLI_PRINT_FILE_FUNC_LINE 0
+
+/* USER CODE BEGIN Defines */
+/******************************************************************************
+ * User interaction
+ * When CFG_LED_SUPPORTED is set, LEDS are activated if requested
+ * When CFG_BUTTON_SUPPORTED is set, the push button are activated if requested
+ ******************************************************************************/
+#define CFG_LED_SUPPORTED 1
+#define CFG_BUTTON_SUPPORTED 1
+
+/* USER CODE END Defines */
+
+/******************************************************************************
+ * Scheduler
+ ******************************************************************************/
+ /**
+ * This is the list of task id required by the application
+ * Each Id shall be in the range 0..31
+ */
+
+typedef enum
+{
+ CFG_TASK_CMD_FROM_M0_TO_M4,
+ CFG_TASK_SEND_CLI_TO_M0,
+ CFG_TASK_SEND_TO_M0,
+/* USER CODE BEGIN IdleTask */
+ CFG_TASK_HAL_BLE_ENCRYPT,
+ CFG_TASK_HAL_BLE_STARTTONE,
+ CFG_TASK_HAL_BLE_STOPTONE,
+/* USER CODE END IdleTask */
+ CFG_TASK_SYSTEM_HCI_ASYNCH_EVT,
+ CFG_TASK_PROCESS_UART_RX_BUFFER,
+ CFG_TASK_PROCESS_UART_RX_IT,
+ CFG_TASK_PROCESS_UART_TX_IT,
+ CFG_TASK_NBR /**< Shall be last in the list */
+} CFG_IdleTask_Id_t;
+
+/**
+ * This is the list of priority required by the application
+ * Each Id shall be in the range 0..31
+ */
+typedef enum
+{
+ CFG_SCH_PRIO_0,
+ CFG_SCH_PRIO_1,
+ CFG_PRIO_NBR,
+} CFG_SCH_Prio_Id_t;
+
+/**
+ * This is a bit mapping over 32bits listing all events id supported in the application
+ */
+typedef enum
+{
+ CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP,
+ CFG_EVT_RECEIVE_RSPACKEVT,
+ CFG_EVT_RECEIVE_ENDPACKEVT,
+} CFG_IdleEvt_Id_t;
+
+/******************************************************************************
+ * LOW POWER
+ ******************************************************************************/
+/**
+ * Supported requester to the MCU Low Power Manager - can be increased up to 32
+ * It lits a bit mapping of all user of the Low Power Manager
+ */
+typedef enum
+{
+ CFG_LPM_APP,
+ CFG_LPM_APP_BLE_LLD,
+ /* USER CODE BEGIN CFG_LPM_Id_t */
+
+ /* USER CODE END CFG_LPM_Id_t */
+} CFG_LPM_Id_t;
+
+/******************************************************************************
+ * OTP manager
+ ******************************************************************************/
+#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
+
+#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
+
+#endif /*APP_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_entry.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_entry.h
new file mode 100644
index 000000000..77ead2384
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/app_entry.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file app_entry.h
+ * @author MCD Application Team
+ * @brief Interface to the application
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_ENTRY_H
+#define APP_ENTRY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+ /* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/* Exported macros ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions ---------------------------------------------*/
+ void APPE_Init( void );
+/* USER CODE BEGIN EF */
+
+/* USER CODE END EF */
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_ENTRY_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/gpio_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/gpio_lld.h
new file mode 100644
index 000000000..e9ceb78c0
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/gpio_lld.h
@@ -0,0 +1,179 @@
+/*
+ * gpio_lld.h
+ *
+ */
+
+#ifndef GPIO_LLD_H_
+#define GPIO_LLD_H_
+
+#define GPIO_HARD_FAULT_PIN GPIO_PIN_4
+#define GPIO_HARD_FAULT_PORT GPIOA
+
+// External PA TX/RX pin is fixed by the chip
+#define GPIO_EXT_PA_TX_PIN GPIO_PIN_0
+#define GPIO_EXT_PA_TX_PORT GPIOB
+// External PA enable pin is chosen by user
+#define GPIO_EXT_PA_EN_PIN GPIO_PIN_9
+#define GPIO_EXT_PA_EN_PORT GPIOB
+
+void gpio_lld_phy_init( void );
+void gpio_lld_phy_gpioTx_up(void);
+void gpio_lld_phy_gpioTx_down(void);
+void gpio_lld_phy_gpioHardFault_up(void);
+void gpio_lld_phy_gpioHardFault_down(void);
+void gpio_lld_phy_gpio1_up(void);
+void gpio_lld_phy_gpio1_down(void);
+void gpio_lld_phy_gpio2_up(void);
+void gpio_lld_phy_gpio2_down(void);
+void gpio_lld_phy_deInit(void);
+
+void gpio_lld_mco_init(uint32_t mcoSource, uint32_t mcoDiv);
+void gpio_lld_mco_deInit(void);
+
+void gpio_lld_extPa_init(void);
+void gpio_lld_extPa_deInit(void);
+
+#ifdef USE_SIMU
+void gpio_lld_SimuMaster_init(void);
+void gpio_lld_SimuSlave_init(void);
+#endif
+
+void gpio_lld_lpuart_init(void);
+void gpio_lld_lpuart_deInit(void);
+
+void gpio_lld_usart_init(void);
+void gpio_lld_usart_deInit(void);
+
+#if !defined (USE_SIMU) && !defined(USE_FPGA)
+void gpio_lld_pa2_init(uint8_t mode);
+void gpio_lld_pa2_deInit(void);
+
+void gpio_lld_dtb_init(uint8_t dtbMode);
+void gpio_lld_dtb_deInit(void);
+#endif
+
+void gpio_lld_led1_toggle(void);
+void gpio_lld_led2_toggle(void);
+void gpio_lld_led3_toggle(void);
+
+#ifdef STM32WB15xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOA
+#define USART_TX_PIN GPIO_PIN_9
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOA
+#define USART_RX_PIN GPIO_PIN_10
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOA
+#define LPUART_TX_PIN GPIO_PIN_2
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOA
+#define LPUART_RX_PIN GPIO_PIN_3
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+#endif
+
+#ifdef STM32WB35xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOB
+#define USART_TX_PIN GPIO_PIN_6
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOB
+#define USART_RX_PIN GPIO_PIN_7
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOB
+#define LPUART_TX_PIN GPIO_PIN_5
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOA
+#define LPUART_RX_PIN GPIO_PIN_3
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+#endif
+
+#ifdef STM32WB55xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI1_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOB
+#define USART_TX_PIN GPIO_PIN_6
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOB
+#define USART_RX_PIN GPIO_PIN_7
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOC
+#define LPUART_TX_PIN GPIO_PIN_1
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOC
+#define LPUART_RX_PIN GPIO_PIN_0
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+#endif
+
+#endif /* GPIO_LLD_H_ */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_conf.h
new file mode 100644
index 000000000..855bf9e15
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_conf.h
@@ -0,0 +1,125 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : hw_conf.h
+ * Description : Hardware configuration file for the application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_CONF_H
+#define HW_CONF_H
+
+/******************************************************************************
+ * Semaphores
+ * THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
+ *****************************************************************************/
+/**
+* The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
+* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+* + CPU1 takes CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+* + CPU1 releases CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+* CFG_HW_THREAD_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+* There is no timing constraint on how long this semaphore can be kept.
+*/
+#define CFG_HW_THREAD_NVM_SRAM_SEMID 9
+
+/**
+* The CPU2 may be configured to store the BLE persistent data either in internal NVM storage on CPU2 or in
+* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+* + CPU1 takes CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+* + CPU1 releases CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+* CFG_HW_BLE_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+* There is no timing constraint on how long this semaphore can be kept.
+*/
+#define CFG_HW_BLE_NVM_SRAM_SEMID 8
+
+/**
+* Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash
+* The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2
+* When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just
+* after writing a raw (64bits data) or erasing one sector.
+* On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit.
+* By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore
+* instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 7
+
+/**
+* Index of the semaphore used by CPU1 to prevent the CPU2 to either write or erase data in flash
+* In order to protect its timing, the CPU1 may get this semaphore to prevent the CPU2 to either
+* write or erase in flash (as this will stall both CPUs)
+* The PES bit shall not be used as this may stall the CPU2 in some cases.
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 6
+
+/**
+* Index of the semaphore used to manage the CLK48 clock configuration
+* When the USB is required, this semaphore shall be taken before configuring te CLK48 for USB
+* and should be released after the application switch OFF the clock when the USB is not used anymore
+* When using the RNG, it is good enough to use CFG_HW_RNG_SEMID to control CLK48.
+* More details in AN5289
+*/
+#define CFG_HW_CLK48_CONFIG_SEMID 5
+
+/* Index of the semaphore used to manage the entry Stop Mode procedure */
+#define CFG_HW_ENTRY_STOP_MODE_SEMID 4
+
+/* Index of the semaphore used to access the RCC */
+#define CFG_HW_RCC_SEMID 3
+
+/* Index of the semaphore used to access the FLASH */
+#define CFG_HW_FLASH_SEMID 2
+
+/* Index of the semaphore used to access the PKA */
+#define CFG_HW_PKA_SEMID 1
+
+/* Index of the semaphore used to access the RNG */
+#define CFG_HW_RNG_SEMID 0
+
+/******************************************************************************
+ * HW UART
+ *****************************************************************************/
+#if (CFG_LPM_SUPPORTED == 0)
+#define CFG_HW_LPUART1_ENABLED 1
+#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 1
+#define CFG_HW_USART1_ENABLED 1
+#define CFG_HW_USART1_DMA_TX_SUPPORTED 1
+
+#else
+#define CFG_HW_LPUART1_ENABLED 0
+#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 0
+#define CFG_HW_USART1_ENABLED 0
+#define CFG_HW_USART1_DMA_TX_SUPPORTED 0
+#endif
+/******************************************************************************
+ * External PA
+ *****************************************************************************/
+
+#if (CFG_LPM_SUPPORTED == 0)
+#define CFG_HW_EXTPA_ENABLED 1
+#else
+#define CFG_HW_EXTPA_ENABLED 0
+#endif
+
+#endif /*HW_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_if.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_if.h
new file mode 100644
index 000000000..f318d3791
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_if.h
@@ -0,0 +1,111 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file hw_if.h
+ * @author MCD Application Team
+ * @brief Hardware Interface
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_IF_H
+#define HW_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx.h"
+#include "stm32wbxx_ll_exti.h"
+#include "stm32wbxx_ll_system.h"
+#include "stm32wbxx_ll_rcc.h"
+#include "stm32wbxx_ll_ipcc.h"
+#include "stm32wbxx_ll_bus.h"
+#include "stm32wbxx_ll_pwr.h"
+#include "stm32wbxx_ll_cortex.h"
+#include "stm32wbxx_ll_utils.h"
+#include "stm32wbxx_ll_hsem.h"
+#include "stm32wbxx_ll_gpio.h"
+#include "stm32wbxx_ll_rtc.h"
+
+#ifdef USE_STM32WBXX_USB_DONGLE
+#include "stm32wbxx_usb_dongle.h"
+#endif
+
+#ifdef USE_STM32WBXX_NUCLEO
+
+#ifdef STM32WB15xx
+#include "nucleo_wb15cc.h"
+#endif
+
+#endif
+
+#ifdef USE_X_NUCLEO_EPD
+#include "x_nucleo_epd.h"
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/******************************************************************************
+ * HW UART
+ ******************************************************************************/
+typedef enum
+{
+ hw_uart1,
+ hw_uart2,
+ hw_lpuart1,
+} hw_uart_id_t;
+
+typedef enum
+{
+ hw_uart_ok,
+ hw_uart_error,
+ hw_uart_busy,
+ hw_uart_to,
+} hw_status_t;
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+extern UART_HandleTypeDef hlpuart1;
+extern DMA_HandleTypeDef hdma_lpuart1_tx;
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+extern UART_HandleTypeDef huart1;
+extern DMA_HandleTypeDef hdma_usart1_tx;
+#endif
+
+//void HW_UART_Init(hw_uart_id_t hw_uart_id);
+hw_status_t HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
+hw_status_t HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
+hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, uint32_t timeout);
+hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*Callback)(void));
+#if 0
+void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+#endif
+
+void MX_UART_Init(hw_uart_id_t uart);
+void MX_UART_Deinit(hw_uart_id_t uart);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*HW_IF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/main.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/main.h
new file mode 100644
index 000000000..0c024028b
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/main.h
@@ -0,0 +1,107 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+void SystemClock_Config_HSE(uint32_t usePLL);
+void SystemClock_Config_MSI(uint32_t usePLL);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+/* USER CODE BEGIN Private defines */
+
+
+/*
+ In this example TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1),
+ since APB1 prescaler is equal to 1.
+ TIM2CLK = PCLK1
+ PCLK1 = HCLK
+ => TIM2CLK = HCLK = SystemCoreClock
+ To get TIM2 counter clock at 10 KHz, the Prescaler is computed as following:
+ Prescaler = (TIM2CLK / TIM2 counter clock) - 1
+ Prescaler = (SystemCoreClock /10 KHz) - 1
+
+ Note:
+ SystemCoreClock variable holds HCLK frequency and is defined in system_stm32wbxx.c file.
+ Each time the core clock (HCLK) changes, user had to update SystemCoreClock
+ variable value. Otherwise, any configuration based on this variable will be incorrect.
+ This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ ----------------------------------------------------------------------- */
+
+/* Compute the prescaler value to have TIMx counter clock equal to 10000 Hz */
+
+#define PRESCALER_VALUE (uint32_t)(((SystemCoreClock) / (1000000)) - 1)
+
+ /* Initialize TIMx peripheral as follows:
+ + Period = 10000 - 1
+ + Prescaler = (SystemCoreClock/10000) - 1
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+
+#define PERIOD_VALUE (1000000 - 1);
+
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/nucleo_wb15cc_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/nucleo_wb15cc_conf.h
new file mode 100644
index 000000000..45c29d955
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/nucleo_wb15cc_conf.h
@@ -0,0 +1,77 @@
+/**
+ ******************************************************************************
+ * @file nucleo_wb15cc_conf.h
+ * @author MCD Application Team
+ * @brief NUCLEO-WB15CC board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef NUCLEO_WB15CC_CONF_H
+#define NUCLEO_WB15CC_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx_hal.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup NUCLEO_WB15CC
+ * @{
+ */
+
+/** @defgroup NUCLEO_WB15CC_CONFIG CONFIG
+ * @{
+ */
+
+/** @defgroup NUCLEO_WB15CC_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+/* COM usage define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM log define */
+#define USE_COM_LOG 0U
+
+/* IRQ priorities */
+#define BSP_BUTTON_SWx_IT_PRIORITY 15U
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NUCLEO_WB15CC_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32_lpm_if.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32_lpm_if.h
new file mode 100644
index 000000000..dac7e2cbb
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32_lpm_if.h
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file stm32_lpm_if.h
+ * @brief Header for stm32_lpm_if.c module (device specific LP management)
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32_LPM_IF_H
+#define __STM32_LPM_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/**
+ * @brief Enters Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_EnterOffMode( void );
+/**
+ * @brief Exits Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_ExitOffMode( void );
+
+/**
+ * @brief Enters Low Power Stop Mode
+ * @note ARM exists the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterStopMode( void );
+/**
+ * @brief Exits Low Power Stop Mode
+ * @note Enable the pll at 32MHz
+ * @param none
+ * @retval none
+ */
+void PWR_ExitStopMode( void );
+
+/**
+ * @brief Enters Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterSleepMode( void );
+
+/**
+ * @brief Exits Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_ExitSleepMode( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__STM32_LPM_IF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_hal_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_hal_conf.h
new file mode 100644
index 000000000..365809937
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_hal_conf.h
@@ -0,0 +1,353 @@
+/**
+ ******************************************************************************
+ * @file stm32wbxx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32WBxx_HAL_CONF_H
+#define STM32WBxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+#define HAL_CORTEX_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+/*#define HAL_I2C_MODULE_ENABLED */
+/*#define HAL_IPCC_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_PKA_MODULE_ENABLED */
+#define HAL_PWR_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED */
+#define HAL_RCC_MODULE_ENABLED
+/*#define HAL_RNG_MODULE_ENABLED */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_TSC_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
+#define USE_HAL_PKA_REGISTER_CALLBACKS 0u
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0u
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0u
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0u
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0u
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0u
+#define USE_HAL_TSC_REGISTER_CALLBACKS 0u
+#define USE_HAL_UART_REGISTER_CALLBACKS 0u
+#define USE_HAL_USART_REGISTER_CALLBACKS 0u
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (32000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI1) value.
+ */
+#if !defined (LSI1_VALUE)
+ #define LSI1_VALUE (32000UL) /*!< LSI1 Typical Value in Hz*/
+#endif /* LSI1_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+/**
+ * @brief Internal Low Speed oscillator (LSI2) value.
+ */
+#if !defined (LSI2_VALUE)
+ #define LSI2_VALUE (32000UL) /*!< LSI2 Typical Value in Hz*/
+#endif /* LSI2_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+ * @brief Internal Multiple Speed oscillator (HSI48) default value.
+ * This value is the default HSI48 range value after Reset.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI48_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for SAI1 peripheral
+ * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+ * frequency.
+ */
+#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
+ #define EXTERNAL_SAI1_CLOCK_VALUE (48000UL) /*!< Value of the SAI1 External clock source in Hz*/
+#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((1UL<<__NVIC_PRIO_BITS) - 1UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0
+#define PREFETCH_ENABLE 0
+#define INSTRUCTION_CACHE_ENABLE 1
+#define DATA_CACHE_ENABLE 1
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1 */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32wbxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32wbxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32wbxx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32wbxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32wbxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32wbxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32wbxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32wbxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32wbxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+ #include "stm32wbxx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32wbxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IPCC_MODULE_ENABLED
+ #include "stm32wbxx_hal_ipcc.h"
+#endif /* HAL_IPCC_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32wbxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32wbxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32wbxx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32wbxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32wbxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+ #include "stm32wbxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32wbxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32wbxx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32wbxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32wbxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32wbxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32wbxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32wbxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32wbxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32wbxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32wbxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+ #include "stm32wbxx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32wbxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32wbxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32wbxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32WBxx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_it.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_it.h
new file mode 100644
index 000000000..485c7fc81
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_it.h
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32wbxx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ *******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32WBxx_IT_H
+#define __STM32WBxx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "app_common.h"
+#include "gpio_lld.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel4_IRQHandler(void);
+void DMA1_Channel5_IRQHandler(void);
+void USART1_IRQHandler(void);
+void LPUART1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+#if (CFG_LPM_SUPPORTED == 1U)
+void RTC_WKUP_IRQHandler(void);
+#endif
+void IPCC_C1_TX_IRQHandler(void);
+void IPCC_C1_RX_IRQHandler(void);
+
+void BUTTON_SW1_EXTI_IRQHandler(void);
+void BUTTON_SW2_EXTI_IRQHandler(void);
+void BUTTON_SW3_EXTI_IRQHandler(void);
+void TIM2_IRQHandler(void);
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32WBxx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm_logging.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm_logging.h
new file mode 100644
index 000000000..119d6e7a0
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/stm_logging.h
@@ -0,0 +1,63 @@
+/**
+ ******************************************************************************
+ * File Name : stm_logging.h
+ * Description : Application header file for logging
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+#ifndef STM_LOGGING_H_
+#define STM_LOGGING_H_
+
+#define LOG_LEVEL_NONE 0 /* None */
+#define LOG_LEVEL_CRIT 1U /* Critical */
+#define LOG_LEVEL_WARN 2U /* Warning */
+#define LOG_LEVEL_INFO 3U /* Info */
+#define LOG_LEVEL_DEBG 4U /* Debug */
+
+#define APP_DBG_FULL(level, region, ...) \
+ { \
+ if (APPLI_PRINT_FILE_FUNC_LINE == 1U) \
+ { \
+ printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__); \
+ } \
+ logApplication(level, region, __VA_ARGS__); \
+ }
+
+#define APP_DBG(...) \
+ { \
+ if (APPLI_PRINT_FILE_FUNC_LINE == 1U) \
+ { \
+ printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__); \
+ } \
+ logApplication(LOG_LEVEL_NONE, APPLI_LOG_REGION_GENERAL, __VA_ARGS__); \
+ }
+
+/**
+ * This enumeration represents log regions.
+ *
+ */
+typedef enum
+{
+ APPLI_LOG_REGION_GENERAL = 1U, /* General */
+ APPLI_LOG_REGION_OPENTHREAD_API = 2U, /* OpenThread API */
+ APPLI_LOG_REGION_OT_API_LINK = 3U, /* OpenThread Link API */
+ APPLI_LOG_REGION_OT_API_INSTANCE = 4U, /* OpenThread Instance API */
+ APPLI_LOG_REGION_OT_API_MESSAGE = 5U /* OpenThread Message API */
+} appliLogRegion_t;
+
+typedef uint8_t appliLogLevel_t;
+
+void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...);
+
+#endif /* STM_LOGGING_H_ */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/utilities_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/utilities_conf.h
new file mode 100644
index 000000000..4dde3509a
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Inc/utilities_conf.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : utilities_conf.h
+ * Description : Configuration file for STM32 Utilities.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef UTILITIES_CONF_H
+#define UTILITIES_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "cmsis_compiler.h"
+#include "string.h"
+
+/******************************************************************************
+ * common
+ ******************************************************************************/
+#define UTILS_ENTER_CRITICAL_SECTION( ) uint32_t primask_bit = __get_PRIMASK( );\
+ __disable_irq( )
+
+#define UTILS_EXIT_CRITICAL_SECTION( ) __set_PRIMASK( primask_bit )
+
+#define UTILS_MEMSET8( dest, value, size ) memset( dest, value, size);
+
+/******************************************************************************
+ * tiny low power manager
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_LPM_INIT_CRITICAL_SECTION( )
+#define UTIL_LPM_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_LPM_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
+
+/******************************************************************************
+ * sequencer
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_SEQ_INIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_SEQ_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_CONF_TASK_NBR (32)
+#define UTIL_SEQ_CONF_PRIO_NBR (2)
+#define UTIL_SEQ_MEMSET8( dest, value, size ) UTILS_MEMSET8( dest, value, size )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*UTILITIES_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/app_entry.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/app_entry.c
new file mode 100644
index 000000000..7e59c6279
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/app_entry.c
@@ -0,0 +1,418 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file app_entry.c
+ * @author MCD Application Team
+ * @brief Entry point of the Application
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "app_entry.h"
+#include "app_ble_lld.h"
+#include "app_conf.h"
+#include "hw_conf.h"
+#include "stm32_seq.h"
+#include "stm_logging.h"
+#include "shci_tl.h"
+#include "stm32_lpm.h"
+#include "dbg_trace.h"
+#include "shci.h"
+#include "chat_app.h"
+
+/* Private includes -----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private defines -----------------------------------------------------------*/
+/* POOL_SIZE = 2(TL_PacketHeader_t) + 258 (3(TL_EVT_HDR_SIZE) + 255(Payload size)) */
+#define POOL_SIZE (CFG_TL_EVT_QUEUE_LENGTH * 4U * DIVC(( sizeof(TL_PacketHeader_t) + TL_EVENT_FRAME_SIZE ), 4U))
+
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macros ------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t EvtPool[POOL_SIZE];
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t SystemCmdBuffer;
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t SystemSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255U];
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Global function prototypes -----------------------------------------------*/
+#if(CFG_DEBUG_TRACE != 0)
+size_t DbgTraceWrite(int handle, const unsigned char * buf, size_t bufSize);
+#endif
+
+/* USER CODE BEGIN GFP */
+
+/* USER CODE END GFP */
+
+/* Private functions prototypes-----------------------------------------------*/
+static void SystemPower_Config( void );
+static void Init_Debug( void );
+static void appe_Tl_Init( void );
+static void APPE_SysStatusNot( SHCI_TL_CmdStatus_t status );
+static void APPE_SysUserEvtRx( void * pPayload );
+static void APPE_SysEvtReadyProcessing( void );
+static void APPE_SysEvtError( SCHI_SystemErrCode_t ErrorCode);
+
+/* USER CODE BEGIN PFP */
+static void Led_Init( void );
+static void Button_Init( void );
+/* USER CODE END PFP */
+
+/* Functions Definition ------------------------------------------------------*/
+void APPE_Init( void )
+{
+ /**< Configure the system Power Mode */
+ SystemPower_Config();
+
+/* USER CODE BEGIN APPE_Init_1 */
+ /* initialize debugger module if supported and debug trace if activated */
+ Init_Debug();
+
+ Led_Init();
+ Button_Init();
+
+/* USER CODE END APPE_Init_1 */
+ /* Initialize all transport layers and start CPU2 which will send back a ready event to CPU1 */
+ appe_Tl_Init();
+
+ /**
+ * From now, the application is waiting for the ready event ( sub event : SHCI_SUB_EVT_CODE_READY / payload : WIRELESS_FW_RUNNING)
+ * received on the system channel before starting the LLD test appli using system message SHCI_OPCODE_C2_LLD_TESTS_INIT
+ * This system event is received with APPE_SysUserEvtRx()
+ */
+/* USER CODE BEGIN APPE_Init_2 */
+
+/* USER CODE END APPE_Init_2 */
+ return;
+}
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+static void Init_Debug( void )
+{
+#if (CFG_DEBUGGER_SUPPORTED == 1)
+ /**
+ * Keep debugger enabled while in any low power mode
+ */
+ HAL_DBGMCU_EnableDBGSleepMode();
+
+ /* Enable debugger EXTI lines */
+ LL_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+ LL_C2_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+
+#else
+ /* Disable debugger EXTI lines */
+ LL_EXTI_DisableIT_32_63(LL_EXTI_LINE_48);
+ LL_C2_EXTI_DisableIT_32_63(LL_EXTI_LINE_48);
+
+ /**
+ * Do not keep debugger enabled while in any low power mode
+ */
+ HAL_DBGMCU_DisableDBGSleepMode();
+ HAL_DBGMCU_DisableDBGStopMode();
+ HAL_DBGMCU_DisableDBGStandbyMode();
+#endif /* (CFG_DEBUGGER_SUPPORTED == 1) */
+
+#if(CFG_DEBUG_TRACE != 0)
+ DbgTraceInit();
+#endif
+
+ /* Send a first trace to debug trace port to see that M4 is alive */
+ APP_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ APP_DBG("traces init done on M4");
+ APP_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+ return;
+}
+
+/**
+ * @brief Configure the system for power optimization
+ *
+ * @note This API configures the system to be ready for low power mode
+ *
+ * @param None
+ * @retval None
+ */
+static void SystemPower_Config( void )
+{
+ // Disable internal wake-up which is active by default and is for RTC wake-up
+ LL_PWR_DisableInternWU();
+
+ // Before going to stop or standby modes, do the settings so that system clock and IP80215.4 clock
+ // start on HSI automatically
+ LL_RCC_HSI_EnableAutoFromStop();
+
+ /**
+ * Select HSI as system clock source after Wake Up from Stop mode
+ */
+ LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+ /* Initialize low power manager */
+ UTIL_LPM_Init( );
+
+ /* Disable low power mode until INIT is complete */
+ UTIL_LPM_SetOffMode(1 << CFG_LPM_APP, UTIL_LPM_DISABLE);
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP, UTIL_LPM_DISABLE);
+
+ return;
+}
+
+static void appe_Tl_Init( void )
+{
+ TL_MM_Config_t tl_mm_config;
+ SHCI_TL_HciInitConf_t SHci_Tl_Init_Conf;
+
+ /**< Reference table initialization */
+ TL_Init();
+
+ /**< System channel initialization */
+ UTIL_SEQ_RegTask( 1<< CFG_TASK_SYSTEM_HCI_ASYNCH_EVT, UTIL_SEQ_RFU, shci_user_evt_proc );
+ SHci_Tl_Init_Conf.p_cmdbuffer = (uint8_t*)&SystemCmdBuffer;
+ SHci_Tl_Init_Conf.StatusNotCallBack = APPE_SysStatusNot;
+ shci_init(APPE_SysUserEvtRx, (void*) &SHci_Tl_Init_Conf);
+
+ /**< Memory Manager channel initialization */
+ tl_mm_config.p_BleSpareEvtBuffer = 0;
+ tl_mm_config.p_SystemSpareEvtBuffer = SystemSpareEvtBuffer;
+ tl_mm_config.p_AsynchEvtPool = EvtPool;
+ tl_mm_config.AsynchEvtPoolSize = POOL_SIZE;
+ TL_MM_Init( &tl_mm_config );
+
+ /* Enable transport layer and start CPU2 */
+ TL_Enable();
+
+ return;
+}
+
+static void APPE_SysStatusNot( SHCI_TL_CmdStatus_t status )
+{
+ UNUSED(status);
+ return;
+}
+
+/**
+ * The type of the payload for a system user event is tSHCI_UserEvtRxParam
+ * When the system event is both :
+ * - a ready event (subevtcode = SHCI_SUB_EVT_CODE_READY)
+ * - reported by the FUS (sysevt_ready_rsp == FUS_FW_RUNNING)
+ * The buffer shall not be released
+ * ( eg ((tSHCI_UserEvtRxParam*)pPayload)->status shall be set to SHCI_TL_UserEventFlow_Disable )
+ * When the status is not filled, the buffer is released by default
+ */
+static void APPE_SysUserEvtRx( void * pPayload )
+{
+ TL_AsynchEvt_t *p_sys_event;
+ p_sys_event = (TL_AsynchEvt_t*)(((tSHCI_UserEvtRxParam*)pPayload)->pckt->evtserial.evt.payload);
+
+ switch(p_sys_event->subevtcode)
+ {
+ case SHCI_SUB_EVT_CODE_READY:
+ if (p_sys_event->payload[0] == WIRELESS_FW_RUNNING)
+ APPE_SysEvtReadyProcessing();
+ break;
+
+ case SHCI_SUB_EVT_ERROR_NOTIF:
+ APPE_SysEvtError((SCHI_SystemErrCode_t) (p_sys_event->payload[0]));
+ break;
+
+ default:
+ break;
+ }
+ return;
+}
+
+/**
+ * @brief Notify a system error coming from the M0 firmware
+ * @param ErrorCode : errorCode detected by the M0 firmware
+ *
+ * @retval None
+ */
+static void APPE_SysEvtError( SCHI_SystemErrCode_t ErrorCode)
+{
+ switch(ErrorCode)
+ {
+ case ERR_THREAD_LLD_FATAL_ERROR:
+ APP_DBG("** ERR_LLD_TESTS : LLD_FATAL_ERROR \n");
+ break;
+
+ case ERR_THREAD_UNKNOWN_CMD:
+ APP_DBG("** ERR_LLD_TESTS : UNKNOWN_CMD \n");
+ break;
+
+ default:
+ APP_DBG("** ERR_LLD_TESTS : ErroCode=%d \n",ErrorCode);
+ break;
+ }
+ return;
+}
+
+static void APPE_SysEvtReadyProcessing( void )
+{
+ /* Traces channel initialization */
+ TL_TRACES_Init( );
+
+ /* Application specific init */
+ CHAT_APP_Init();
+
+#if ( CFG_LPM_SUPPORTED == 1)
+ /* Thread stack is initialized, low power mode can be enabled */
+ UTIL_LPM_SetOffMode(1U << CFG_LPM_APP, UTIL_LPM_ENABLE);
+ UTIL_LPM_SetStopMode(1U << CFG_LPM_APP, UTIL_LPM_ENABLE);
+#endif
+
+ return;
+}
+
+/* USER CODE BEGIN FD_LOCAL_FUNCTIONS */
+static void Led_Init( void )
+{
+#if (CFG_LED_SUPPORTED == 1U)
+ /**
+ * Leds Initialization
+ */
+#if (CFG_HW_LPUART1_ENABLED != 1) || ! defined (STM32WB35xx)
+ // On WB35, LED_BLUE share the GPIO PB5 with LPUART
+ BSP_LED_Init(LED_BLUE);
+#endif
+ BSP_LED_Init(LED_GREEN);
+ BSP_LED_Init(LED_RED);
+#endif
+
+ return;
+}
+
+static void Button_Init( void )
+{
+#if (CFG_BUTTON_SUPPORTED == 1U)
+ /**
+ * Button Initialization
+ */
+ BSP_PB_Init(BUTTON_SW1, BUTTON_MODE_EXTI);
+ BSP_PB_Init(BUTTON_SW2, BUTTON_MODE_EXTI);
+ BSP_PB_Init(BUTTON_SW3, BUTTON_MODE_EXTI);
+
+#endif
+
+ return;
+}
+
+/* USER CODE END FD_LOCAL_FUNCTIONS */
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+
+void UTIL_SEQ_Idle( void )
+{
+ /* Note that WFI (i.e. SLEEP mode) is required for SF timer tests but STOP or OFF mode will be managed by low-power test itself */
+#if ( CFG_LPM_SUPPORTED == 1)
+ UTIL_LPM_EnterLowPower( );
+#endif
+ return;
+}
+
+void shci_notify_asynch_evt(void* pdata)
+{
+ UNUSED(pdata);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_SYSTEM_HCI_ASYNCH_EVT, CFG_SCH_PRIO_0);
+ return;
+}
+
+void shci_cmd_resp_release(uint32_t flag)
+{
+ UNUSED(flag);
+ UTIL_SEQ_SetEvt(1U << CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP);
+ return;
+}
+
+void shci_cmd_resp_wait(uint32_t timeout)
+{
+ UNUSED(timeout);
+ UTIL_SEQ_WaitEvt(1U << CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP);
+ return;
+}
+
+/* Received trace buffer from M0 */
+void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt )
+{
+#if(CFG_DEBUG_TRACE != 0)
+ /* Call write/print function using DMA from dbg_trace */
+ /* - Cast to TL_AsynchEvt_t* to get "real" payload (without Sub Evt code 2bytes),
+ - (-2) to size to remove Sub Evt Code */
+ DbgTraceWrite(1U, (const unsigned char *) ((TL_AsynchEvt_t *)(hcievt->evtserial.evt.payload))->payload, hcievt->evtserial.evt.plen - 2U);
+#endif /* CFG_DEBUG_TRACE */
+ /* Release buffer */
+ TL_MM_EvtDone( hcievt );
+}
+/**
+ * @brief Initialisation of the trace mechanism
+ * @param None
+ * @retval None
+ */
+#if(CFG_DEBUG_TRACE != 0)
+void DbgOutputInit( void )
+{
+/* USER CODE BEGIN DbgOutputInit */
+#ifdef CFG_DEBUG_TRACE_UART
+ MX_UART_Init(CFG_DEBUG_TRACE_UART);
+#endif
+ return;
+}
+
+/**
+ * @brief Management of the traces
+ * @param p_data : data
+ * @param size : size
+ * @param call-back :
+ * @retval None
+ */
+void DbgOutputTraces( uint8_t *p_data, uint16_t size, void (*cb)(void) )
+{
+ HW_UART_Transmit_DMA(CFG_DEBUG_TRACE_UART, p_data, size, cb);
+
+ return;
+}
+#endif
+
+/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
+
+/* USER CODE END FD_WRAP_FUNCTIONS */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/gpio_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/gpio_lld.c
new file mode 100644
index 000000000..1ccb7b42f
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/gpio_lld.c
@@ -0,0 +1,132 @@
+/**
+ ******************************************************************************
+ * @file gpio_lld.c
+ * @author MCD Application Team
+ * @version $VERSION$
+ * @date $DATE$
+ * @brief This file contains the init of all the GPIOs used by LLD tests.
+ * It is to be used on both M0 and M4.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+// Be carrefull with the .h included as this file must be compilable on both M0 and M4 environments
+#include "app_conf.h"
+#include "gpio_lld.h"
+
+/* Set PHY GPIO_HARD_FAULT to '1' */
+void gpio_lld_phy_gpioHardFault_up(void) {
+ HAL_GPIO_WritePin(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN, GPIO_PIN_SET);
+}
+
+/* Set PHY GPIO_HARD_FAULT to '0' */
+void gpio_lld_phy_gpioHardFault_down(void) {
+ HAL_GPIO_WritePin(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN, GPIO_PIN_RESET);
+}
+
+/* Initialize GPIOs used by USART */
+void gpio_lld_usart_init(void)
+{
+ GPIO_InitTypeDef gpioinitstruct = {0};
+
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ USART_TX_GPIO_CLK_ENABLE();
+ USART_RX_GPIO_CLK_ENABLE();
+
+ /* Common configuration to Tx and Rx */
+ gpioinitstruct.Mode = GPIO_MODE_AF_PP;
+ gpioinitstruct.Pull = GPIO_NOPULL;
+ gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+ /* Configure USART Tx */
+ gpioinitstruct.Pin = USART_TX_PIN;
+ gpioinitstruct.Alternate = USART_TX_AF;
+ HAL_GPIO_Init(USART_TX_GPIO_PORT, &gpioinitstruct);
+
+ /* Configure USART Rx */
+ gpioinitstruct.Pin = USART_RX_PIN;
+ gpioinitstruct.Alternate = USART_RX_AF;
+ HAL_GPIO_Init(USART_RX_GPIO_PORT, &gpioinitstruct);
+
+ /*** Configure the USART peripheral ***/
+ /* Enable USART clock */
+ USART_CLK_ENABLE();
+}
+
+/* De-initialize GPIOs used by USART */
+void gpio_lld_usart_deInit(void) {
+ HAL_GPIO_DeInit(USART_TX_GPIO_PORT, USART_TX_PIN);
+ HAL_GPIO_DeInit(USART_RX_GPIO_PORT, USART_RX_PIN);
+ /* Do not disable clocks as they could be used by others GPIOs and it seems
+ to not need power in STOP mode */
+}
+
+/* Initialize GPIOs used by LPUART */
+void gpio_lld_lpuart_init(void)
+{
+ GPIO_InitTypeDef gpioinitstruct = {0};
+
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ LPUART_TX_GPIO_CLK_ENABLE();
+ LPUART_RX_GPIO_CLK_ENABLE();
+
+ /* Common configuration to Tx and Rx */
+ gpioinitstruct.Mode = GPIO_MODE_AF_PP;
+ gpioinitstruct.Pull = GPIO_NOPULL;
+ gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+ /* Configure LPUART Tx */
+ gpioinitstruct.Pin = LPUART_TX_PIN;
+ gpioinitstruct.Alternate = LPUART_TX_AF;
+ HAL_GPIO_Init(LPUART_TX_GPIO_PORT, &gpioinitstruct);
+
+ /* Configure LPUART Rx */
+ gpioinitstruct.Pin = LPUART_RX_PIN;
+ gpioinitstruct.Alternate = LPUART_RX_AF;
+ HAL_GPIO_Init(LPUART_RX_GPIO_PORT, &gpioinitstruct);
+
+ /*** Configure the LPUART peripheral ***/
+ /* Enable LPUART clock */
+ LPUART_CLK_ENABLE();
+}
+
+/* De-initialize GPIOs used by LPUART */
+void gpio_lld_lpuart_deInit(void) {
+ HAL_GPIO_DeInit(LPUART_TX_GPIO_PORT, LPUART_TX_PIN);
+ HAL_GPIO_DeInit(LPUART_RX_GPIO_PORT, LPUART_RX_PIN);
+ /* Do not disable clocks as they could be used by others GPIOs and it seems
+ to not need power in STOP mode */
+}
+
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/hw_uart.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/hw_uart.c
new file mode 100644
index 000000000..3c842b29a
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/hw_uart.c
@@ -0,0 +1,442 @@
+/**
+ ******************************************************************************
+ * File Name : Src/hw_uart.c
+ * Description : HW UART source file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+
+/* Macros --------------------------------------------------------------------*/
+#define HW_UART_RX_IT(__HANDLE__, __USART_BASE__) \
+ do{ \
+ HW_##__HANDLE__##RxCb = cb; \
+ (__HANDLE__).Instance = (__USART_BASE__); \
+ hal_status = HAL_UART_Receive_IT(&(__HANDLE__), p_data, size); \
+ } while(0)
+
+#define HW_UART_TX_IT(__HANDLE__, __USART_BASE__) \
+ do{ \
+ HW_##__HANDLE__##TxCb = cb; \
+ (__HANDLE__).Instance = (__USART_BASE__); \
+ hal_status = HAL_UART_Transmit_IT(&(__HANDLE__), p_data, size); \
+ } while(0)
+
+#define HW_UART_TX(__HANDLE__, __USART_BASE__) \
+ do{ \
+ (__HANDLE__).Instance = (__USART_BASE__); \
+ hal_status = HAL_UART_Transmit(&(__HANDLE__), p_data, size, timeout); \
+ } while(0)
+
+/* Variables -----------------------------------------------------------------*/
+#if (CFG_HW_USART1_ENABLED == 1)
+UART_HandleTypeDef huart1;
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+DMA_HandleTypeDef hdma_usart1_tx;
+#endif
+void (*HW_huart1RxCb)(void);
+void (*HW_huart1TxCb)(void);
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+UART_HandleTypeDef hlpuart1;
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+DMA_HandleTypeDef hdma_lpuart1_tx;
+#endif
+void (*HW_hlpuart1RxCb)(void);
+void (*HW_hlpuart1TxCb)(void);
+#endif
+
+/* Functions Definition ------------------------------------------------------*/
+
+void MX_UART_Init(hw_uart_id_t uart)
+{
+ UART_HandleTypeDef *handle = NULL;
+ USART_TypeDef *instance = NULL;
+ switch(uart){
+ case hw_uart1:
+#if (CFG_HW_USART1_ENABLED != 1)
+ return;
+#endif
+ handle = &huart1;
+ instance = USART1;
+ break;
+ case hw_lpuart1:
+#if (CFG_HW_LPUART1_ENABLED != 1)
+ return;
+#endif
+ handle = &hlpuart1;
+ instance = LPUART1;
+ break;
+ default: Error_Handler();
+ }
+ handle->Instance = instance;
+ handle->Init.BaudRate = 115200;
+ handle->Init.WordLength = UART_WORDLENGTH_8B;
+ handle->Init.StopBits = UART_STOPBITS_1;
+ handle->Init.Parity = UART_PARITY_NONE;
+ handle->Init.Mode = UART_MODE_TX_RX;
+ handle->Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ handle->Init.OverSampling = UART_OVERSAMPLING_16;
+ handle->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ handle->Init.ClockPrescaler = UART_PRESCALER_DIV1;
+ handle->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ handle->FifoMode = UART_FIFOMODE_DISABLE;
+ if (HAL_UART_Init(handle) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetTxFifoThreshold(handle, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetRxFifoThreshold(handle, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_DisableFifoMode(handle) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+void MX_UART_Deinit(hw_uart_id_t uart)
+{
+ UART_HandleTypeDef *handle = NULL;
+ switch(uart){
+ case hw_uart1:
+#if (CFG_HW_USART1_ENABLED != 1)
+ return;
+#endif
+ handle = &huart1;
+ break;
+ case hw_lpuart1:
+#if (CFG_HW_LPUART1_ENABLED != 1)
+ return;
+#endif
+ handle = &hlpuart1;
+ break;
+ default: Error_Handler();
+ }
+ if (HAL_UART_DeInit(handle) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+hw_status_t HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_UART_RX_IT(huart1, USART1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_UART_RX_IT(hlpuart1, LPUART1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+hw_status_t HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_UART_TX_IT(huart1, USART1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_UART_TX_IT(hlpuart1, LPUART1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, uint32_t timeout)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_UART_TX(huart1, USART1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_UART_TX(hlpuart1, LPUART1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_huart1TxCb = cb;
+ huart1.Instance = USART1;
+ hal_status = HAL_UART_Transmit_DMA(&huart1, p_data, size);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_hlpuart1TxCb = cb;
+ hlpuart1.Instance = LPUART1;
+ hal_status = HAL_UART_Transmit_DMA(&hlpuart1, p_data, size);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+#if 0
+void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id)
+{
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HAL_UART_IRQHandler(&huart1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HAL_UART_IRQHandler(&hlpuart1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+
+void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id)
+{
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+ case hw_uart1:
+ HAL_DMA_IRQHandler(huart1.hdmatx);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+ case hw_lpuart1:
+ HAL_DMA_IRQHandler(hlpuart1.hdmatx);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+#endif
+
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+ switch ((uint32_t)huart->Instance)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case (uint32_t)USART1:
+ if(HW_huart1RxCb)
+ {
+ HW_huart1RxCb();
+ }
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case (uint32_t)LPUART1:
+ if(HW_hlpuart1RxCb)
+ {
+ HW_hlpuart1RxCb();
+ }
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+ switch ((uint32_t)huart->Instance)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case (uint32_t)USART1:
+ if(HW_huart1TxCb)
+ {
+ HW_huart1TxCb();
+ }
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case (uint32_t)LPUART1:
+ if(HW_hlpuart1TxCb)
+ {
+ HW_hlpuart1TxCb();
+ }
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/main.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/main.c
new file mode 100644
index 000000000..06aa251c7
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/main.c
@@ -0,0 +1,605 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file main.c
+ * @author MCD Application Team
+ * @brief RF LLD tests application
+ *
+ @verbatim
+ ==============================================================================
+ ##### IMPORTANT NOTE #####
+ ==============================================================================
+
+ This application requests having a M0 LLD tests binary
+ flashed on the Wireless Coprocessor.
+ If it is not the case, you need to use STM32CubeProgrammer to load the appropriate
+ binary.
+
+ All available binaries are located under following directory:
+ /Projects/STM32_Copro_Wireless_Binaries
+
+ Refer to UM2237 to learn how to use/install STM32CubeProgrammer.
+ Refer to /Projects/STM32_Copro_Wireless_Binaries/ReleaseNote.html for the
+ detailed procedure to change the Wireless Coprocessor binary.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "app_entry.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32_lpm.h"
+#include "stm32_seq.h"
+#include "dbg_trace.h"
+#include "hw_conf.h"
+#include "otp.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+TIM_HandleTypeDef htim2;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+static void MX_DMA_Init(void);
+static void MX_TIM2_Init(void);
+
+/* USER CODE BEGIN PFP */
+static void SystemClock_Config(void);
+static void PeriphClock_Config(void);
+static void Reset_Device( void );
+static void Reset_IPCC( void );
+static void Reset_BackupDomain( void );
+static void Init_Exti( void );
+static void Config_HSE(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /**
+ * The OPTVERR flag is wrongly set at power on
+ * It shall be cleared before using any HAL_FLASH_xxx() api
+ */
+ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+ Reset_Device();
+ Config_HSE();
+ /* USER CODE END Init */
+
+ /* Configure the system clock on HSE without using PLL and the periph clock needed by this application */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ PeriphClock_Config();
+ Init_Exti();
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_DMA_Init();
+ MX_TIM2_Init();
+ /* USER CODE BEGIN 2 */
+ if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE END 2 */
+
+ /* Init code for STM32_WPAN */
+ APPE_Init();
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ UTIL_SEQ_Run( UTIL_SEQ_DEFAULT );
+ /* USER CODE END WHILE */
+
+ /* USER CODE END WHILE */
+ }
+ /* USER CODE BEGIN 3 */
+
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration : API to be called to use HSE (with or without PLL use) as 32Mhz system clock.
+ SystemClock_Config_HSE() must be called once just after boot (to go from default MSI to HSE).
+ Then application user can call both SystemClock_Config_HSE() and SystemClock_Config_MSI() at any time.
+ * @retval None
+ */
+void SystemClock_Config_HSE(uint32_t usePLL)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /* First, just set MSI ON (with the 32Mhz range) in case it was OFF, without any update on PLL */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_10;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+ /* Select MSI as system clock in order to be able to update HSE and PLL configuration */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Configure HSE and PLL if needed*/
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ if (usePLL == 1)
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ else
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Configure the system clock source and the dividers according to the fact that system clock source is 32Mhz */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+ RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ if (usePLL == 1)
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ else
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ // Note that function UTILS_SetFlashLatency() could be used to set the correct Flash latency
+ // (with 32Mhz, 2WS are needed if the range is changed to 1V instead of 1.2V)
+
+ /* Disable MSI Oscillator as the MSI is no more needed by the application */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* No update on PLL */
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief System Clock Configuration : API to be called to use MSI (with or without PLL use) as 32Mhz system clock.
+ SystemClock_Config_HSE() must be called once just after boot (to go from default MSI to HSE).
+ Then application user can call both SystemClock_Config_HSE() and SystemClock_Config_MSI() at any time.
+ * @retval None
+ */
+void SystemClock_Config_MSI(uint32_t usePLL)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /* First, just set HSE ON (with the 32Mhz range) in case it was OFF, without any update on PLL */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+ /* Select HSE as system clock in order to be able to update MSI and PLL configuration */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Configure MSI and PLL if needed*/
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_10;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ if (usePLL == 1)
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ else
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Configure the system clock source and the dividers according to the fact that system clock source is 32Mhz */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+ RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ if (usePLL == 1)
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ else
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+/* HSE cannot be stopped while using RF */
+#if 0
+ /* Disable HSE Oscillator as the HSE is no more needed by the application */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* No update on PLL */
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+#endif
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+/**
+ * @brief System Clock Configuration : must be called during application start-up
+ * @retval None
+ */
+static void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+ /* Configure LSE Drive Capability */
+ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+
+ /* Assuming that MSI is enabled by default after boot, lets go to HSE without using PLL */
+ SystemClock_Config_HSE(0);
+
+ /* Configure Others clock */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI |
+ RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI2;
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+ RCC_OscInitStruct.LSI2CalibrationValue = 0;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel4_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
+ /* DMA1_Channel5_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+}
+
+static void PeriphClock_Config(void)
+{
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+#if USE_SMPS_ENABLED_BY_DEFAULT
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+ PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
+ PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Initialize SMPS here like in BLE applis */
+ LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+ LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+ LL_PWR_SMPS_Enable();
+#else
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+#endif
+
+ return;
+}
+
+static void Config_HSE(void)
+{
+ OTP_ID0_t * p_otp;
+
+ /**
+ * Read HSE_Tuning from OTP
+ */
+ p_otp = (OTP_ID0_t *) OTP_Read(0);
+ if (p_otp)
+ {
+ LL_RCC_HSE_SetCapacitorTuning(p_otp->hse_tuning);
+ }
+
+ return;
+}
+
+
+static void Reset_Device( void )
+{
+#if ( CFG_HW_RESET_BY_FW == 1 )
+ Reset_BackupDomain();
+
+ Reset_IPCC();
+#endif
+
+ return;
+}
+
+static void Reset_IPCC( void )
+{
+ LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC);
+
+ LL_C1_IPCC_ClearFlag_CHx(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_ClearFlag_CHx(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C1_IPCC_DisableTransmitChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_DisableTransmitChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C1_IPCC_DisableReceiveChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_DisableReceiveChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ return;
+}
+
+static void Reset_BackupDomain( void )
+{
+ if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE))
+ {
+ HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
+
+ /**
+ * Write twice the value to flush the APB-AHB bridge
+ * This bit shall be written in the register before writing the next one
+ */
+ HAL_PWR_EnableBkUpAccess();
+
+ __HAL_RCC_BACKUPRESET_FORCE();
+ __HAL_RCC_BACKUPRESET_RELEASE();
+ }
+
+ return;
+}
+
+static void Init_Exti( void )
+{
+ /**< Disable all wakeup interrupt on CPU1 except LPUART(25), IPCC(36), HSEM(38) */
+ LL_EXTI_DisableIT_0_31( (~0) & (~(LL_EXTI_LINE_25)) );
+ LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) );
+
+ return;
+}
+
+/**
+ * @brief TIM2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM2_Init(void)
+{
+
+ /* USER CODE BEGIN TIM2_Init 0 */
+
+ /* USER CODE END TIM2_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+ /* USER CODE BEGIN TIM2_Init 1 */
+
+ /* USER CODE END TIM2_Init 1 */
+ htim2.Instance = TIM2;
+ htim2.Init.Prescaler = PRESCALER_VALUE;
+ htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim2.Init.Period = PERIOD_VALUE;
+ htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM2_Init 2 */
+
+ /* USER CODE END TIM2_Init 2 */
+
+}
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+void HAL_Delay(uint32_t Delay)
+{
+ uint32_t tickstart = HAL_GetTick();
+ uint32_t wait = Delay;
+
+ /* Add a freq to guarantee minimum wait */
+ if (wait < HAL_MAX_DELAY)
+ {
+ wait += HAL_GetTickFreq();
+ }
+
+ while ((HAL_GetTick() - tickstart) < wait)
+ {
+ /************************************************************************************
+ * ENTER SLEEP MODE
+ ***********************************************************************************/
+ LL_LPM_EnableSleep( ); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+ #if defined ( __CC_ARM)
+ __force_stores();
+ #endif
+
+ __WFI( );
+ }
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ BSP_LED_On(LED_BLUE);
+ /* USER CODE BEGIN Error_Handler */
+ /* User can add his own implementation to report the HAL error return state */
+ /* USER CODE END Error_Handler */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN assert_failed */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END assert_failed */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/standby_stm32wb15.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/standby_stm32wb15.c
new file mode 100644
index 000000000..a0a8b4839
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/standby_stm32wb15.c
@@ -0,0 +1,159 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : standby_stm32wb15.c
+ * Description : Application configuration file for STM32WPAN Middleware.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "app_entry.h"
+#include "app_common.h"
+#include "app_debug.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+uint32_t backup_MSP;
+uint32_t backup_IPCC_C1MR;
+uint32_t boot_after_standby;
+extern RTC_HandleTypeDef hrtc;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+uint32_t standby_boot_mng(void);
+void standby_hw_save(void);
+void standby_hw_restore(void);
+/* USER CODE BEGIN PFP */
+void SystemClock_Config(void); // may be declared in main.h file ???
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*******************************************************************************
+ * This part may be updated by the user
+ ******************************************************************************/
+
+ /**
+ * @brief standby_hw_save function, saves hardware context to restore
+ * @param None
+ * @retval None
+ */
+void standby_hw_save(void)
+{
+ backup_IPCC_C1MR = READ_REG(IPCC->C1MR);
+
+ /* USER CODE BEGIN standby_hw_save */
+
+ /* USER CODE END standby_hw_save */
+ return;
+}
+
+ /**
+ * @brief standby_hw_restore function, restore and reconfigure hardware context
+ * @param None
+ * @retval None
+ */
+void standby_hw_restore(void)
+{
+ /* USER CODE BEGIN standby_hw_restore_1 */
+
+ /* USER CODE END standby_hw_restore_1 */
+
+ APPD_Init();
+
+ SystemClock_Config();
+
+ HAL_Init();
+
+ /* In this user section add MX init functions present in main.c , except MX_RTC_Init() */
+ /* USER CODE BEGIN standby_hw_restore_2 */
+
+ Init_Exti();
+ MX_GPIO_Init();
+ MX_DMA_Init();
+ MX_USART1_UART_Init();
+
+ /* USER CODE END standby_hw_restore_2 */
+
+ HW_IPCC_Init();
+ HW_IPCC_Enable();
+ WRITE_REG(IPCC->C1MR, backup_IPCC_C1MR);
+
+ HW_TS_Init(hw_ts_InitMode_Limited, &hrtc);
+
+ LL_PWR_EnableSRAM2Retention();
+
+ /* USER CODE BEGIN standby_hw_restore_3 */
+ APPE_Led_Init();
+ APPE_Button_Init();
+ /* USER CODE END standby_hw_restore_3 */
+
+ return;
+}
+
+/*******************************************************************************
+ * Do not update code from this limit.
+ ******************************************************************************/
+
+ /**
+ * @brief standby_boot_mng function, will restore MCU context if wakeup from standby
+ * @param None
+ * @retval None
+ */
+uint32_t standby_boot_mng(void)
+{
+#if ( CFG_LPM_STANDBY_SUPPORTED != 0 )
+ if( __HAL_PWR_GET_FLAG(PWR_FLAG_SB) != RESET )
+ {
+ __disable_irq( );
+
+ boot_after_standby = 1;
+ __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB);
+ }else{
+ boot_after_standby = 0;
+ }
+#else
+ boot_after_standby = 0;
+#endif
+
+ return boot_after_standby;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32_lpm_if.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32_lpm_if.c
new file mode 100644
index 000000000..e4e8fd597
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32_lpm_if.c
@@ -0,0 +1,288 @@
+ /*******************************************************************************
+ * @file stm32_lpm_if.c
+ * @author MCD Application Team
+ * @brief Low layer function to enter/exit low power modes (stop, sleep)
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32_lpm_if.h"
+#include "stm32_lpm.h"
+#include "app_conf.h"
+/* USER CODE BEGIN include */
+
+/* USER CODE END include */
+
+/* Exported variables --------------------------------------------------------*/
+const struct UTIL_LPM_Driver_s UTIL_PowerDriver =
+{
+ PWR_EnterSleepMode,
+ PWR_ExitSleepMode,
+
+ PWR_EnterStopMode,
+ PWR_ExitStopMode,
+
+ PWR_EnterOffMode,
+ PWR_ExitOffMode,
+};
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN Private_Function_Prototypes */
+static void Switch_On_HSI( void );
+
+/* USER CODE END Private_Function_Prototypes */
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN Private_Typedef */
+
+/* USER CODE END Private_Typedef */
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Private_Define */
+
+/* USER CODE END Private_Define */
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Private_Macro */
+
+/* USER CODE END Private_Macro */
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Private_Variables */
+
+/* USER CODE END Private_Variables */
+
+/**
+ * @brief Enters Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_EnterOffMode( void )
+{
+/* USER CODE BEGIN PWR_EnterOffMode */
+
+ /**
+ * The systick should be disabled for the same reason than when the device enters stop mode because
+ * at this time, the device may enter either OffMode or StopMode.
+ */
+ HAL_SuspendTick();
+
+ /************************************************************************************
+ * ENTER OFF MODE
+ ***********************************************************************************/
+ /*
+ * There is no risk to clear all the WUF here because in the current implementation, this API is called
+ * in critical section. If an interrupt occurs while in that critical section before that point,
+ * the flag is set and will be cleared here but the system will not enter Off Mode
+ * because an interrupt is pending in the NVIC. The ISR will be executed when moving out
+ * of this critical section
+ */
+ LL_PWR_ClearFlag_WU( );
+
+ LL_PWR_SetPowerMode( LL_PWR_MODE_STANDBY );
+
+ LL_LPM_EnableDeepSleep( ); /**< Set SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+#if defined ( __CC_ARM)
+ __force_stores( );
+#endif
+
+ __WFI( );
+/* USER CODE END PWR_EnterOffMode */
+}
+
+/**
+ * @brief Exits Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_ExitOffMode( void )
+{
+/* USER CODE BEGIN PWR_ExitOffMode */
+
+ HAL_ResumeTick();
+
+/* USER CODE END PWR_ExitOffMode */
+}
+
+/**
+ * @brief Enters Low Power Stop Mode
+ * @note ARM exists the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterStopMode( void )
+{
+/* USER CODE BEGIN PWR_EnterStopMode */
+ /**
+ * When HAL_DBGMCU_EnableDBGStopMode() is called to keep the debugger active in Stop Mode,
+ * the systick shall be disabled otherwise the cpu may crash when moving out from stop mode
+ *
+ * When in production, the HAL_DBGMCU_EnableDBGStopMode() is not called so that the device can reach best power consumption
+ * However, the systick should be disabled anyway to avoid the case when it is about to expire at the same time the device enters
+ * stop mode ( this will abort the Stop Mode entry ).
+ */
+ HAL_SuspendTick();
+
+ /**
+ * This function is called from CRITICAL SECTION
+ */
+ while( LL_HSEM_1StepLock( HSEM, CFG_HW_RCC_SEMID ) );
+
+ if ( ! LL_HSEM_1StepLock( HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID ) )
+ {
+ if( LL_PWR_IsActiveFlag_C2DS( ) )
+ {
+ /* Release ENTRY_STOP_MODE semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0 );
+
+ /**
+ * The switch on HSI before entering Stop Mode is required on Cut2.0
+ * It is useless from Cut2.1
+ */
+ Switch_On_HSI( );
+ }
+ }
+ else
+ {
+ /**
+ * The switch on HSI before entering Stop Mode is required on Cut2.0
+ * It is useless from Cut2.1
+ */
+ Switch_On_HSI( );
+ }
+
+ /* Release RCC semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_RCC_SEMID, 0 );
+
+ /************************************************************************************
+ * ENTER STOP MODE
+ ***********************************************************************************/
+ LL_PWR_SetPowerMode(CFG_PWR_MODE_STOP);
+
+ LL_LPM_EnableDeepSleep( ); /**< Set SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+#if defined ( __CC_ARM)
+ __force_stores( );
+#endif
+
+ __WFI();
+/* USER CODE END PWR_EnterStopMode */
+}
+
+/**
+ * @brief Exits Low Power Stop Mode
+ * @param none
+ * @retval none
+ */
+void PWR_ExitStopMode( void )
+{
+/* USER CODE BEGIN PWR_ExitStopMode */
+ /**
+ * This function is called from CRITICAL SECTION
+ */
+
+ /* Release ENTRY_STOP_MODE semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0 );
+
+ while( LL_HSEM_1StepLock( HSEM, CFG_HW_RCC_SEMID ) );
+// CCO : Taken from MAC project already validated in low-power
+// if(LL_RCC_GetSysClkSource( ) == LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
+ if(LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSE)
+ {
+ LL_RCC_HSE_Enable( );
+ while(!LL_RCC_HSE_IsReady( ));
+ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSE);
+ while (LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSE);
+ }
+ else
+ {
+ /**
+ * As long as the current application is fine with HSE as system clock source,
+ * there is nothing to do here
+ */
+ }
+
+ /* Release RCC semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_RCC_SEMID, 0 );
+
+ HAL_ResumeTick();
+
+/* USER CODE END PWR_ExitStopMode */
+}
+
+/**
+ * @brief Enters Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterSleepMode( void )
+{
+/* USER CODE BEGIN PWR_EnterSleepMode */
+
+ HAL_SuspendTick();
+
+ /************************************************************************************
+ * ENTER SLEEP MODE
+ ***********************************************************************************/
+ LL_LPM_EnableSleep( ); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+#if defined ( __CC_ARM)
+ __force_stores();
+#endif
+
+ __WFI( );
+/* USER CODE END PWR_EnterSleepMode */
+}
+
+/**
+ * @brief Exits Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_ExitSleepMode( void )
+{
+/* USER CODE BEGIN PWR_ExitSleepMode */
+
+ HAL_ResumeTick();
+
+/* USER CODE END PWR_ExitSleepMode */
+}
+
+/* USER CODE BEGIN Private_Functions */
+/**
+ * @brief Switch the system clock on HSI
+ * @param none
+ * @retval none
+ */
+static void Switch_On_HSI( void )
+{
+ LL_RCC_HSI_Enable( );
+ while(!LL_RCC_HSI_IsReady( ));
+ LL_RCC_SetSysClkSource( LL_RCC_SYS_CLKSOURCE_HSI );
+ LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSI);
+ while (LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSI);
+}
+
+/* USER CODE END Private_Functions */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_hal_msp.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_hal_msp.c
new file mode 100644
index 000000000..b783825ba
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_hal_msp.c
@@ -0,0 +1,286 @@
+/**
+ ******************************************************************************
+ * @file stm32wbxx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file contains the HAL System and Peripheral (UARTs) MSP initialization
+ * and de-initialization functions.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx_hal.h"
+#include "app_common.h"
+#include "gpio_lld.h"
+
+/** @addtogroup STM32WBxx_HAL_Driver
+ * @{
+ */
+
+/** @defgroup HAL_MSP HAL MSP
+ * @brief HAL MSP module.
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes the Global MSP.
+ * @note This function is called from HAL_Init() function to perform system
+ * level initialization (GPIOs, clock, DMA, interrupt).
+ * @retval None
+ */
+void HAL_MspInit(void)
+{
+
+}
+
+/**
+ * @brief DeInitializes the Global MSP.
+ * @note This functiona is called from HAL_DeInit() function to perform system
+ * level de-initialization (GPIOs, clock, DMA, interrupt).
+ * @retval None
+ */
+void HAL_MspDeInit(void)
+{
+
+}
+
+/**
+ * @brief UART MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ HAL_DMA_MuxSyncConfigTypeDef pSyncConfig;
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ if(huart->Instance == LPUART1)
+ {
+ /* USER CODE BEGIN LPUART1_MspInit 0 */
+
+ /* USER CODE END LPUART1_MspInit 0 */
+
+ /* GPIOs configuration */
+ #if(CFG_DEBUG_TRACE != 0)
+ gpio_lld_lpuart_init();
+ #endif
+
+
+ /* LPUART1 DMA Init */
+ /* LPUART1_TX Init */
+ hdma_lpuart1_tx.Instance = DMA1_Channel4;
+ hdma_lpuart1_tx.Init.Request = DMA_REQUEST_LPUART1_TX;
+ hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_lpuart1_tx.Init.Mode = DMA_NORMAL;
+ hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ pSyncConfig.SyncSignalID = HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT;
+ pSyncConfig.SyncPolarity = HAL_DMAMUX_SYNC_NO_EVENT;
+ pSyncConfig.SyncEnable = DISABLE;
+ pSyncConfig.EventEnable = DISABLE;
+ pSyncConfig.RequestNumber = 1;
+ if (HAL_DMAEx_ConfigMuxSync(&hdma_lpuart1_tx, &pSyncConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(huart,hdmatx,hdma_lpuart1_tx);
+
+ /* LPUART1 interrupt Init */
+ HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(LPUART1_IRQn);
+ /* USER CODE BEGIN LPUART1_MspInit 1 */
+
+ /* USER CODE END LPUART1_MspInit 1 */
+ }
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+ if(huart->Instance == USART1)
+ {
+ /* USER CODE BEGIN USART1_MspInit 0 */
+
+ /* USER CODE END USART1_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USART1_CLK_ENABLE();
+
+ /* GPIOs configuration */
+ #if(CFG_DEBUG_TRACE != 0)
+ gpio_lld_usart_init();
+ #endif
+
+
+ /* USART1 DMA Init */
+ /* USART1_TX Init */
+ hdma_usart1_tx.Instance = DMA1_Channel5;
+ hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
+ hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+ hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
+ /* USART1 interrupt Init */
+ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(USART1_IRQn);
+ /* USER CODE BEGIN USART1_MspInit 1 */
+
+ /* USER CODE END USART1_MspInit 1 */
+ }
+#endif
+}
+
+/**
+ * @brief UART MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ if(huart->Instance == LPUART1)
+ {
+ /* USER CODE BEGIN LPUART1_MspDeInit 0 */
+
+ /* USER CODE END LPUART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_LPUART1_CLK_DISABLE();
+
+ /* De-init GPIOs */
+ gpio_lld_lpuart_deInit();
+
+ /* LPUART1 DMA DeInit */
+ HAL_DMA_DeInit(huart->hdmatx);
+
+ /* LPUART1 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(LPUART1_IRQn);
+ /* USER CODE BEGIN LPUART1_MspDeInit 1 */
+
+ /* USER CODE END LPUART1_MspDeInit 1 */
+ }
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+ if(huart->Instance == USART1)
+ {
+ /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+ /* USER CODE END USART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART1_CLK_DISABLE();
+
+ /* De-init GPIOs */
+ gpio_lld_usart_deInit();
+
+
+ /* USART1 DMA DeInit */
+ HAL_DMA_DeInit(huart->hdmatx);
+
+ /* USART1 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(USART1_IRQn);
+ /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+ /* USER CODE END USART1_MspDeInit 1 */
+ }
+#endif
+}
+
+/**
+ * @}
+ */
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspInit 0 */
+
+ /* USER CODE END TIM2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ /* TIM2 interrupt Init */
+ HAL_NVIC_SetPriority(TIM2_IRQn, 3, 0);
+ HAL_NVIC_EnableIRQ(TIM2_IRQn);
+ /* USER CODE BEGIN TIM2_MspInit 1 */
+
+ /* USER CODE END TIM2_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+ /* USER CODE END TIM2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM2_CLK_DISABLE();
+
+ /* TIM2 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(TIM2_IRQn);
+ /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+ /* USER CODE END TIM2_MspDeInit 1 */
+ }
+
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_it.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_it.c
new file mode 100644
index 000000000..43697aaa7
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_it.c
@@ -0,0 +1,333 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32wbxx_it.c
+ * @brief Interrupt Service Routines.
+ *******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "stm32wbxx_it.h"
+#include "gpio_lld.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+extern TIM_HandleTypeDef htim2;
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+ gpio_lld_phy_gpioHardFault_up();
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32WBxx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32wbxx.s). */
+/******************************************************************************/
+/**
+ * @brief This function handles DMA1 channel4 global interrupt.
+ */
+void DMA1_Channel4_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel4_IRQn 0 */
+#if (CFG_HW_LPUART1_ENABLED == 1)
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+ HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
+#endif
+#endif
+ /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel4_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 channel4 global interrupt.
+ */
+void DMA1_Channel5_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel5_IRQn 0 */
+#if (CFG_HW_USART1_ENABLED == 1)
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+ HAL_DMA_IRQHandler(&hdma_usart1_tx);
+#endif
+#endif
+ /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel5_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USART1 global interrupt.
+ */
+void USART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART1_IRQn 0 */
+
+ /* USER CODE END USART1_IRQn 0 */
+#if (CFG_HW_USART1_ENABLED == 1)
+ HAL_UART_IRQHandler(&huart1);
+#endif
+ /* USER CODE BEGIN USART1_IRQn 1 */
+
+ /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles LPUART1 global interrupt.
+ */
+void LPUART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN LPUART1_IRQn 0 */
+
+ /* USER CODE END LPUART1_IRQn 0 */
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ HAL_UART_IRQHandler(&hlpuart1);
+#endif
+ /* USER CODE BEGIN LPUART1_IRQn 1 */
+
+ /* USER CODE END LPUART1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles External line
+ * interrupt request.
+ * @param None
+ * @retval None
+ */
+void BUTTON_SW1_EXTI_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_SW1_PIN);
+}
+
+/**
+ * @brief This function handles External line
+ * interrupt request.
+ * @param None
+ * @retval None
+ */
+void BUTTON_SW2_EXTI_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_SW2_PIN);
+}
+
+/**
+ * @brief This function handles External line
+ * interrupt request.
+ * @param None
+ * @retval None
+ */
+void BUTTON_SW3_EXTI_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_SW3_PIN);
+}
+
+
+void TIM2_IRQHandler(void)
+{
+ HAL_TIM_IRQHandler(&htim2);
+}
+
+
+#if (CFG_LPM_SUPPORTED == 1U)
+void RTC_WKUP_IRQHandler(void)
+{
+ HW_TS_RTC_Wakeup_Handler();
+}
+#endif
+
+void IPCC_C1_TX_IRQHandler(void)
+{
+ HW_IPCC_Tx_Handler();
+
+ return;
+}
+
+void IPCC_C1_RX_IRQHandler(void)
+{
+ HW_IPCC_Rx_Handler();
+ return;
+}
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm_logging.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm_logging.c
new file mode 100644
index 000000000..40997ccd7
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/stm_logging.c
@@ -0,0 +1,213 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : stm_logging.c
+ * Description : This file contains all the defines and functions used
+ * for logging on Application examples.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/**
+ * @file
+ * This file implements logging functions to be used in Application examples.
+ *
+ */
+
+#include <ctype.h>
+#include <inttypes.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "app_conf.h"
+#include "stm_logging.h"
+
+#define LOG_PARSE_BUFFER_SIZE 256U
+
+#define LOG_TIMESTAMP_ENABLE 0
+#define LOG_REGION_ENABLE 1U
+#define LOG_RTT_COLOR_ENABLE 1U
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+#define RTT_COLOR_CODE_DEFAULT "\x1b[0m"
+#define RTT_COLOR_CODE_RED "\x1b[0;91m"
+#define RTT_COLOR_CODE_GREEN "\x1b[0;92m"
+#define RTT_COLOR_CODE_YELLOW "\x1b[0;93m"
+#define RTT_COLOR_CODE_CYAN "\x1b[0;96m"
+
+#else /* LOG_RTT_COLOR_ENABLE == 1 */
+#define RTT_COLOR_CODE_DEFAULT ""
+#define RTT_COLOR_CODE_RED ""
+#define RTT_COLOR_CODE_GREEN ""
+#define RTT_COLOR_CODE_YELLOW ""
+#define RTT_COLOR_CODE_CYAN ""
+#endif /* LOG_RTT_COLOR_ENABLE == 1 */
+
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for outputting code region string.
+ *
+ * @param[inout] aLogString Pointer to log buffer.
+ * @param[in] aMaxSize Maximum size of log buffer.
+ * @param[in] otLogRegion The region ID.
+ *
+ * @returns String with a log level color value.
+ */
+static inline uint16_t logRegion(char *aLogString, uint16_t aMaxSize,
+ appliLogRegion_t aLogRegion)
+{
+ char logRegionString[30U];
+
+ switch (aLogRegion)
+ {
+ case APPLI_LOG_REGION_GENERAL:
+ strcpy(logRegionString, "[M4 APPLICATION]");
+ break;
+ case APPLI_LOG_REGION_OPENTHREAD_API:
+ strcpy(logRegionString, "[M4 OPENTHREAD API]");
+ break;
+ case APPLI_LOG_REGION_OT_API_LINK:
+ strcpy(logRegionString, "[M4 LINK API]");
+ break;
+ case APPLI_LOG_REGION_OT_API_INSTANCE:
+ strcpy(logRegionString, "[M4 INSTANCE API]");
+ break;
+ case APPLI_LOG_REGION_OT_API_MESSAGE:
+ strcpy(logRegionString, "[M4 MESSAGE API]");
+ break;
+ default:
+ strcpy(logRegionString, "[M4]");
+ break;
+ }
+
+ return snprintf(aLogString, aMaxSize, "%s ", logRegionString);
+}
+#endif /* CFG_DEBUG_TRACE */
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for getting color of a given level log.
+ *
+ * @param[in] aLogLevel The log level.
+ *
+ * @returns String with a log level color value.
+ */
+static inline const char *levelToString(appliLogLevel_t aLogLevel)
+{
+ switch (aLogLevel)
+ {
+ case LOG_LEVEL_CRIT:
+ return RTT_COLOR_CODE_RED;
+
+ case LOG_LEVEL_WARN:
+ return RTT_COLOR_CODE_YELLOW;
+
+ case LOG_LEVEL_INFO:
+ return RTT_COLOR_CODE_GREEN;
+
+ case LOG_LEVEL_DEBG:
+ default:
+ return RTT_COLOR_CODE_DEFAULT;
+ }
+}
+#endif /* CFG_DEBUG_TRACE */
+
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for printing log level.
+ *
+ * @param[inout] aLogString Pointer to log buffer.
+ * @param[in] aMaxSize Maximum size of log buffer.
+ * @param[in] aLogLevel Log level.
+ *
+ * @returns Number of bytes successfully written to the log buffer.
+ */
+static inline uint16_t logLevel(char *aLogString, uint16_t aMaxSize,
+ appliLogLevel_t aLogLevel)
+{
+ return snprintf(aLogString, aMaxSize, "%s", levelToString(aLogLevel));
+}
+#endif /* CFG_DEBUG_TRACE */
+#endif /* LOG_RTT_COLOR_ENABLE */
+
+#if (LOG_TIMESTAMP_ENABLE == 1U)
+/**
+ * Function for printing actual timestamp.
+ *
+ * @param[inout] aLogString Pointer to the log buffer.
+ * @param[in] aMaxSize Maximum size of the log buffer.
+ *
+ * @returns Number of bytes successfully written to the log buffer.
+ */
+static inline uint16_t logTimestamp(char *aLogString, uint16_t aMaxSize)
+{
+ return snprintf(aLogString, aMaxSize, "%s[%010ld]", RTT_COLOR_CODE_DEFAULT,
+ otPlatAlarmMilliGetNow());
+}
+#endif /* LOG_TIMESTAMP_ENABLE */
+
+/**
+ * Function for printing application log
+ *
+ * @param[in] aLogLevel Log level.
+ * @param[in] aLogRegion The region ID.
+ * @param[in] aFormat User string format.
+ *
+ * @returns Number of bytes successfully written to the log buffer.
+ */
+void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...)
+{
+#if (CFG_DEBUG_TRACE != 0) /* Since the traces are disabled, there is nothing to print */
+ uint16_t length = 0;
+ char logString[LOG_PARSE_BUFFER_SIZE + 1U];
+
+#if (LOG_TIMESTAMP_ENABLE == 1U)
+ length += logTimestamp(logString, LOG_PARSE_BUFFER_SIZE);
+#endif
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+ /* Add level information */
+ length += logLevel(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+ aLogLevel);
+#endif
+
+#if (LOG_REGION_ENABLE == 1U)
+ /* Add Region information */
+ length += logRegion(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+ aLogRegion);
+#endif
+
+ /* Parse user string */
+ va_list paramList;
+ va_start(paramList, aFormat);
+ length += vsnprintf(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+ aFormat, paramList);
+ logString[length++] = '\r';
+ logString[length++] = '\n';
+ logString[length++] = 0;
+ va_end(paramList);
+
+ if (aLogLevel <= APPLI_CONFIG_LOG_LEVEL)
+ {
+ printf("%s", logString);
+ }else
+ {
+ /* Print nothing */
+ }
+#endif /* CFG_DEBUG_TRACE */
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/system_stm32wbxx.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/system_stm32wbxx.c
new file mode 100644
index 000000000..791008e1d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/Core/Src/system_stm32wbxx.c
@@ -0,0 +1,355 @@
+/**
+ ******************************************************************************
+ * @file system_stm32wbxx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32wbxx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the MSI (4 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32wbxx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | MSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 8
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_P | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_Q | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_R | NA
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for USB OTG FS, | Disabled
+ * SDIO and RNG clock |
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/Apache-2.0
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32WBxx_system
+ * @{
+ */
+
+/** @addtogroup stm32WBxx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32wbxx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (32000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
+#endif /* LSI_VALUE */
+
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Defines
+ * @{
+ */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+
+#define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = 4000000UL ; /*CPU1: M4 on MSI clock after startup (4MHz)*/
+
+ const uint32_t AHBPrescTable[16UL] = {1UL, 3UL, 5UL, 1UL, 1UL, 6UL, 10UL, 32UL, 2UL, 4UL, 8UL, 16UL, 64UL, 128UL, 256UL, 512UL};
+
+ const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
+
+ const uint32_t MSIRangeTable[16UL] = {100000UL, 200000UL, 400000UL, 800000UL, 1000000UL, 2000000UL, \
+ 4000000UL, 8000000UL, 16000000UL, 24000000UL, 32000000UL, 48000000UL, 0UL, 0UL, 0UL, 0UL}; /* 0UL values are incorrect cases */
+
+ const uint32_t SmpsPrescalerTable[4UL][6UL]={{1UL,3UL,2UL,2UL,1UL,2UL}, \
+ {2UL,6UL,4UL,3UL,2UL,4UL}, \
+ {4UL,12UL,8UL,6UL,4UL,8UL}, \
+ {4UL,12UL,8UL,6UL,4UL,8UL}};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+ /* Configure the Vector Table location add offset address ------------------*/
+#if defined(VECT_TAB_SRAM) && defined(VECT_TAB_BASE_ADDRESS)
+ /* program in SRAMx */
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAMx for CPU1 */
+#else /* program in FLASH */
+ SCB->VTOR = VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10UL*2UL))|(3UL << (11UL*2UL))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set MSION bit */
+ RCC->CR |= RCC_CR_MSION;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00070000U;
+
+ /* Reset PLLSAI1ON, PLLON, HSECSSON, HSEON, HSION, and MSIPLLON bits */
+ RCC->CR &= (uint32_t)0xFAF6FEFBU;
+
+ /*!< Reset LSI1 and LSI2 bits */
+ RCC->CSR &= (uint32_t)0xFFFFFFFAU;
+
+ /*!< Reset HSI48ON bit */
+ RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x22041000U;
+
+#if defined(STM32WB55xx)
+ /* Reset PLLSAI1CFGR register */
+ RCC->PLLSAI1CFGR = 0x22041000U;
+#endif
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= 0xFFFBFFFFU;
+
+ /* Disable all interrupts */
+ RCC->CIER = 0x00000000;
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) MSI_VALUE is a constant defined in stm32wbxx_hal.h file (default value
+ * 4 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32wbxx_hal_conf.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32wbxx_hal_conf.h file (default value
+ * 32 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, msirange, pllvco, pllr, pllsource , pllm;
+
+ /* Get MSI Range frequency--------------------------------------------------*/
+
+ /*MSI frequency range in Hz*/
+ msirange = MSIRangeTable[(RCC->CR & RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos];
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x00: /* MSI used as system clock source */
+ SystemCoreClock = msirange;
+ break;
+
+ case 0x04: /* HSI used as system clock source */
+ /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL ;
+
+ if(pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else if(pllsource == 0x03UL) /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ else /* MSI used as PLL clock source */
+ {
+ pllvco = (msirange / pllm);
+ }
+
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
+
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ SystemCoreClock = msirange;
+ break;
+ }
+
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK1 prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
+ /* HCLK clock frequency */
+ SystemCoreClock = SystemCoreClock / tmp;
+
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewd b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewd
new file mode 100644
index 000000000..bcea1fe3c
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>BLE_LLD</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCVariant</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>MemOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32WB15.ddf</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadVerifyAll</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCProductVersion</name>
+ <state>7.10.3.6927</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>STLINK_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>8.20.2.14834</state>
+ </option>
+ <option>
+ <name>UseFlashLoader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CLowLevel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacFile2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CDevice</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>FlashLoadersV3</name>
+ <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32WB15xx.board</state>
+ </option>
+ <option>
+ <name>OCImagesSuppressCheck1</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesPath1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesSuppressCheck2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesPath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesSuppressCheck3</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesPath3</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OverrideDefFlashBoard</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesOffset1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesOffset2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesOffset3</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesUse1</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesUse2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesUse3</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDeviceConfigMacroFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDebuggerExtraOption</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCAllMTBOptions</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCMulticoreNrOfCores</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCMulticoreMaster</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCMulticorePort</name>
+ <state>53461</state>
+ </option>
+ <option>
+ <name>OCMulticoreWorkspace</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCMulticoreSlaveProject</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCMulticoreSlaveConfiguration</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadExtraImage</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCAttachSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MassEraseBeforeFlashing</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCSimEnablePSP</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspOverrideConfig</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspConfigFile</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CADI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCadiMemory</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Fast Model</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCADILogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCADILogFileEditB</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CMSISDAP_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>4</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CatchSFERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCIarProbeScriptFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CMSISDAPResetList</name>
+ <version>1</version>
+ <state>10</state>
+ </option>
+ <option>
+ <name>CMSISDAPHWResetDuration</name>
+ <state>300</state>
+ </option>
+ <option>
+ <name>CMSISDAPHWResetDelay</name>
+ <state>200</state>
+ </option>
+ <option>
+ <name>CMSISDAPDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CMSISDAPInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiTargetEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPJtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPRestoreBreakpointsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPUpdateBreakpointsEdit</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>RDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchUndef</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchData</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchPrefetch</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchMMERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchNOCPERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchCHKERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchSTATERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchBUSERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchINTERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchHARDERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiCPUEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiCPUNumber</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeCfgOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeConfig</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CMSISDAPProbeConfigRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPSelectedCPUBehaviour</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ICpuName</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCJetEmuParams</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCCMSISDAPUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCCMSISDAPUsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>GDBSERVER_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJTagBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagUpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IJET_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>8</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CatchSFERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCIarProbeScriptFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetResetList</name>
+ <version>1</version>
+ <state>10</state>
+ </option>
+ <option>
+ <name>IjetHWResetDuration</name>
+ <state>300</state>
+ </option>
+ <option>
+ <name>IjetHWResetDelay</name>
+ <state>200</state>
+ </option>
+ <option>
+ <name>IjetPowerFromProbe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetPowerRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>IjetInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiTargetEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetScanChainNonARMDevices</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetIRLength</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetJtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetProtocolRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetSwoPin</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetCpuClockEdit</name>
+ <state>72.0</state>
+ </option>
+ <option>
+ <name>IjetSwoPrescalerList</name>
+ <version>1</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetRestoreBreakpointsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetUpdateBreakpointsEdit</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>RDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchUndef</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchData</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchPrefetch</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchMMERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchNOCPERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchCHKERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchSTATERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchBUSERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchINTERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchHARDERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeCfgOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeConfig</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IjetProbeConfigRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiCPUEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiCPUNumber</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetSelectedCPUBehaviour</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ICpuName</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCJetEmuParams</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetPreferETB</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetTraceSettingsList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetTraceSizeList</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>FlashBoardPathSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIjetUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCIjetUsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>16</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCCatchSFERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>1000</state>
+ </option>
+ <option>
+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>1000</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCScanChainNonARMDevices</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkIRLength</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkCommRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadioV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCUSBDevice</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkUpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>CCJLinkInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkResetList</name>
+ <version>6</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>CCJLinkInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchMMERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchNOCPERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchCHRERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchSTATERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchBUSERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchINTERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchHARDERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkScriptFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCJLinkUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCTcpIpAlt</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTcpIpSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCCpuClockEdit</name>
+ <state>72.0</state>
+ </option>
+ <option>
+ <name>CCSwoClockAuto</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSwoClockEdit</name>
+ <state>2000</state>
+ </option>
+ <option>
+ <name>OCJLinkTraceSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkTraceSourceDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkDeviceName</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>LMIFTDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>2</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>LmiftdiSpeed</name>
+ <state>500</state>
+ </option>
+ <option>
+ <name>CCLmiftdiDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLmiftdiLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCLmiFtdiInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLmiFtdiInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>PEMICRO_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>3</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCJPEMicroShowSettings</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>STLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>4</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCSTLinkInterfaceRadio</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCSTLinkInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkResetList</name>
+ <version>3</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>CCCpuClockEdit</name>
+ <state>32.0</state>
+ </option>
+ <option>
+ <name>CCSwoClockAuto</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSwoClockEdit</name>
+ <state>2000</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCSTLinkDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkUpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchMMERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchNOCPERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchCHRERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchSTATERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchBUSERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchINTERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchSFERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchHARDERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCSTLinkUsbSerialNoSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCSTLinkJtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkDAPNumber</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCSTLinkDebugAccessPortRadio</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>###Uninitialized###</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileEditB</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>TIFET_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCMSPFetResetList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetTargetVccTypeDefault</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetTargetVoltage</name>
+ <state>###Uninitialized###</state>
+ </option>
+ <option>
+ <name>CCMSPFetVCCDefault</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCMSPFetTargetSettlingtime</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetRadioJtagSpeedType</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCMSPFetConnection</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetUsbComPort</name>
+ <state>Automatic</state>
+ </option>
+ <option>
+ <name>CCMSPFetAllowAccessToBSL</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCMSPFetRadioEraseFlash</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>XDS100_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>6</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TIPackageOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>TIPackage</name>
+ <state></state>
+ </option>
+ <option>
+ <name>BoardFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCXds100BreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100DoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100UpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>CCXds100CatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchMMERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchNOCPERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchCHRERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchSTATERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchBUSERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchINTERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchSFERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchHARDERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CpuClockEdit</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCXds100SwoClockAuto</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100SwoClockEdit</name>
+ <state>1000</state>
+ </option>
+ <option>
+ <name>CCXds100HWResetDelay</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100ResetList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100UsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCXds100UsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100JtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100InterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100InterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100ProbeList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100SWOPortRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100SWOPort</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+</project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewp b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewp
new file mode 100644
index 000000000..6371ab479
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.ewp
@@ -0,0 +1,1225 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>BLE_LLD</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>30</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>BLE_LLD/Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>BLE_LLD/Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>BLE_LLD/List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Full formatting, with multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Full formatting, with multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>4.41A</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.20.2.14834</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32WB15CC ST STM32WB15CC</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>26</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>26</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32WB15CC ST STM32WB15CC</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>26</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
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+ <name>Core</name>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\app_entry.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\gpio_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\hw_uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\main.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm32_lpm_if.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm32wbxx_hal_msp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm32wbxx_it.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm_logging.c</name>
+ </file>
+ </group>
+ <group>
+ <name>STM32_WPAN</name>
+ <group>
+ <name>App</name>
+ <file>
+ <name>$PROJ_DIR$\..\STM32_WPAN\App\app_ble_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\STM32_WPAN\App\chat_app.c</name>
+ </file>
+ </group>
+ <group>
+ <name>Target</name>
+ <file>
+ <name>$PROJ_DIR$\..\STM32_WPAN\Target\hw_ipcc.c</name>
+ </file>
+ </group>
+ </group>
+ </group>
+ </group>
+ <group>
+ <name>Doc</name>
+ <file>
+ <name>$PROJ_DIR$\..\readme.txt</name>
+ </file>
+ </group>
+ <group>
+ <name>Drivers</name>
+ <group>
+ <name>BSP</name>
+ <group>
+ <name>NUCLEO-WB15CC</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\BSP\NUCLEO-WB15CC\nucleo_wb15cc.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>CMSIS</name>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\system_stm32wbxx.c</name>
+ </file>
+ </group>
+ <group>
+ <name>STM32WBxx_HAL_Driver</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_cortex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_dma.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_dma_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_exti.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_flash.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_flash_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_gpio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_hsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_pwr.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_pwr_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_rcc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_rcc_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_tim.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_tim_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_uart_ex.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>Middlewares</name>
+ <group>
+ <name>STM32_WPAN</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\ble_lld\hal\ble_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\ble_lld\lld\ble_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\dbg_trace.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\otp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\shci\shci.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\tl\shci_tl.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\tl\shci_tl_if.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\stm_list.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\stm_queue.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\tl\tl_mbox.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>Utilities</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Utilities\lpm\tiny_lpm\stm32_lpm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Utilities\sequencer\stm32_seq.c</name>
+ </file>
+ </group>
+</project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.eww b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.eww
new file mode 100644
index 000000000..5775e6ae2
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/BLE_LLD_Chat.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+ <project>
+ <path>$WS_DIR$\BLE_LLD_Chat.ewp</path>
+ </project>
+ <batchBuild />
+</workspace>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/startup_stm32wb15xx_cm4.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/startup_stm32wb15xx_cm4.s
new file mode 100644
index 000000000..de618745d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/startup_stm32wb15xx_cm4.s
@@ -0,0 +1,432 @@
+;******************************************************************************
+;* File Name : startup_stm32wb15xx_cm4.s
+;* Author : MCD Application Team
+;* Description : M4 core vector table of the STM32WB15xx devices for the
+;* IAR (EWARM) toolchain with support of standby.
+;*
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;******************************************************************************
+;* @attention
+;*
+;* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.</center></h2>
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD and PVM Interrupt
+ DCD TAMP_STAMP_LSECSS_IRQHandler ; RTC Tamper, TimeStamp Interrupts and LSECSS Interrupts
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup Interrupt
+ DCD FLASH_IRQHandler ; FLASH global Interrupt
+ DCD RCC_IRQHandler ; RCC Interrupt
+ DCD EXTI0_IRQHandler ; EXTI Line 0 Interrupt
+ DCD EXTI1_IRQHandler ; EXTI Line 1 Interrupt
+ DCD EXTI2_IRQHandler ; EXTI Line 2 Interrupt
+ DCD EXTI3_IRQHandler ; EXTI Line 3 Interrup
+ DCD EXTI4_IRQHandler ; EXTI Line 4 Interrupt
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 Interrupt
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 Interrupt
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 Interrupt
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 Interrupt
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 Interrupt
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 Interrupt
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 Interrupt
+ DCD ADC1_IRQHandler ; ADC1 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD C2SEV_PWR_C2H_IRQHandler ; CPU M0+ SEV Interrupt
+ DCD COMP_IRQHandler ; COMP1 Interrupts
+ DCD EXTI9_5_IRQHandler ; EXTI Lines [9:5] Interrupt
+ DCD TIM1_BRK_IRQHandler ; TIM1 Break Interrupt
+ DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
+ DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Communication Interrupts
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare Interrupt
+ DCD TIM2_IRQHandler ; TIM2 Global Interrupt
+ DCD PKA_IRQHandler ; PKA Interrupt
+ DCD I2C1_EV_IRQHandler ; I2C1 Event Interrupt
+ DCD I2C1_ER_IRQHandler ; I2C1 Error Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI1_IRQHandler ; SPI1 Interrupt
+ DCD 0 ; Reserved
+ DCD USART1_IRQHandler ; USART1 Interrupt
+ DCD LPUART1_IRQHandler ; LPUART1 Interrupt
+ DCD 0 ; Reserved
+ DCD TSC_IRQHandler ; TSC Interrupt
+ DCD EXTI15_10_IRQHandler ; EXTI Lines1[15:10 ]Interrupts
+ DCD RTC_Alarm_IRQHandler ; RTC Alarms (A and B) Interrupt
+ DCD 0 ; Reserved
+ DCD PWR_SOTF_BLEACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR
+ DCD IPCC_C1_RX_IRQHandler ; IPCC CPU1 RX occupied interrupt
+ DCD IPCC_C1_TX_IRQHandler ; IPCC CPU1 RX free interrupt
+ DCD HSEM_IRQHandler ; HSEM0 Interrupt
+ DCD LPTIM1_IRQHandler ; LPTIM1 Interrupt
+ DCD LPTIM2_IRQHandler ; LPTIM2 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD AES2_IRQHandler ; AES2 Interrupt
+ DCD RNG_IRQHandler ; RNG1 Interrupt
+ DCD FPU_IRQHandler ; FPU Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMAMUX1_OVR_IRQHandler ; DMAMUX overrun Interrupt
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK TAMP_STAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TAMP_STAMP_LSECSS_IRQHandler
+ B TAMP_STAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_IRQHandler
+ B ADC1_IRQHandler
+
+ PUBWEAK C2SEV_PWR_C2H_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+C2SEV_PWR_C2H_IRQHandler
+ B C2SEV_PWR_C2H_IRQHandler
+
+ PUBWEAK COMP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP_IRQHandler
+ B COMP_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_IRQHandler
+ B TIM1_BRK_IRQHandler
+
+ PUBWEAK TIM1_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_IRQHandler
+ B TIM1_UP_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_IRQHandler
+ B TIM1_TRG_COM_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK PKA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PKA_IRQHandler
+ B PKA_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK TSC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TSC_IRQHandler
+ B TSC_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ B PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+
+ PUBWEAK IPCC_C1_RX_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+IPCC_C1_RX_IRQHandler
+ B IPCC_C1_RX_IRQHandler
+
+ PUBWEAK IPCC_C1_TX_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+IPCC_C1_TX_IRQHandler
+ B IPCC_C1_TX_IRQHandler
+
+ PUBWEAK HSEM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HSEM_IRQHandler
+ B HSEM_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK LPTIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM2_IRQHandler
+ B LPTIM2_IRQHandler
+
+ PUBWEAK AES2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+AES2_IRQHandler
+ B AES2_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK DMAMUX1_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX1_OVR_IRQHandler
+ B DMAMUX1_OVR_IRQHandler
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/stm32wb15xx_flash_cm4.icf b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/stm32wb15xx_flash_cm4.icf
new file mode 100644
index 000000000..9888197af
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/EWARM/stm32wb15xx_flash_cm4.icf
@@ -0,0 +1,42 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+/***** FLASH Part dedicated to M4 *****/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0801B800;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000008;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20002FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__ = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __ICFEDIT_region_RAM_SHARED_start__ = 0x20030000;
+define symbol __ICFEDIT_region_RAM_SHARED_end__ = 0x200327FF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM_SHARED_region = mem:[from __ICFEDIT_region_RAM_SHARED_start__ to __ICFEDIT_region_RAM_SHARED_end__];
+define region Total_RAM_region = RAM_region | RAM_SHARED_region ;
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+/* MB_MEM1 and MB_MEM2 are sections reserved to mailbox communication. It is placed in the shared memory */
+initialize by copy { readwrite };
+do not initialize { section .noinit,
+ section MAPPING_TABLE,
+ section MB_MEM1 };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { block CSTACK, block HEAP };
+place in Total_RAM_region { readwrite };
+place in RAM_SHARED_region { first section MAPPING_TABLE};
+place in RAM_SHARED_region { section MB_MEM1};
+place in RAM_SHARED_region { section MB_MEM2};
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvoptx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvoptx
new file mode 100644
index 000000000..652f8eee8
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvoptx
@@ -0,0 +1,793 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>BLE_LLD</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath></ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>18</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>1</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32WB1x_320_M4 -FS08000000 -FL050000 -FP0($$Device:STM32WB15CCUx$Drivers\CMSIS\Flash\STM32WB1x_320_M4.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ST-LINKIII-KEIL_SWO</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32WB1x_320_M4 -FS08000000 -FL050000 -FP0($$Device:STM32WB15CCUx$Drivers\CMSIS\Flash\STM32WB1x_320_M4.FLM))</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
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+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>1</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Application/MDK-ARM</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
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+ <bDave2>0</bDave2>
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+ <FilenameWithoutPath>startup_stm32wb15xx_cm4.s</FilenameWithoutPath>
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+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Application/User/Core</GroupName>
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+ <bDave2>0</bDave2>
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+ </File>
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+ <tvExp>0</tvExp>
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+ <bDave2>0</bDave2>
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diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvprojx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvprojx
new file mode 100644
index 000000000..659099908
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/BLE_LLD_Chat.uvprojx
@@ -0,0 +1,689 @@
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+ <Size>0x3000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>1</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>2</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <uGnu>0</uGnu>
+ <useXO>0</useXO>
+ <v6Lang>5</v6Lang>
+ <v6LangP>3</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>CORE_CM4,USE_HAL_DRIVER,STM32WB15xx,USE_STM32WBXX_NUCLEO,BLE_LLD_WB</Define>
+ <Undefine></Undefine>
+ <IncludePath>../Core/Inc;../STM32_WPAN/App;../STM32_WPAN/Target;../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/NUCLEO-WB15CC;../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc;../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy;../../../../../../Utilities/lpm/tiny_lpm;../../../../../../Utilities/sequencer;../../../../../../Middlewares/ST/STM32_WPAN;../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal;../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld;../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread;../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl;../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci;../../../../../../Middlewares/ST/STM32_WPAN/utilities;../../../../../../Middlewares/ST/STM32_WPAN/ble;../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template;../../../../../../Middlewares/ST/STM32_WPAN/ble/core</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <ClangAsOpt>4</ClangAsOpt>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange></TextAddressRange>
+ <DataAddressRange></DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile>stm32wb15xx_flash_cm4.sct</ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc>--diag_suppress L6314W
+--diag_suppress 1296</Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Application/MDK-ARM</GroupName>
+ <Files>
+ <File>
+ <FileName>startup_stm32wb15xx_cm4.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>startup_stm32wb15xx_cm4.s</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Application/User/Core</GroupName>
+ <Files>
+ <File>
+ <FileName>app_entry.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/app_entry.c</FilePath>
+ </File>
+ <File>
+ <FileName>gpio_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/gpio_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>hw_uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/hw_uart.c</FilePath>
+ </File>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/main.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_lpm_if.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm32_lpm_if.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_msp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm32wbxx_hal_msp.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_it.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm32wbxx_it.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm_logging.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm_logging.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/App</GroupName>
+ <Files>
+ <File>
+ <FileName>app_ble_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../STM32_WPAN/App/app_ble_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>chat_app.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../STM32_WPAN/App/chat_app.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/Target</GroupName>
+ <Files>
+ <File>
+ <FileName>hw_ipcc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../STM32_WPAN/Target/hw_ipcc.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Doc</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>../readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers/BSP/NUCLEO-WB15CC</GroupName>
+ <Files>
+ <File>
+ <FileName>nucleo_wb15cc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers/CMSIS</GroupName>
+ <Files>
+ <File>
+ <FileName>system_stm32wbxx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/system_stm32wbxx.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers/STM32WBxx_HAL_Driver</GroupName>
+ <Files>
+ <File>
+ <FileName>stm32wbxx_hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_cortex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_dma_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_exti.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_flash.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_flash_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_gpio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_hsem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_pwr.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_pwr_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_rcc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_rcc_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_tim.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_tim_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_uart_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Middlewares/STM32_WPAN</GroupName>
+ <Files>
+ <File>
+ <FileName>ble_hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal/ble_hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>ble_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld/ble_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>dbg_trace.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c</FilePath>
+ </File>
+ <File>
+ <FileName>otp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/otp.c</FilePath>
+ </File>
+ <File>
+ <FileName>shci.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c</FilePath>
+ </File>
+ <File>
+ <FileName>shci_tl.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c</FilePath>
+ </File>
+ <File>
+ <FileName>shci_tl_if.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm_list.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_list.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm_queue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_queue.c</FilePath>
+ </File>
+ <File>
+ <FileName>tl_mbox.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Utilities</GroupName>
+ <Files>
+ <File>
+ <FileName>stm32_lpm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Utilities/lpm/tiny_lpm/stm32_lpm.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_seq.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Utilities/sequencer/stm32_seq.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components>
+ <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+ <targetInfos>
+ <targetInfo name="BLE_LLD"/>
+ </targetInfos>
+ </component>
+ </components>
+ <files/>
+ </RTE>
+
+ <LayerInfo>
+ <Layers>
+ <Layer>
+ <LayName>&lt;Project Info&gt;</LayName>
+ <LayDesc></LayDesc>
+ <LayUrl></LayUrl>
+ <LayKeys></LayKeys>
+ <LayCat></LayCat>
+ <LayLic></LayLic>
+ <LayTarg>0</LayTarg>
+ <LayPrjMark>1</LayPrjMark>
+ </Layer>
+ </Layers>
+ </LayerInfo>
+
+</Project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/startup_stm32wb15xx_cm4.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/startup_stm32wb15xx_cm4.s
new file mode 100644
index 000000000..7794948c3
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/startup_stm32wb15xx_cm4.s
@@ -0,0 +1,336 @@
+;******************************************************************************
+;* File Name : startup_stm32wb15xx_cm4.s
+;* Author : MCD Application Team
+;* Description : STM32WB15xx devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the CortexM4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics. All rights reserved.
+;*
+;* This software component is licensed by ST under Apache License, Version 2.0,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/Apache-2.0
+;*
+;******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD and PVM detector
+ DCD TAMP_STAMP_LSECSS_IRQHandler ; RTC Tamper and TimeStamp Interrupts and LSECSS Interrupts
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup Interrupt
+ DCD FLASH_IRQHandler ; FLASH global Interrupt
+ DCD RCC_IRQHandler ; RCC Interrupt
+ DCD EXTI0_IRQHandler ; EXTI Line 0 Interrupt
+ DCD EXTI1_IRQHandler ; EXTI Line 1 Interrupt
+ DCD EXTI2_IRQHandler ; EXTI Line 2 Interrupt
+ DCD EXTI3_IRQHandler ; EXTI Line 3 Interrup
+ DCD EXTI4_IRQHandler ; EXTI Line 4 Interrupt
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 Interrupt
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 Interrupt
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 Interrupt
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 Interrupt
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 Interrupt
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 Interrupt
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 Interrupt
+ DCD ADC1_IRQHandler ; ADC1 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD C2SEV_PWR_C2H_IRQHandler ; CPU M0+ SEV Interrupt
+ DCD COMP_IRQHandler ; COMP1 Interrupts
+ DCD EXTI9_5_IRQHandler ; EXTI Lines [9:5] Interrupt
+ DCD TIM1_BRK_IRQHandler ; TIM1 Break Interrupt
+ DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
+ DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Communication Interrupts
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare Interrupt
+ DCD TIM2_IRQHandler ; TIM2 Global Interrupt
+ DCD PKA_IRQHandler ; PKA Interrupt
+ DCD I2C1_EV_IRQHandler ; I2C1 Event Interrupt
+ DCD I2C1_ER_IRQHandler ; I2C1 Error Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI1_IRQHandler ; SPI1 Interrupt
+ DCD 0 ; Reserved
+ DCD USART1_IRQHandler ; USART1 Interrupt
+ DCD LPUART1_IRQHandler ; LPUART1 Interrupt
+ DCD 0 ; Reserved
+ DCD TSC_IRQHandler ; TSC Interrupt
+ DCD EXTI15_10_IRQHandler ; EXTI Lines1[15:10 ]Interrupts
+ DCD RTC_Alarm_IRQHandler ; RTC Alarms (A and B) Interrupt
+ DCD 0 ; Reserved
+ DCD PWR_SOTF_BLEACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR
+ DCD IPCC_C1_RX_IRQHandler ; IPCC CPU1 RX occupied interrupt
+ DCD IPCC_C1_TX_IRQHandler ; IPCC CPU1 RX free interrupt
+ DCD HSEM_IRQHandler ; HSEM0 Interrupt
+ DCD LPTIM1_IRQHandler ; LPTIM1 Interrupt
+ DCD LPTIM2_IRQHandler ; LPTIM2 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD AES2_IRQHandler ; AES2 Interrupt
+ DCD RNG_IRQHandler ; RNG1 Interrupt
+ DCD FPU_IRQHandler ; FPU Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMAMUX1_OVR_IRQHandler ; DMAMUX overrun Interrupt
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT TAMP_STAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_IRQHandler [WEAK]
+ EXPORT C2SEV_PWR_C2H_IRQHandler [WEAK]
+ EXPORT COMP_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_IRQHandler [WEAK]
+ EXPORT TIM1_UP_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT PKA_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT TSC_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT PWR_SOTF_BLEACT_RFPHASE_IRQHandler [WEAK]
+ EXPORT IPCC_C1_RX_IRQHandler [WEAK]
+ EXPORT IPCC_C1_TX_IRQHandler [WEAK]
+ EXPORT HSEM_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT LPTIM2_IRQHandler [WEAK]
+ EXPORT AES1_IRQHandler [WEAK]
+ EXPORT AES2_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+C2SEV_PWR_C2H_IRQHandler
+COMP_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_IRQHandler
+TIM1_UP_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+PKA_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+SPI1_IRQHandler
+USART1_IRQHandler
+LPUART1_IRQHandler
+TSC_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+IPCC_C1_RX_IRQHandler
+IPCC_C1_TX_IRQHandler
+HSEM_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+AES1_IRQHandler
+AES2_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+DMAMUX1_OVR_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/stm32wb15xx_flash_cm4.sct b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/stm32wb15xx_flash_cm4.sct
new file mode 100644
index 000000000..28aca4068
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/MDK-ARM/stm32wb15xx_flash_cm4.sct
@@ -0,0 +1,21 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x0001B800 { ; load region size_region
+ ER_IROM1 0x08000000 0x0001B800 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000008 0x2FF8 { ; RW data
+ .ANY (+RW +ZI)
+ }
+ RW_RAM_SHARED 0x20030000 0x2800 { ; RW data
+ *(MAPPING_TABLE)
+ *(MB_MEM1)
+ *(MB_MEM2)
+ }
+ }
+
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.cproject b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..26daa85e7
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.cproject
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1295312953">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1295312953" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1295312953" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+ <folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1295312953." name="/" resourcePath="">
+ <toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.235123476" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1182578866" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32WB15CCUx" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.767096248" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2063174514" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.916619177" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.399948560" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.956290962" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="NUCLEO-WB15CC" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.2089441635" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.4 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-WB15CC || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../Core/Inc | ../../STM32_WPAN/App | ../../STM32_WPAN/Target | ../../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include | ../../../../../../../Drivers/CMSIS/Include | ../../../../../../../Drivers/BSP/NUCLEO-WB15CC | ../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc | ../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/lpm/tiny_lpm | ../../../../../../../Utilities/sequencer | ../../../../../../../Middlewares/ST/STM32_WPAN | ../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal | ../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci | ../../../../../../../Middlewares/ST/STM32_WPAN/utilities | ../../../../../../../Middlewares/ST/STM32_WPAN/ble | ../../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template | ../../../../../../../Middlewares/ST/STM32_WPAN/ble/core || || || CORE_CM4 | BLE_LLD_WB | USE_HAL_DRIVER | STM32WB15xx | USE_STM32WBXX_NUCLEO || || || || || ${workspace_loc:/${ProjName}/STM32WB15CCUX_FLASH.ld} || true || NonSecure || || || || None" valueType="string"/>
+ <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.83495187" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+ <builder buildPath="${workspace_loc:/BLE_LLD_Chat}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1238029683" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1528461149" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+ </tool>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1799405689" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1639921065" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+ <listOptionValue builtIn="false" value="DEBUG"/>
+ <listOptionValue builtIn="false" value="CORE_CM4"/>
+ <listOptionValue builtIn="false" value="BLE_LLD_WB"/>
+ <listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+ <listOptionValue builtIn="false" value="STM32WB15xx"/>
+ <listOptionValue builtIn="false" value="USE_STM32WBXX_NUCLEO"/>
+ </option>
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+ <listOptionValue builtIn="false" value="../../STM32_WPAN/App"/>
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+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
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+ <listOptionValue builtIn="false" value="../../../../../../../Utilities/sequencer"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal"/>
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+ <cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1759916090">
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+ <extensions>
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+ </extensions>
+ </storageModule>
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+ <folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1759916090." name="/" resourcePath="">
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diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.project b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.project
new file mode 100644
index 000000000..da74a7a9a
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/.project
@@ -0,0 +1,249 @@
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+ <nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
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+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/app_entry.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/gpio_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/gpio_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/hw_uart.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/hw_uart.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/main.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/main.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32_lpm_if.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32_lpm_if.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32wbxx_hal_msp.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32wbxx_hal_msp.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32wbxx_it.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32wbxx_it.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm_logging.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm_logging.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/App/app_ble_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/App/app_ble_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/App/chat_app.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/App/chat_app.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/Target/hw_ipcc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/Target/hw_ipcc.c</locationURI>
+ </link>
+ </linkedResources>
+</projectDescription>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s
new file mode 100644
index 000000000..58cc21a82
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s
@@ -0,0 +1,394 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32wb15xx_cm4.s
+ * @author MCD Application Team
+ * @brief STM32WB15xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+* This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/Apache-2.0
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+/* start address for the .MB_MEM2 section. defined in linker script */
+.word _sMB_MEM2
+/* end address for the .MB_MEM2 section. defined in linker script */
+.word _eMB_MEM2
+
+/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
+.macro INIT_BSS start, end
+ ldr r0, =\start
+ ldr r1, =\end
+ movs r3, #0
+ bl LoopFillZerobss
+.endm
+
+/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
+.macro INIT_DATA start, end, src
+ ldr r0, =\start
+ ldr r1, =\end
+ ldr r2, =\src
+ movs r3, #0
+ bl LoopCopyDataInit
+.endm
+
+.section .text.data_initializers
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+ bx lr
+
+FillZerobss:
+ str r3, [r0]
+ adds r0, r0, #4
+
+LoopFillZerobss:
+ cmp r0, r1
+ bcc FillZerobss
+ bx lr
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+/* Call the clock system intitialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ INIT_DATA _sdata, _edata, _sidata
+
+/* Zero fill the bss segments. */
+ INIT_BSS _sbss, _ebss
+ INIT_BSS _sMB_MEM2, _eMB_MEM2
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application s entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word TAMP_STAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_IRQHandler
+ .word 0
+ .word 0
+ .word C2SEV_PWR_C2H_IRQHandler
+ .word COMP_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_IRQHandler
+ .word TIM1_UP_IRQHandler
+ .word TIM1_TRG_COM_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word PKA_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word 0
+ .word 0
+ .word SPI1_IRQHandler
+ .word 0
+ .word USART1_IRQHandler
+ .word LPUART1_IRQHandler
+ .word 0
+ .word TSC_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word 0
+ .word PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ .word IPCC_C1_RX_IRQHandler
+ .word IPCC_C1_TX_IRQHandler
+ .word HSEM_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word LPTIM2_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word AES2_IRQHandler
+ .word RNG_IRQHandler
+ .word FPU_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word DMAMUX1_OVR_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak TAMP_STAMP_LSECSS_IRQHandler
+ .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_IRQHandler
+ .thumb_set ADC1_IRQHandler,Default_Handler
+
+ .weak C2SEV_PWR_C2H_IRQHandler
+ .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
+
+ .weak COMP_IRQHandler
+ .thumb_set COMP_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_IRQHandler
+ .thumb_set TIM1_BRK_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_IRQHandler
+ .thumb_set TIM1_UP_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_IRQHandler
+ .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak PKA_IRQHandler
+ .thumb_set PKA_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak TSC_IRQHandler
+ .thumb_set TSC_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ .thumb_set PWR_SOTF_BLEACT_RFPHASE_IRQHandler,Default_Handler
+
+ .weak IPCC_C1_RX_IRQHandler
+ .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
+
+ .weak IPCC_C1_TX_IRQHandler
+ .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
+
+ .weak HSEM_IRQHandler
+ .thumb_set HSEM_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak LPTIM2_IRQHandler
+ .thumb_set LPTIM2_IRQHandler,Default_Handler
+
+ .weak AES2_IRQHandler
+ .thumb_set AES2_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak DMAMUX1_OVR_IRQHandler
+ .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/syscalls.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/syscalls.c
new file mode 100644
index 000000000..4ec95844d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/syscalls.c
@@ -0,0 +1,159 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+//#undef errno
+extern int errno;
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+register char * stack_ptr asm("sp");
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/sysmem.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/sysmem.c
new file mode 100644
index 000000000..d7cc52cd4
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/Application/User/Core/sysmem.c
@@ -0,0 +1,80 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/STM32WB15CCUX_FLASH.ld b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/STM32WB15CCUX_FLASH.ld
new file mode 100644
index 000000000..8f86b87c9
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32CubeIDE/STM32WB15CCUX_FLASH.ld
@@ -0,0 +1,179 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : STM32CubeIDE
+**
+** Abstract : Linker script for STM32WB15xC Device
+** 320Kbytes FLASH
+** 48Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+** All rights reserved.</center></h2>
+**
+** This software component is licensed by ST under BSD 3-Clause license,
+** the "License"; You may not use this file except in compliance with the
+** License. You may obtain a copy of the License at:
+** opensource.org/licenses/BSD-3-Clause
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20003000; /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200 ; /* required amount of heap */
+_Min_Stack_Size = 0x400 ; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 110K
+RAM1 (xrw) : ORIGIN = 0x20000008, LENGTH = 0x2FF8
+RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
+}
+
+/* Define output sections */
+SECTIONS
+{
+ /* The startup code goes first into FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data goes into FLASH */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+ .ARM : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH
+
+ /* used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections goes into RAM, load LMA copy after code */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM1 AT> FLASH
+
+
+ /* Uninitialized data section */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM1
+
+ /* User_heap_stack section, used to check that there is enough RAM left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM1
+
+
+
+ /* Remove information from the standard libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+ MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
+ MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
+ MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
+}
+
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.c
new file mode 100644
index 000000000..ea1573ea1
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.c
@@ -0,0 +1,390 @@
+/**
+ ******************************************************************************
+ * File Name : app_ble_lld.c
+ * Description : application utilities.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/**
+ * This file provides low level utilities for application:
+ * - IPCC for communication with radio MCU
+ * - UART management
+ * - error handling
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdbool.h>
+#include "app_common.h"
+#include "utilities_common.h"
+#include "app_entry.h"
+#include "dbg_trace.h"
+#include "tl.h"
+#include "shci.h"
+#include "stm_logging.h"
+#include "stm32_lpm.h"
+#include "stm32_seq.h"
+#include "gpio_lld.h"
+#include "stm_queue.h"
+#include "ble_lld.h"
+#include "app_ble_lld.h"
+
+/* Private includes ----------------------------------------------------------*/
+
+/* Private typedef -----------------------------------------------------------*/
+/*
+ * List of all errors tracked by the application
+ * running on M4. Some of these errors may be fatal
+ * or just warnings
+ */
+typedef enum
+{
+ ERR_BLE_LLD_SET_STATE_CB,
+ ERR_BLE_LLD_ERASE_PERSISTENT_INFO,
+ ERR_BLE_LLD_CHECK_WIRELESS
+} ErrAppBleLldIdEnum_t;
+
+/* Private defines -----------------------------------------------------------*/
+#define UART_BUFFER_SIZE 64
+#define TX_BUFFER_SIZE 268
+#define UART_TX_CHUNK_SIZE 16
+#define UART_LINE_END "\r\n"
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+static void uartTxSendChunk(void);
+static void uartRxCpltCallback(void);
+static void m0CmdProcess(void);
+
+/* Private variables ---------------------------------------------------------*/
+static queue_t uartTxBuf;
+static uint8_t uartTxBufData[TX_BUFFER_SIZE];
+
+static bool txBusy = false;
+
+static char uartRxBuf;
+static void(*uartRxUserCb)(char);
+
+// IPCC configuration
+PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static TL_BLE_LLD_Config_t BleLldConfigBuffer;
+
+// Shared memory used by IPCC to send/receive messages to/from M0
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t BleLldM0CmdPacket;
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t BleLldCmdRspPacket;
+
+/* Shared memory used to send/receive data and parameters to/from M0 because
+ IPCC messages have a limited size */
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static msg_BLE_LLD_t bleparam_BLE_LLD_Packet;
+
+// Shared buffers for packet transmission and reception, separate buffers are needed because radio
+PLACE_IN_SECTION("MB_MEM2") static ipBLE_lld_txrxdata_Type txBuffer;
+PLACE_IN_SECTION("MB_MEM2") static ipBLE_lld_txrxdata_Type rxBuffer;
+
+
+/* Functions Definition ------------------------------------------------------*/
+
+void APP_BLE_LLD_Init(void)
+{
+ uint32_t devId = HAL_GetDEVID();
+ uint32_t revId = HAL_GetREVID();
+ uint8_t param[8];
+ SHCI_CmdStatus_t LldTestsInitStatus;
+
+ /* Initialize transport layer */
+ BleLldConfigBuffer.p_BleLldCmdRspBuffer = (uint8_t*)&BleLldCmdRspPacket;
+ BleLldConfigBuffer.p_BleLldM0CmdBuffer = (uint8_t*)&BleLldM0CmdPacket;
+ TL_BLE_LLD_Init(&BleLldConfigBuffer);
+
+ APP_BLE_LLD_Init_UART();
+
+ /* Send LLD tests start information to UART */
+ uartWrite("");
+ uartWrite("================================");
+ uartWrite("RF BLE LLD");
+ uartWrite("================================");
+#if (CFG_DEBUGGER_SUPPORTED == 0U)
+ uartWrite("Debugger de-activated");
+#endif
+#if (( CFG_DEBUG_TRACE_FULL == 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ))
+ uartWrite("Trace is de-activated");
+#endif
+
+ APP_DBG("Test appli initialized on M4, waiting for M0 initialization");
+
+ /* Send start cmd to M0 (with device and revision ID as parameters */
+ memcpy(&param[0], &devId, sizeof(devId));
+ memcpy(&param[4], &revId, sizeof(revId));
+ LldTestsInitStatus = SHCI_C2_BLE_LLD_Init(sizeof(param), param);
+ if(LldTestsInitStatus != SHCI_Success){
+ APP_DBG("!! ERROR during M0 init !!");
+ }else{
+ APP_DBG("M0 initialized");
+ }
+
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_CMD_FROM_M0_TO_M4, UTIL_SEQ_RFU, m0CmdProcess);
+
+ BLE_LLD_PRX_Init(&bleparam_BLE_LLD_Packet.params,
+ &txBuffer,
+ &rxBuffer,
+ APP_BLE_LLD_SendCmdM0);
+}
+
+/**
+ * @brief Warn the user that an error has occurred.In this case,
+ * the LEDs on the Board will start blinking.
+ * @param ErrId :
+ * @param ErrCode
+ * @retval None
+ */
+void APP_BLE_LLD_Error(uint32_t ErrId, uint32_t ErrCode)
+{
+ char *msg;
+ switch(ErrId)
+ {
+ case ERR_BLE_LLD_SET_STATE_CB: msg = "ERROR: ERR_BLE_LLD_SET_STATE_CB"; break;
+ case ERR_BLE_LLD_ERASE_PERSISTENT_INFO: msg = "ERROR: ERR_BLE_BLE_LLD_ERASE_PERSISTENT_INFO"; break;
+ case ERR_BLE_LLD_CHECK_WIRELESS: msg = "ERROR: ERR_BLE_LLD_CHECK_WIRELESS "; break;
+ default: msg = "ERROR Unknown "; break;
+ }
+ APP_DBG("**** Fatal error = %s (Err = %d)", msg, ErrCode);
+ while(true)
+ {
+ BSP_LED_Toggle(LED1);
+ HAL_Delay(500U);
+ BSP_LED_Toggle(LED2);
+ HAL_Delay(500U);
+ BSP_LED_Toggle(LED3);
+ HAL_Delay(500U);
+ }
+}
+
+/**
+ * @brief Check if the Coprocessor Wireless Firmware loaded supports Thread
+ * and display associated informations
+ * @param None
+ * @retval None
+ */
+void CheckWirelessFirmwareInfo(void)
+{
+ WirelessFwInfo_t wireless_info_instance;
+ WirelessFwInfo_t* p_wireless_info = &wireless_info_instance;
+ if (SHCI_GetWirelessFwInfo(p_wireless_info) != SHCI_Success)
+ {
+ APP_BLE_LLD_Error(ERR_BLE_LLD_CHECK_WIRELESS, 0);
+ }
+ else
+ {
+ APP_DBG("**********************************************************");
+ APP_DBG("Loaded M0 TEST FW info:");
+ switch(p_wireless_info->StackType)
+ {
+ case INFO_STACK_TYPE_BLE_PHY_VALID :
+ APP_DBG(" M0 FW Type: BLE and radio PHY validation");
+ break;
+
+ default :
+ APP_DBG(" ERROR: incompatible firmware");
+ APP_BLE_LLD_Error(ERR_BLE_LLD_CHECK_WIRELESS, 0);
+ break;
+ }
+ APP_DBG(" M0 FW VERSION: v%d.%d.%d", p_wireless_info->VersionMajor, p_wireless_info->VersionMinor, p_wireless_info->VersionSub);
+ APP_DBG("**********************************************************");
+ }
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+/**
+ * @brief Perform initialization of UART.
+ * @param None
+ * @retval None
+ */
+void APP_BLE_LLD_Init_UART(void)
+{
+#ifdef CFG_UART
+ MX_UART_Init(CFG_UART);
+#endif
+
+ CircularQueue_Init(&uartTxBuf,
+ uartTxBufData,
+ sizeof(uartTxBufData),
+ sizeof(char),
+ CIRCULAR_QUEUE_NO_FLAG);
+ txBusy = false;
+}
+
+/**
+ * @brief Perform de-initialization of UART.
+ * @param None
+ * @retval None
+ */
+void APP_BLE_LLD_DeInit_UART(void)
+{
+#ifdef CFG_UART
+ MX_UART_Deinit(CFG_UART);
+#endif
+}
+
+static void uartRxStart(void)
+{
+ if (HW_UART_Receive_IT(CFG_UART, (uint8_t *)&uartRxBuf, 1, uartRxCpltCallback) != hw_uart_ok){
+ APP_DBG("ERROR returned by HW_UART_Receive_IT()");
+ }
+}
+
+void APP_BLE_LLD_uartRxStart(void(*callback)(char))
+{
+ uartRxUserCb = callback;
+ uartRxStart();
+}
+
+static void uartRxCpltCallback(void)
+{
+ // No need to buffer uartRxBuf since the callback is called by value
+ uartRxUserCb(uartRxBuf);
+ // Since UART is in full duplex, receive can be always active without blocking send
+ uartRxStart();
+}
+
+void uartWrite(const char *format, ...)
+{
+ char out[UART_BUFFER_SIZE];
+ int nbChar;
+ va_list argp;
+ va_start(argp, format);
+ nbChar = vsnprintf(out, sizeof(out), format, argp);
+ va_end(argp);
+ if (nbChar < 0){
+ return;
+ }
+ if (nbChar > (sizeof(out) - ((strlen(UART_LINE_END) + 1)))){
+ strcpy(&(out[sizeof(out) - (strlen(UART_LINE_END) + 1)]), UART_LINE_END);
+ }else{
+ strcat(out, UART_LINE_END);
+ }
+ uartWriteRaw(out);
+}
+
+void uartWriteRaw(const char *str)
+{
+ CRITICAL_BEGIN();
+ while (*str != '\0'){
+ CircularQueue_Add(&uartTxBuf, (uint8_t *)str, 0, 1);
+ str++;
+ }
+ if (! txBusy){
+ uartTxSendChunk();
+ }
+ CRITICAL_END();
+}
+
+// Send multiple chars through the UART
+// must be called inside critical section
+// loop on itself via the UART callback
+static void uartTxSendChunk(void){
+ static char hwBuf[UART_TX_CHUNK_SIZE];
+ char *charPtr;
+ uint32_t count = 0;
+
+ while ((charPtr = (char *)CircularQueue_Remove(&uartTxBuf, NULL)) != NULL){
+ hwBuf[count] = *charPtr;
+ count++;
+ if (count >= UART_TX_CHUNK_SIZE){
+ break;
+ }
+ }
+ if (count != 0){
+ txBusy = true;
+ if (HW_UART_Transmit_IT(CFG_UART, (uint8_t *)hwBuf, count, uartTxSendChunk) != hw_uart_ok){
+ APP_DBG("ERROR returned by HW_UART_Transmit_IT()");
+ }
+ }else{
+ txBusy = false;
+ }
+}
+
+static void m0CmdProcess(void)
+{
+ BLE_LLD_PRX_EventProcessTask();
+}
+
+/**
+ * @brief Processes an event from radio CPU
+ *
+ * @param cmdBuffer : a pointer to TL_CmdPacket_t
+ * @return None
+ */
+void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * cmdBuffer )
+{
+ BLE_LLD_PRX_EventProcessInter((radioEventType)cmdBuffer->cmdserial.cmd.cmdcode);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_CMD_FROM_M0_TO_M4, CFG_SCH_PRIO_0);
+ TL_BLE_LLD_SendM0CmdAck();
+}
+
+/**
+ * @brief Sends a command to radio CPU
+ *
+ * Waits for reply from radio CPU before returning (synchronous calls).
+ *
+ * @param[in] command BLE command already packed (by LLD)
+ */
+uint8_t APP_BLE_LLD_SendCmdM0(BLE_LLD_Code_t bleCmd)
+{
+ BleLldCmdRspPacket.cmdserial.cmd.cmdcode = bleCmd;
+ payload_BLE_LLD_t *payload = (payload_BLE_LLD_t *)&BleLldCmdRspPacket.cmdserial.cmd.payload;
+ payload->msg = &bleparam_BLE_LLD_Packet;
+ UTIL_SEQ_ClrEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+ TL_BLE_LLD_SendCmd();
+ UTIL_SEQ_WaitEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+
+ return bleparam_BLE_LLD_Packet.returnValue;
+}
+
+/**
+ * @brief Processes a reply (to a command) from radio CPU
+ *
+ * Unlocks task waiting in APP_BLE_LLD_SendCmdM0(), this is used to make LLD
+ * API calls synchronous.
+ *
+ * @param Notbuffer : a pointer to TL_CmdPacket_t
+ * @return None
+ */
+void TL_BLE_LLD_ReceiveRsp( TL_CmdPacket_t * Notbuffer )
+{
+ switch (Notbuffer->cmdserial.cmd.cmdcode){
+ case BLE_LLD_RSP_END:
+ UTIL_SEQ_SetEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+ break;
+ default:
+ APP_DBG("WARNING: unknown response received %d", Notbuffer->cmdserial.cmd.cmdcode);
+ }
+
+ /* This is just a trace from M0, write to UART */
+ //uartWriteRaw(sourceBuf);
+
+ TL_BLE_LLD_SendRspAck();
+}
+
+/* USER CODE END FD_WRAP_FUNCTIONS */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.h
new file mode 100644
index 000000000..3bd87e32c
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.h
@@ -0,0 +1,71 @@
+/**
+ ******************************************************************************
+ * File Name : app_ble_lld.h
+ * Description : Header for BLE LLD application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_BLE_LLD_H
+#define APP_BLE_LLD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "ble_lld_transport.h"
+
+/* Private includes ----------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+
+/* Exported constants --------------------------------------------------------*/
+
+/* External variables --------------------------------------------------------*/
+
+/* Exported macros ------------------------------------------------------------*/
+
+/* Exported functions ------------------------------------------------------- */
+void APP_BLE_LLD_Init(void);
+void APP_BLE_LLD_Error(uint32_t ErrId, uint32_t ErrCode);
+void APP_BLE_LLD_Init_UART(void);
+void APP_BLE_LLD_DeInit_UART(void);
+
+void APP_BLE_LLD_uartRxStart(void(*cb)(char));
+
+void CheckWirelessFirmwareInfo(void);
+void uartWrite(const char *format, ...);
+void uartWriteRaw(const char *str);
+uint8_t APP_BLE_LLD_SendCmdM0(BLE_LLD_Code_t bleCmd);
+
+/**
+ * @brief Active polling for a given delay
+ * @param microsec the delay in us unit
+ **/
+void us_delay_16m(uint32_t microsec);
+void us_delay_32m(uint32_t microsec);
+#ifdef USE_SYS_CLOCK_DIV_2
+#define us_delay us_delay_16m
+#else
+#define us_delay us_delay_32m
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+
+#endif /* APP_BLE_LLD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.c
new file mode 100644
index 000000000..3dffc5b0f
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.c
@@ -0,0 +1,357 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : chat_app.c
+ * Description : CHAT LLD BLE Application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "utilities_common.h"
+#include "app_entry.h"
+#include "dbg_trace.h"
+#include "ble_lld.h"
+#include "ble_hal.h"
+#include "app_ble_lld.h"
+#include "tl.h"
+#include "shci.h"
+#include "stm_logging.h"
+#include "stm32_lpm.h"
+#include "stm32_seq.h"
+#include "gpio_lld.h"
+#include "chat_app.h"
+
+/* Private includes -----------------------------------------------------------*/
+
+/* Private typedef -----------------------------------------------------------*/
+
+typedef PACKED_STRUCT
+{
+ char message[200];
+} userPayloadMsg;
+
+// Defines user data format in payload
+typedef PACKED_STRUCT
+{
+ uint8_t type;
+ union{
+ userPayloadMsg msg;
+ } __attribute__((packed)) content;
+} userPayload;
+
+
+/* Private defines -----------------------------------------------------------*/
+#define CHANNEL 12 // Radio channel
+#define POWER TX_POW_PLUS_6_DB // Transmit power
+#define NET_ID 0xB55A54AA // Network ID (address) must be the same for the two boards
+#define RX_TIMEOUT_US (5*1000*1000) // max delay radio will listen for a packet
+#define RX_ACK_TIMEOUT_US 1000 // Timeout for acknowledge reception
+
+#define PROMPT "BLE LLD > "
+
+#define LED_CRYPTO LED_BLUE
+#define LED_TX LED_RED
+#define LED_RX LED_GREEN
+
+enum{
+ PAYLOAD_MSG,
+ PAYLOAD_ACK,
+};
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+
+static void CHAT_ToggleEncrypt(void);
+static void sendPacketStart(char *text);
+static void sendPacketEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+static void receivePacketStart(void);
+static void receivePacketEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+static void CHAT_StartTone(void);
+static void CHAT_StopTone(void);
+
+static void uartRxBufferProcess(void);
+static void uartRxCallback(char received);
+
+static void radioInit(void);
+
+static uint8_t payloadMsgPrepare(userPayload *payload, char *text);
+static bool payloadMsgCheck(userPayload *payload);
+static void payloadMsgExtract(userPayload *payload, char *text);
+static uint8_t payloadAckPrepare(userPayload *payload);
+static bool payloadAckCheck(userPayload *payload);
+
+/* Private variables -----------------------------------------------*/
+
+/* Encryption */
+static const uint8_t chatcountTx[5] = {0x00,0x00,0xAF,0x00,0x08};
+static const uint8_t chatcountRx[5] = {0x00,0x00,0xAF,0x00,0x08};
+// Key must be kept secret and unique for a given set of devices communicating with each other
+static const uint8_t chatenc_key[16] = {0xBF,0x01,0xFB,0x9D,0x4E,0xF3,0xBC,0x36,0xD8,0x74,0xF5,0x39,0x41,0x38,0x68,0x56};
+// IV must be chosen randomly at the beginning of each secure session
+static const uint8_t chatencIv[8] = {0x00,0x00,0xAF,0x00,0x08,0x00,0x00,0x00};
+
+/* Parameters */
+static bool chatEncrypt = true;
+
+/* Variables used for UART reception */
+static char uartRxChar;
+static char uartRxBuf[IPBLE_BLE_LLDANT_MAX_PAYLOAD_SIZE];
+
+/* Functions Definition ------------------------------------------------------*/
+
+void CHAT_APP_Init(void)
+{
+ /* Check the compatibility with the Coprocessor Wireless Firmware loaded */
+ CheckWirelessFirmwareInfo();
+
+ /* Do not allow standby in the application */
+ UTIL_LPM_SetOffMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE);
+ /* Disable low power mode for now, may be enable later depending on configuration */
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE );
+
+ /* Register tasks for event processing */
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_HAL_BLE_ENCRYPT , UTIL_SEQ_RFU, CHAT_ToggleEncrypt);
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_HAL_BLE_STARTTONE , UTIL_SEQ_RFU, CHAT_StartTone);
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_HAL_BLE_STOPTONE , UTIL_SEQ_RFU, CHAT_StopTone);
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_PROCESS_UART_RX_BUFFER, UTIL_SEQ_RFU, uartRxBufferProcess);
+
+ APP_BLE_LLD_Init();
+
+
+ radioInit();
+ uartWrite("");
+ uartWrite("************ ID: 0x%X / channel: %u **************", NET_ID, CHANNEL);
+ uartWriteRaw(PROMPT);
+
+ APP_BLE_LLD_uartRxStart(uartRxCallback);
+ receivePacketStart();
+}
+
+static void radioInit(void)
+{
+ HAL_BLE_LLD_Init(CFG_HS_STARTUP_TIME, true);
+ HAL_BLE_LLD_Configure(POWER, CHANNEL, true, CFG_BACK2BACK_TIME, NET_ID);
+
+ /* Encryption Parameters */
+ if (chatEncrypt) {
+ BLE_LLD_SetEncryptFlags(STATE_MACHINE_0, ENABLE);
+ BLE_LLD_SetEncryptionAttributes(STATE_MACHINE_0, &chatencIv, &chatenc_key);
+ BLE_LLD_SetEncryptionCount(STATE_MACHINE_0, &chatcountTx, &chatcountRx);
+ BSP_LED_On(LED_CRYPTO);
+ }else{
+ BLE_LLD_SetEncryptFlags(STATE_MACHINE_0, DISABLE);
+ BSP_LED_Off(LED_CRYPTO);
+ }
+
+ BSP_LED_Off(LED_RX);
+ BSP_LED_Off(LED_TX);
+}
+
+// Stores the received character and schedules its processing
+static void uartRxCallback(char received)
+{
+ uartRxChar = received;
+ UTIL_SEQ_SetTask(1U << CFG_TASK_PROCESS_UART_RX_BUFFER, CFG_SCH_PRIO_0);
+}
+
+// Processes received character (send packet when line complete)
+static void uartRxBufferProcess(void)
+{
+ static uint8_t uartRxBufIdx = 0;
+ if (uartRxChar == '\n' || uartRxChar == '\r'){
+ uartRxBuf[uartRxBufIdx] = '\0';
+ uartRxBufIdx = 0;
+ sendPacketStart(uartRxBuf);
+ } else if (uartRxBufIdx < (sizeof(uartRxBuf) - 1)){
+ char echo[2];
+ uartRxBuf[uartRxBufIdx] = uartRxChar;
+ uartRxBufIdx++;
+ // Send echo
+ echo[0] = uartRxChar;
+ echo[1] = '\0';
+ uartWriteRaw(echo);
+ }else{
+ APP_DBG("WARNING: UART buffer full");
+ }
+}
+
+/* Appli common functions */
+
+
+/* Appli custom functions */
+
+static void CHAT_ToggleEncrypt(void)
+{
+ BLE_LLD_StopActivity();
+ chatEncrypt = !chatEncrypt;
+ // Radio was destroyed by StopActivity
+ radioInit();
+ uartWrite("");
+ uartWrite("************ %s **************", chatEncrypt ? "Encrypted" : "UnEncrypted");
+ uartWriteRaw(PROMPT);
+ receivePacketStart();
+}
+
+static void sendPacketStart(char *text)
+{
+ userPayload payload;
+ uint8_t payloadSize;
+ BLE_LLD_StopActivity();
+ radioInit();
+
+ payloadSize = payloadMsgPrepare(&payload, uartRxBuf);
+ HAL_BLE_LLD_SendPacketWithAck(&payload,
+ payloadSize,
+ RX_ACK_TIMEOUT_US,
+ sendPacketEnd);
+}
+
+static void sendPacketEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+ userPayload *payload = data;
+
+ APP_DBG("%s: event %s", __func__, eventToString(cmd));
+
+ if (cmd == RX_OK_READY){
+ if (! payloadAckCheck(payload)){
+ APP_DBG("INFO: wrong packet type");
+ }else{
+ uartWrite("");
+ uartWriteRaw(PROMPT);
+ }
+ }else if (cmd != TX_OK_BUSY){
+ uartWrite("");
+ uartWrite("ERROR: message delivery failed");
+ uartWriteRaw(PROMPT);
+ }
+ if (RADIO_IS_READY(cmd)){
+ receivePacketStart();
+ }
+}
+
+static void receivePacketStart(void)
+{
+ uint8_t status;
+ userPayload payload;
+ uint8_t payloadSize;
+ payloadSize = payloadAckPrepare(&payload);
+ status = HAL_BLE_LLD_ReceivePacketWithAck(&payload,
+ payloadSize,
+ RX_TIMEOUT_US,
+ receivePacketEnd);
+ if (SUCCESS_0 != status){
+ APP_DBG("HAL_BLE_LLD_ReceivePacketWithAck returned error 0x%X", status);
+ }
+}
+
+static void receivePacketEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+ char display[sizeof(userPayloadMsg)];
+ userPayload *payload = data;
+ APP_DBG("%s: event %s", __func__, eventToString(cmd));
+ // Display data as soon as it is received (ACK is still being sent)
+ if (cmd == RX_OK_BUSY){
+ if (!payloadMsgCheck(payload)){
+ APP_DBG("INFO: wrong packet type");
+ }else{
+ payloadMsgExtract(payload, display);
+ uartWriteRaw(display);
+ uartWrite("");
+ uartWriteRaw(PROMPT);
+ }
+ }
+ if (RADIO_IS_READY(cmd)){
+ receivePacketStart();
+ }
+}
+
+static uint8_t payloadMsgPrepare(userPayload *payload, char *text)
+{
+ payload->type = PAYLOAD_MSG;
+ strncpy(payload->content.msg.message, uartRxBuf, (sizeof(userPayloadMsg) - 1));
+ payload->content.msg.message[sizeof(userPayloadMsg) - 1] = '\0';
+ // Be careful to update computed size if structure changes
+ return (sizeof(userPayload) - sizeof(userPayloadMsg) +
+ strlen(payload->content.msg.message) + 1);
+}
+
+static bool payloadMsgCheck(userPayload *payload)
+{
+ return (payload->type == PAYLOAD_MSG);
+}
+
+static void payloadMsgExtract(userPayload *payload, char *text)
+{
+ strncpy(text, payload->content.msg.message, (sizeof(userPayloadMsg) - 1));
+ text[sizeof(userPayloadMsg) - 1] = '\0';
+}
+
+static uint8_t payloadAckPrepare(userPayload *payload)
+{
+ payload->type = PAYLOAD_ACK;
+ // Be careful to update computed size if structure changes
+ return (sizeof(userPayload) - sizeof(userPayloadMsg));
+}
+
+static bool payloadAckCheck(userPayload *payload)
+{
+ return (payload->type == PAYLOAD_ACK);
+}
+
+static void CHAT_StartTone(void)
+{
+ BLE_LLD_StopActivity();
+ BLE_LLD_StartTone(14, 30); /* 14 for BLE channel 12*/
+ BSP_LED_On(LED_TX);
+ BSP_LED_On(LED_RX);
+}
+
+static void CHAT_StopTone(void)
+{
+ BLE_LLD_StopTone();
+ BSP_LED_Off(LED_TX);
+ BSP_LED_Off(LED_RX);
+}
+
+/* USER CODE END FD */
+
+/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
+void HAL_GPIO_EXTI_Callback( uint16_t GPIO_Pin )
+{
+ switch (GPIO_Pin)
+ {
+ case BUTTON_SW1_PIN:
+ UTIL_SEQ_SetTask(1U << CFG_TASK_HAL_BLE_ENCRYPT, CFG_SCH_PRIO_0);
+ break;
+
+ case BUTTON_SW2_PIN:
+ HAL_NVIC_DisableIRQ(BUTTON_SW2_EXTI_IRQn);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_HAL_BLE_STARTTONE, CFG_SCH_PRIO_0);
+ break;
+
+ case BUTTON_SW3_PIN:
+ HAL_NVIC_DisableIRQ(BUTTON_SW3_EXTI_IRQn);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_HAL_BLE_STOPTONE, CFG_SCH_PRIO_0);
+ break;
+
+ default:
+ break;
+ }
+ return;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.h
new file mode 100644
index 000000000..4a79927a7
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.h
@@ -0,0 +1,50 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : chat_app.h
+ * Description : Header for BLE LLD application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef CHAT_APP_H
+#define CHAT_APP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+
+/* Exported constants --------------------------------------------------------*/
+
+/* External variables --------------------------------------------------------*/
+
+/* Exported macros ------------------------------------------------------------*/
+
+/* Exported functions ------------------------------------------------------- */
+void CHAT_APP_Init(void);
+void Appli_TIM_IC_CaptureCallback(void);
+void Appli_TIM_PeriodElapsedCallback(void);
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/tl_dbg_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/tl_dbg_conf.h
new file mode 100644
index 000000000..b468b2863
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/tl_dbg_conf.h
@@ -0,0 +1,126 @@
+/**
+ ******************************************************************************
+ * File Name : tl_dbg_conf.h
+ * Description : Debug configuration file for stm32wpan transport layer interface.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TL_DBG_CONF_H
+#define __TL_DBG_CONF_H
+
+/* USER CODE BEGIN Tl_Conf */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_conf.h" /* required as some configuration used in dbg_trace.h are set there */
+#include "dbg_trace.h"
+#include "hw_if.h"
+
+/**
+ * Enable or Disable traces
+ * The raw data output is the hci binary packet format as specified by the BT specification *
+ */
+#define TL_SHCI_CMD_DBG_EN 0 /* Reports System commands sent to CPU2 and the command response */
+#define TL_SHCI_CMD_DBG_RAW_EN 0 /* Reports raw data System commands sent to CPU2 and the command response */
+#define TL_SHCI_EVT_DBG_EN 0 /* Reports System Asynchronous Events received from CPU2 */
+#define TL_SHCI_EVT_DBG_RAW_EN 0 /* Reports raw data System Asynchronous Events received from CPU2 */
+
+#define TL_HCI_CMD_DBG_EN 0 /* Reports BLE command sent to CPU2 and the command response */
+#define TL_HCI_CMD_DBG_RAW_EN 0 /* Reports raw data BLE command sent to CPU2 and the command response */
+#define TL_HCI_EVT_DBG_EN 0 /* Reports BLE Asynchronous Events received from CPU2 */
+#define TL_HCI_EVT_DBG_RAW_EN 0 /* Reports raw data BLE Asynchronous Events received from CPU2 */
+
+#define TL_MM_DBG_EN 0 /* Reports the informations of the buffer released to CPU2 */
+
+/**
+ * Macro definition
+ */
+
+/**
+ * System Transport Layer
+ */
+#if (TL_SHCI_CMD_DBG_EN != 0)
+#define TL_SHCI_CMD_DBG_MSG PRINT_MESG_DBG
+#define TL_SHCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_SHCI_CMD_DBG_MSG(...)
+#define TL_SHCI_CMD_DBG_BUF(...)
+#endif
+
+#if (TL_SHCI_CMD_DBG_RAW_EN != 0)
+#define TL_SHCI_CMD_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_SHCI_CMD_DBG_RAW(...)
+#endif
+
+#if (TL_SHCI_EVT_DBG_EN != 0)
+#define TL_SHCI_EVT_DBG_MSG PRINT_MESG_DBG
+#define TL_SHCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_SHCI_EVT_DBG_MSG(...)
+#define TL_SHCI_EVT_DBG_BUF(...)
+#endif
+
+#if (TL_SHCI_EVT_DBG_RAW_EN != 0)
+#define TL_SHCI_EVT_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_SHCI_EVT_DBG_RAW(...)
+#endif
+
+/**
+ * BLE Transport Layer
+ */
+#if (TL_HCI_CMD_DBG_EN != 0)
+#define TL_HCI_CMD_DBG_MSG PRINT_MESG_DBG
+#define TL_HCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_HCI_CMD_DBG_MSG(...)
+#define TL_HCI_CMD_DBG_BUF(...)
+#endif
+
+#if (TL_HCI_CMD_DBG_RAW_EN != 0)
+#define TL_HCI_CMD_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_HCI_CMD_DBG_RAW(...)
+#endif
+
+#if (TL_HCI_EVT_DBG_EN != 0)
+#define TL_HCI_EVT_DBG_MSG PRINT_MESG_DBG
+#define TL_HCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_HCI_EVT_DBG_MSG(...)
+#define TL_HCI_EVT_DBG_BUF(...)
+#endif
+
+#if (TL_HCI_EVT_DBG_RAW_EN != 0)
+#define TL_HCI_EVT_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_HCI_EVT_DBG_RAW(...)
+#endif
+
+/**
+ * Memory Manager - Released buffer tracing
+ */
+#if (TL_MM_DBG_EN != 0)
+#define TL_MM_DBG_MSG PRINT_MESG_DBG
+#else
+#define TL_MM_DBG_MSG(...)
+#endif
+
+/* USER CODE END Tl_Conf */
+
+#endif /*__TL_DBG_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/Target/hw_ipcc.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/Target/hw_ipcc.c
new file mode 100644
index 000000000..7ce3de621
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/STM32_WPAN/Target/hw_ipcc.c
@@ -0,0 +1,676 @@
+/**
+ ******************************************************************************
+ * File Name : Target/hw_ipcc.c
+ * Description : Hardware IPCC source file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "mbox_def.h"
+
+/* Global variables ---------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
+#define HW_IPCC_TX_PENDING( channel ) ( !(LL_C1_IPCC_IsActiveFlag_CHx( IPCC, channel )) ) && (((~(IPCC->C1MR)) & (channel << 16U)))
+#define HW_IPCC_RX_PENDING( channel ) (LL_C2_IPCC_IsActiveFlag_CHx( IPCC, channel )) && (((~(IPCC->C1MR)) & (channel << 0U)))
+
+/* Private macros ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static void (*FreeBufCb)( void );
+
+/* Private function prototypes -----------------------------------------------*/
+static void HW_IPCC_BLE_EvtHandler( void );
+static void HW_IPCC_BLE_AclDataEvtHandler( void );
+static void HW_IPCC_MM_FreeBufHandler( void );
+static void HW_IPCC_SYS_CmdEvtHandler( void );
+static void HW_IPCC_SYS_EvtHandler( void );
+static void HW_IPCC_TRACES_EvtHandler( void );
+
+#ifdef THREAD_WB
+static void HW_IPCC_OT_CmdEvtHandler( void );
+static void HW_IPCC_THREAD_NotEvtHandler( void );
+static void HW_IPCC_THREAD_CliNotEvtHandler( void );
+#endif
+
+#ifdef LLD_TESTS_WB
+static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void );
+static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void );
+#endif
+
+#ifdef BLE_LLD_WB
+/*static void HW_IPCC_BLE_LLD_ReceiveCliRspHandler( void );*/
+static void HW_IPCC_BLE_LLD_ReceiveRspHandler( void );
+static void HW_IPCC_BLE_LLD_ReceiveM0CmdHandler( void );
+#endif
+
+#ifdef MAC_802_15_4_WB
+static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void );
+static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void );
+#endif
+
+#ifdef ZIGBEE_WB
+static void HW_IPCC_ZIGBEE_CmdEvtHandler( void );
+static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void );
+static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void );
+#endif
+
+/* Public function definition -----------------------------------------------*/
+
+/******************************************************************************
+ * INTERRUPT HANDLER
+ ******************************************************************************/
+void HW_IPCC_Rx_Handler( void )
+{
+ if (HW_IPCC_RX_PENDING( HW_IPCC_SYSTEM_EVENT_CHANNEL ))
+ {
+ HW_IPCC_SYS_EvtHandler();
+ }
+#ifdef MAC_802_15_4_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ))
+ {
+ HW_IPCC_MAC_802_15_4_NotEvtHandler();
+ }
+#endif /* MAC_802_15_4_WB */
+#ifdef THREAD_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ))
+ {
+ HW_IPCC_THREAD_NotEvtHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ))
+ {
+ HW_IPCC_THREAD_CliNotEvtHandler();
+ }
+#endif /* THREAD_WB */
+#ifdef LLD_TESTS_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ))
+ {
+ HW_IPCC_LLDTESTS_ReceiveCliRspHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ))
+ {
+ HW_IPCC_LLDTESTS_ReceiveM0CmdHandler();
+ }
+#endif /* LLD_TESTS_WB */
+#ifdef BLE_LLD_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_LLD_RSP_CHANNEL ))
+ {
+ HW_IPCC_BLE_LLD_ReceiveRspHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_LLD_M0_CMD_CHANNEL ))
+ {
+ HW_IPCC_BLE_LLD_ReceiveM0CmdHandler();
+ }
+#endif /* BLE_LLD_WB */
+#ifdef ZIGBEE_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ))
+ {
+ HW_IPCC_ZIGBEE_StackNotifEvtHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ))
+ {
+ HW_IPCC_ZIGBEE_StackM0RequestHandler();
+ }
+#endif /* ZIGBEE_WB */
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_EVENT_CHANNEL ))
+ {
+ HW_IPCC_BLE_EvtHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_TRACES_CHANNEL ))
+ {
+ HW_IPCC_TRACES_EvtHandler();
+ }
+
+ return;
+}
+
+void HW_IPCC_Tx_Handler( void )
+{
+ if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_SYS_CmdEvtHandler();
+ }
+#ifdef MAC_802_15_4_WB
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_MAC_802_15_4_CmdEvtHandler();
+ }
+#endif /* MAC_802_15_4_WB */
+#ifdef THREAD_WB
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_OT_CmdEvtHandler();
+ }
+#endif /* THREAD_WB */
+#ifdef LLD_TESTS_WB
+// No TX handler for LLD tests
+#endif /* LLD_TESTS_WB */
+#ifdef ZIGBEE_WB
+ if (HW_IPCC_TX_PENDING( HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL ))
+ {
+ HW_IPCC_ZIGBEE_CmdEvtHandler();
+ }
+#endif /* ZIGBEE_WB */
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_SYS_CmdEvtHandler();
+ }
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ))
+ {
+ HW_IPCC_MM_FreeBufHandler();
+ }
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_HCI_ACL_DATA_CHANNEL ))
+ {
+ HW_IPCC_BLE_AclDataEvtHandler();
+ }
+
+ return;
+}
+/******************************************************************************
+ * GENERAL
+ ******************************************************************************/
+void HW_IPCC_Enable( void )
+{
+ /**
+ * Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running
+ when FUS is running on CPU2 and CPU1 enters deep sleep mode
+ */
+ LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC);
+
+ /**
+ * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2
+ */
+ LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 );
+ LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 );
+
+ /**
+ * In case the SBSFU is implemented, it may have already set the C2BOOT bit to startup the CPU2.
+ * In that case, to keep the mechanism transparent to the user application, it shall call the system command
+ * SHCI_C2_Reinit( ) before jumping to the application.
+ * When the CPU2 receives that command, it waits for its event input to be set to restart the CPU2 firmware.
+ * This is required because once C2BOOT has been set once, a clear/set on C2BOOT has no effect.
+ * When SHCI_C2_Reinit( ) is not called, generating an event to the CPU2 does not have any effect
+ * So, by default, the application shall both set the event flag and set the C2BOOT bit.
+ */
+ __SEV( ); /* Set the internal event flag and send an event to the CPU2 */
+ __WFE( ); /* Clear the internal event flag */
+ LL_PWR_EnableBootC2( );
+
+ return;
+}
+
+void HW_IPCC_Init( void )
+{
+ LL_AHB3_GRP1_EnableClock( LL_AHB3_GRP1_PERIPH_IPCC );
+
+ LL_C1_IPCC_EnableIT_RXO( IPCC );
+ LL_C1_IPCC_EnableIT_TXF( IPCC );
+
+ HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn);
+ HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn);
+
+ return;
+}
+
+/******************************************************************************
+ * BLE
+ ******************************************************************************/
+void HW_IPCC_BLE_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_EVENT_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_BLE_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_CMD_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_BLE_EvtHandler( void )
+{
+ HW_IPCC_BLE_RxEvtNot();
+
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_EVENT_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_BLE_SendAclData( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_BLE_AclDataEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+
+ HW_IPCC_BLE_AclDataAckNot();
+
+ return;
+}
+
+__weak void HW_IPCC_BLE_AclDataAckNot( void ){};
+__weak void HW_IPCC_BLE_RxEvtNot( void ){};
+
+/******************************************************************************
+ * SYSTEM
+ ******************************************************************************/
+void HW_IPCC_SYS_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_SYS_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_SYS_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+
+ HW_IPCC_SYS_CmdEvtNot();
+
+ return;
+}
+
+static void HW_IPCC_SYS_EvtHandler( void )
+{
+ HW_IPCC_SYS_EvtNot();
+
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL );
+
+ return;
+}
+
+__weak void HW_IPCC_SYS_CmdEvtNot( void ){};
+__weak void HW_IPCC_SYS_EvtNot( void ){};
+
+/******************************************************************************
+ * MAC 802.15.4
+ ******************************************************************************/
+#ifdef MAC_802_15_4_WB
+void HW_IPCC_MAC_802_15_4_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_MAC_802_15_4_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_MAC_802_15_4_SendAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+
+ HW_IPCC_MAC_802_15_4_CmdEvtNot();
+
+ return;
+}
+
+static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+ HW_IPCC_MAC_802_15_4_EvtNot();
+
+ return;
+}
+__weak void HW_IPCC_MAC_802_15_4_CmdEvtNot( void ){};
+__weak void HW_IPCC_MAC_802_15_4_EvtNot( void ){};
+#endif
+
+/******************************************************************************
+ * THREAD
+ ******************************************************************************/
+#ifdef THREAD_WB
+void HW_IPCC_THREAD_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_OT_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_CLI_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_CMD_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_THREAD_SendAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_THREAD_CliSendAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_OT_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+
+ HW_IPCC_OT_CmdEvtNot();
+
+ return;
+}
+
+static void HW_IPCC_THREAD_NotEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+
+ HW_IPCC_THREAD_EvtNot();
+
+ return;
+}
+
+static void HW_IPCC_THREAD_CliNotEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+ HW_IPCC_THREAD_CliEvtNot();
+
+ return;
+}
+
+__weak void HW_IPCC_OT_CmdEvtNot( void ){};
+__weak void HW_IPCC_CLI_CmdEvtNot( void ){};
+__weak void HW_IPCC_THREAD_EvtNot( void ){};
+
+#endif /* THREAD_WB */
+
+/******************************************************************************
+ * LLD TESTS
+ ******************************************************************************/
+#ifdef LLD_TESTS_WB
+void HW_IPCC_LLDTESTS_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ return;
+}
+
+void HW_IPCC_LLDTESTS_SendCliCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ HW_IPCC_LLDTESTS_ReceiveCliRsp();
+ return;
+}
+
+void HW_IPCC_LLDTESTS_SendCliRspAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ HW_IPCC_LLDTESTS_ReceiveM0Cmd();
+ return;
+}
+
+
+void HW_IPCC_LLDTESTS_SendM0CmdAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ return;
+}
+__weak void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ){};
+__weak void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ){};
+#endif /* LLD_TESTS_WB */
+
+/******************************************************************************
+ * BLE LLD
+ ******************************************************************************/
+#ifdef BLE_LLD_WB
+void HW_IPCC_BLE_LLD_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ return;
+}
+
+void HW_IPCC_BLE_LLD_SendCliCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_LLD_CLI_CMD_CHANNEL );
+ return;
+}
+
+/*static void HW_IPCC_BLE_LLD_ReceiveCliRspHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL );
+ HW_IPCC_BLE_LLD_ReceiveCliRsp();
+ return;
+}*/
+
+void HW_IPCC_BLE_LLD_SendCliRspAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_BLE_LLD_ReceiveM0CmdHandler( void )
+{
+ //LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ HW_IPCC_BLE_LLD_ReceiveM0Cmd();
+ return;
+}
+
+
+void HW_IPCC_BLE_LLD_SendM0CmdAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ //LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ return;
+}
+__weak void HW_IPCC_BLE_LLD_ReceiveCliRsp( void ){};
+__weak void HW_IPCC_BLE_LLD_ReceiveM0Cmd( void ){};
+
+/* Transparent Mode */
+void HW_IPCC_BLE_LLD_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_LLD_CMD_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_BLE_LLD_ReceiveRspHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ HW_IPCC_BLE_LLD_ReceiveRsp();
+ return;
+}
+
+void HW_IPCC_BLE_LLD_SendRspAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ return;
+}
+
+#endif /* BLE_LLD_WB */
+
+/******************************************************************************
+ * ZIGBEE
+ ******************************************************************************/
+#ifdef ZIGBEE_WB
+void HW_IPCC_ZIGBEE_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4RequestToM0( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4AckToM0Notify( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_ZIGBEE_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+
+ HW_IPCC_ZIGBEE_RecvAppliAckFromM0();
+
+ return;
+}
+
+static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+
+ HW_IPCC_ZIGBEE_RecvM0NotifyToM4();
+
+ return;
+}
+
+static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+ HW_IPCC_ZIGBEE_RecvM0RequestToM4();
+
+ return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4AckToM0Request( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+ return;
+}
+
+__weak void HW_IPCC_ZIGBEE_RecvAppliAckFromM0( void ){};
+__weak void HW_IPCC_ZIGBEE_RecvM0NotifyToM4( void ){};
+__weak void HW_IPCC_ZIGBEE_RecvM0RequestToM4( void ){};
+#endif /* ZIGBEE_WB */
+
+/******************************************************************************
+ * MEMORY MANAGER
+ ******************************************************************************/
+void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) )
+{
+ if ( LL_C1_IPCC_IsActiveFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ) )
+ {
+ FreeBufCb = cb;
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+ }
+ else
+ {
+ cb();
+
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+ }
+
+ return;
+}
+
+static void HW_IPCC_MM_FreeBufHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+
+ FreeBufCb();
+
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+
+ return;
+}
+
+/******************************************************************************
+ * TRACES
+ ******************************************************************************/
+void HW_IPCC_TRACES_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_TRACES_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_TRACES_EvtHandler( void )
+{
+ HW_IPCC_TRACES_EvtNot();
+
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_TRACES_CHANNEL );
+
+ return;
+}
+
+__weak void HW_IPCC_TRACES_EvtNot( void ){};
+
+/******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/readme.txt b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/readme.txt
new file mode 100644
index 000000000..6258543b4
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Chat/readme.txt
@@ -0,0 +1,152 @@
+/**
+ @page BLE_LLD_Chat example
+
+ @verbatim
+ ******************** (C) COPYRIGHT 2021 STMicroelectronics *******************
+ * @file BLE_LLD/BLE_LLD_Chat/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the BLE LLD BLE_LLD_Chat application
+ ******************************************************************************
+ *
+ * Copyright (c) 2021 STMicroelectronics. All rights reserved.
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+How to create a "Chat" talk between 2 boards using terminals.
+
+@note The objectives are to communicate using BLE_LLD between 2 boards,
+ in BLE Radio format not BLE Stack protocol.
+ BLE_LLD_Chat uses 2 terminal and through uart by typing Text on terminal.
+ It sends the text into the payload and this payload is received on other board
+ and text into the payload is displayed on terminal using uart.
+
+@note BLE_LLD is a 2-level stack implemented just over the Hardware and Radio layer.
+ Lowest Layer also called Low Level or LL
+ It is just over the Hardware and Radio Layer.
+ It contains all the API to Set/Configure/Initialize all the parameters for Sending/receiving BLE Radio format packet data
+ Over LL layer there is HAL level
+ It contains a reduced number of API to Send/Receive BLE Radio format packet with predefined parameters
+ It works by calling a set of LL API
+ It make simple and fast to Send/Receive Packet
+ But It does allow the user to change all the Radio parameters
+
+@note LL is for user that want to customize the Radio and BLE parameters, it is more complex to implement
+ HAL is for user that want to Send/Receive in a very simple way less complex, without configuring LL
+ ble_lld module contains LLD API HAL and LL API
+ app_ble_lld module contains Transport Layer Command call from CPU1 to CPU2 + Buffer management + IT Radio management from CPU2
+
+@par Keywords
+
+BLE_LLD, Connectivity, BLE, LLD, IPCC, HAL, Dual core, send and receive Packet
+
+@par Directory contents
+
+ - BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.h Header for app_ble_lld.c module
+ - BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.h Header for Chat Application chat_app.c module
+ - BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/tl_dbg_conf.h Header for ble_lld debug module
+ - BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/app_ble_lld.c contains TL management and Buffer for BLE LLD Application
+ - BLE_LLD/BLE_LLD_Chat/STM32_WPAN/App/chat_app.c Chat program
+ - BLE_LLD/BLE_LLD_Chat/STM32_WPAN/Target/hw_ipcc.c IPCC Driver
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/app_common.h Header for all modules with common definition
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/app_conf.h Parameters configuration file of the application
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/app_entry.h Parameters configuration file of the application
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/gpio_lld.h Parameters for gpio configuration file of the application
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_conf.h Configuration file of the HW
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/hw_if.h Configuration file of the HW
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/main.h Header for main.c module
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/stm_logging.h Header for stm_logging.c module
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32_lpm_if.h Header for stm32_lpm_if.c module
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_hal_conf.h HAL configuration file
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/stm32wbxx_it.h Interrupt handlers header file
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/utilities_conf.h Configuration file of the utilities
+ - BLE_LLD/BLE_LLD_Chat/Core/Inc/nucleo_wb15cc_conf.h NUCLEO-WB15CC board configuration file
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/app_entry.c Initialization of the application
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/gpio_lld.c GPIO for application
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/hw_timerserver.c TIMERSERVER for Lowpower application
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/hw_uart.c UART Driver
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/main.c Main program
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/stm_logging.c Logging for application
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/stm32_lpm_if.c Low Power Manager Interface
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_it.c Interrupt handlers
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/system_stm32wbxx.c stm32wbxx system source file
+ - BLE_LLD/BLE_LLD_Chat/Core/Src/stm32wbxx_hal_msp.c HAL MPS for application
+
+@par Hardware and Software environment
+
+ - This application uses two STM32WB15xx devices.
+
+ - This example has been tested with an STMicroelectronics NUCLEO-WB15CC
+ board and can be easily tailored to any other supported device
+ and development board.
+
+ - On NUCLEO-WB15CC, the jumpers must be configured as described
+ in this section. Starting from the top left position up to the bottom
+ right position, the jumpers on the Board must be set as follows:
+
+ CN11: GND [OFF]
+ JP4: VDDRF [ON]
+ JP6: VC0 [ON]
+ JP2: +3V3 [ON]
+ JP1: USB_STL [ON] All others [OFF]
+ CN12: GND [OFF]
+ CN7: <All> [OFF]
+ JP3: VDD_MCU [ON]
+ JP5: GND [OFF] All others [ON]
+ CN10: <All> [OFF]
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Connect 1 NUCLEO-WB15CC board to your PC
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into one target memory
+ - Rebuild all files of BLE_LLD/BLE_LLD_Chat application
+ and load your image into the other target memory
+ + load stm32wb1x_BLE_LLD_fw.bin
+ - Run the application
+
+BLE_LLD_Chat used only HAL API for Send/Receive not LL
+
+You can control this application, after power and reset
+You can start to Chat using Uart Com Terminal and you can press buttons
+
+After power On or Reset (ALL the LED are OFF) without pressing SW button:
+ 1) RadioInit is done and Default Encryption is set (LED1 is ON), Low-Power is not activated
+ 2) Radio is listening and if text is received from another board it is printed through the Uart Com Terminal
+ 3) If text is typed through the Uart Com Terminal Radio is no more listenning and text is send to another board
+ 4) loop on step 2
+
+
+Press SW1 to change Chat by applying or not Default Radio Encryption Communication
+ 1) If Default Encryption is set, Encryption is unset.
+ 2) If Encryption is not set, Default Encryption is set
+This Encryption:
+ - uses default KEY and IV parameters. Default KEY and IV must be managed by implementing a Dedicated Encryption Stack not developed in this application
+ - is only implemented in order to present how the Encryption LL API are called and how Radio Encryption Communication works
+
+Press SW2 to Start the Tone
+ 1) StartTone is launched only one time (SW2 inactive after)
+ 2) It can be stopped by resetting board or by using StopTone
+ Chat will not work after StartTone: reset board must be performed after StartTone
+
+Press SW3 to Stop the Tone
+ 1) StopTone is launched only one time (SW3 inactive after)
+ Chat will not work after StopTone: reset board must be performed after StopTone
+
+Serial Port Setup TERMINAL
+Baud Rate:115200 / Data:8 bits / Parity:none / Stop:1bit / Flow Control:none
+
+255 max for Payload if Non-Encrypt
+251 max if Encrypt (4 bytes are added by hardware)
+
+ * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
+ */ \ No newline at end of file
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_common.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_common.h
new file mode 100644
index 000000000..5bb0f82f1
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_common.h
@@ -0,0 +1,124 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : app_common.h
+ * Description : App Common application configuration file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_COMMON_H
+#define APP_COMMON_H
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "main.h"
+#include "app_conf.h"
+
+ /* -------------------------------- *
+ * Basic definitions *
+ * -------------------------------- */
+
+#undef NULL
+#define NULL 0
+
+#undef FALSE
+#define FALSE 0
+
+#undef TRUE
+#define TRUE (!0)
+
+ /* -------------------------------- *
+ * Critical Section definition *
+ * -------------------------------- */
+#define BACKUP_PRIMASK() uint32_t primask_bit= __get_PRIMASK()
+#define DISABLE_IRQ() __disable_irq()
+#define RESTORE_PRIMASK() __set_PRIMASK(primask_bit)
+
+ /* -------------------------------- *
+ * Macro delimiters *
+ * -------------------------------- */
+
+#define M_BEGIN do {
+
+#define M_END } while(0)
+
+ /* -------------------------------- *
+ * Some useful macro definitions *
+ * -------------------------------- */
+
+#ifndef MAX
+#define MAX( x, y ) (((x)>(y))?(x):(y))
+#endif
+
+#ifndef MIN
+#define MIN( x, y ) (((x)<(y))?(x):(y))
+#endif
+
+#define MODINC( a, m ) M_BEGIN (a)++; if ((a)>=(m)) (a)=0; M_END
+
+#define MODDEC( a, m ) M_BEGIN if ((a)==0) (a)=(m); (a)--; M_END
+
+#define MODADD( a, b, m ) M_BEGIN (a)+=(b); if ((a)>=(m)) (a)-=(m); M_END
+
+#define MODSUB( a, b, m ) MODADD( a, (m)-(b), m )
+
+#define PAUSE( t ) M_BEGIN \
+ __IO int _i; \
+ for ( _i = t; _i > 0; _i -- ); \
+ M_END
+
+#define DIVF( x, y ) ((x)/(y))
+
+#define DIVC( x, y ) (((x)+(y)-1)/(y))
+
+#define DIVR( x, y ) (((x)+((y)/2))/(y))
+
+#define SHRR( x, n ) ((((x)>>((n)-1))+1)>>1)
+
+#define BITN( w, n ) (((w)[(n)/32] >> ((n)%32)) & 1)
+
+#define BITNSET( w, n, b ) M_BEGIN (w)[(n)/32] |= ((U32)(b))<<((n)%32); M_END
+
+#define CRITICAL_BEGIN( ) M_BEGIN BACKUP_PRIMASK(); DISABLE_IRQ()
+
+#define CRITICAL_END( ) RESTORE_PRIMASK(); M_END
+
+ /* -------------------------------- *
+ * Compiler *
+ * -------------------------------- */
+#define PLACE_IN_SECTION( __x__ ) __attribute__((section (__x__)))
+
+#ifdef WIN32
+#define ALIGN(n)
+#else
+#define ALIGN(n) __attribute__((aligned(n)))
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_COMMON_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_conf.h
new file mode 100644
index 000000000..b21ab05e2
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_conf.h
@@ -0,0 +1,337 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : app_conf.h
+ * Description : Application configuration file for STM32WPAN Middleware.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_CONF_H
+#define APP_CONF_H
+
+#include "hw.h"
+#include "hw_conf.h"
+#include "hw_if.h"
+
+/******************************************************************************
+ * Application Config
+ ******************************************************************************/
+#define CFG_HS_STARTUP_TIME 0x0099 /* Start up time of the high speed oscillator in system time units (625/256us) */
+
+#define CFG_BACK2BACK_TIME 200 /* Back to back time (us) */
+
+/******************************************************************************
+ * Transport Layer
+ ******************************************************************************/
+/**
+ * Queue length of M0 traces/log messages
+ * This parameter defines the number of asynchronous events that can be stored in the M0 test FW before
+ * being reported to the M4 which will re-build traces/log messages before to send them to UART.
+ * This parameter is combined with the CFG_TL_MOST_EVENT_PAYLOAD_SIZE to calculate the queue size needed by M0 for traces.
+ */
+#define CFG_TL_EVT_QUEUE_LENGTH 20
+/**
+ * TL_EVENT_FRAME_SIZE is the size of the packets transfered between M0 and M4 through IPCC.
+ * Note 1 : thoose packets are first put in a trace queue (see DBG_TRACE_MSG_QUEUE_SIZE) before beeing sent to UART
+ * Note 2 : Queue size must be higher than a M0 trace buffer max size (see LOG_BUFFER_SIZE_MAX in M0 FW)
+ */
+#define CFG_TL_MOST_EVENT_PAYLOAD_SIZE 255
+
+#define TL_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TL_MOST_EVENT_PAYLOAD_SIZE )
+
+/******************************************************************************
+ * UART interfaces
+ ******************************************************************************/
+/**
+ * Select UART interfaces
+ */
+#define CFG_DEBUG_TRACE_UART hw_lpuart1
+#define CFG_UART hw_uart1
+
+/******************************************************************************
+ * USB interface
+ ******************************************************************************/
+
+/**
+ * Enable/Disable USB interface
+ */
+#define CFG_USB_INTERFACE_ENABLE 0
+
+/******************************************************************************
+ * Low Power
+ *
+ * When BLE_LLD_LP is set to 1:
+ * the system is configured in low power mode CFG_LPM_SUPPORTED
+ *
+ * When BLE_LLD_LP is not set, the low power mode is not activated
+ *
+ ******************************************************************************/
+#define CFG_LPM_SUPPORTED 0
+
+#ifdef BLE_LLD_LP
+#undef CFG_LPM_SUPPORTED
+#define CFG_LPM_SUPPORTED 1
+#endif
+
+#define CFG_PWR_MODE_STOP LL_PWR_MODE_STOP1
+
+/******************************************************************************
+ * Timer Server
+ ******************************************************************************/
+/**
+ * CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
+ * The higher is the value, the better is the power consumption and the accuracy of the timerserver
+ * The lower is the value, the finest is the granularity
+ *
+ * CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput
+ * clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
+ * the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
+ *
+ * CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
+ * When the 1Hz calendar clock is required, it shall be sets according to other settings
+ * When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
+ *
+ * CFG_RTCCLK_DIVIDER_CONF:
+ * Shall be set to either 0,2,4,8,16
+ * When set to either 2,4,8,16, the 1Hhz calendar is supported
+ * When set to 0, the user sets its own configuration
+ *
+ * The following settings are computed with LSI as input to the RTC
+ */
+#define CFG_RTCCLK_DIVIDER_CONF 0
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 0)
+/**
+ * Custom configuration
+ * It does not support 1Hz calendar
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTCCLK_DIV (16)
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
+
+#else
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 2)
+/**
+ * It divides the RTC CLK by 2
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (3)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 4)
+/**
+ * It divides the RTC CLK by 4
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (2)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 8)
+/**
+ * It divides the RTC CLK by 8
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (1)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 16)
+/**
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#endif
+
+#define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
+#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
+
+#endif
+
+/** tick timer value in us */
+#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
+
+typedef enum
+{
+ CFG_TIM_PROC_ID_ISR,
+} CFG_TimProcID_t;
+
+/******************************************************************************
+ * Debug
+ ******************************************************************************/
+/**
+ * When set, this resets some hw resources to set the device in the same state than the power up
+ * The FW resets only register that may prevent the FW to run properly
+ *
+ * This shall be set to 0 in a final product
+ *
+ */
+#define CFG_HW_RESET_BY_FW 1
+
+/**
+ * keep debugger enabled while in any low power mode when set to 1
+ * should be set to 0 in production
+ */
+#define CFG_DEBUGGER_SUPPORTED 1
+
+#if (CFG_LPM_SUPPORTED == 1)
+#undef CFG_DEBUGGER_SUPPORTED
+#define CFG_DEBUGGER_SUPPORTED 0
+#endif
+
+/*****************************************************************************
+ * Traces
+ * Enable or Disable traces in application
+ * When CFG_DEBUG_TRACE is set, traces are activated
+ *
+ * Note : Refer to utilities_conf.h file in order to details
+ * the level of traces : CFG_DEBUG_TRACE_FULL or CFG_DEBUG_TRACE_LIGHT
+ *****************************************************************************/
+#define CFG_DEBUG_TRACE 1
+
+#if (CFG_LPM_SUPPORTED == 1)
+#undef CFG_DEBUG_TRACE
+#define CFG_DEBUG_TRACE 0
+#endif
+
+/**
+ * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
+ * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
+ *
+ * When both are set to 0, no trace are output
+ * When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
+ */
+#define CFG_DEBUG_TRACE_LIGHT 1
+#define CFG_DEBUG_TRACE_FULL 0
+
+#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL 0
+#define CFG_DEBUG_TRACE_LIGHT 1
+#endif
+
+#if ( CFG_DEBUG_TRACE == 0 )
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL 0
+#define CFG_DEBUG_TRACE_LIGHT 0
+#endif
+
+/**
+ * When not set, the traces is looping on sending the trace over UART
+ */
+#define DBG_TRACE_USE_CIRCULAR_QUEUE 1
+
+/**
+ * max buffer Size to queue data traces and max data trace allowed.
+ * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
+ */
+#define DBG_TRACE_MSG_QUEUE_SIZE 4096
+#define MAX_DBG_TRACE_MSG_SIZE 1024
+
+/******************************************************************************
+ * Configure Log level for Application
+ ******************************************************************************/
+#define APPLI_CONFIG_LOG_LEVEL LOG_LEVEL_INFO
+#define APPLI_PRINT_FILE_FUNC_LINE 0
+
+/* USER CODE BEGIN Defines */
+/******************************************************************************
+ * User interaction
+ * When CFG_LED_SUPPORTED is set, LEDS are activated if requested
+ * When CFG_BUTTON_SUPPORTED is set, the push button are activated if requested
+ ******************************************************************************/
+#if (CFG_LPM_SUPPORTED == 1)
+#define CFG_LED_SUPPORTED 0
+#define CFG_BUTTON_SUPPORTED 0
+#else
+#define CFG_LED_SUPPORTED 1
+#define CFG_BUTTON_SUPPORTED 1
+#endif
+
+
+/* USER CODE END Defines */
+
+/******************************************************************************
+ * Scheduler
+ ******************************************************************************/
+ /**
+ * This is the list of task id required by the application
+ * Each Id shall be in the range 0..31
+ */
+
+typedef enum
+{
+ CFG_TASK_CMD_FROM_M0_TO_M4,
+ CFG_TASK_SEND_CLI_TO_M0,
+ CFG_TASK_SEND_TO_M0,
+/* USER CODE BEGIN IdleTask */
+ CFG_TASK_TIMER,
+/* USER CODE END IdleTask */
+ CFG_TASK_SYSTEM_HCI_ASYNCH_EVT,
+ CFG_TASK_PROCESS_UART_RX_BUFFER,
+ CFG_TASK_PROCESS_UART_RX_IT,
+ CFG_TASK_PROCESS_UART_TX_IT,
+ CFG_TASK_NBR /**< Shall be last in the list */
+} CFG_IdleTask_Id_t;
+
+/**
+ * This is the list of priority required by the application
+ * Each Id shall be in the range 0..31
+ */
+typedef enum
+{
+ CFG_SCH_PRIO_0,
+ CFG_SCH_PRIO_1,
+ CFG_PRIO_NBR,
+} CFG_SCH_Prio_Id_t;
+
+/**
+ * This is a bit mapping over 32bits listing all events id supported in the application
+ */
+typedef enum
+{
+ CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP,
+ CFG_EVT_RECEIVE_RSPACKEVT,
+ CFG_EVT_RECEIVE_ENDPACKEVT,
+} CFG_IdleEvt_Id_t;
+
+/******************************************************************************
+ * LOW POWER
+ ******************************************************************************/
+/**
+ * Supported requester to the MCU Low Power Manager - can be increased up to 32
+ * It lits a bit mapping of all user of the Low Power Manager
+ */
+typedef enum
+{
+ CFG_LPM_APP,
+ CFG_LPM_APP_BLE_LLD,
+ /* USER CODE BEGIN CFG_LPM_Id_t */
+
+ /* USER CODE END CFG_LPM_Id_t */
+} CFG_LPM_Id_t;
+
+/******************************************************************************
+ * OTP manager
+ ******************************************************************************/
+#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
+
+#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
+
+#endif /*APP_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_entry.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_entry.h
new file mode 100644
index 000000000..77ead2384
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_entry.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file app_entry.h
+ * @author MCD Application Team
+ * @brief Interface to the application
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_ENTRY_H
+#define APP_ENTRY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+ /* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/* Exported macros ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions ---------------------------------------------*/
+ void APPE_Init( void );
+/* USER CODE BEGIN EF */
+
+/* USER CODE END EF */
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_ENTRY_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/gpio_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/gpio_lld.h
new file mode 100644
index 000000000..e9ceb78c0
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/gpio_lld.h
@@ -0,0 +1,179 @@
+/*
+ * gpio_lld.h
+ *
+ */
+
+#ifndef GPIO_LLD_H_
+#define GPIO_LLD_H_
+
+#define GPIO_HARD_FAULT_PIN GPIO_PIN_4
+#define GPIO_HARD_FAULT_PORT GPIOA
+
+// External PA TX/RX pin is fixed by the chip
+#define GPIO_EXT_PA_TX_PIN GPIO_PIN_0
+#define GPIO_EXT_PA_TX_PORT GPIOB
+// External PA enable pin is chosen by user
+#define GPIO_EXT_PA_EN_PIN GPIO_PIN_9
+#define GPIO_EXT_PA_EN_PORT GPIOB
+
+void gpio_lld_phy_init( void );
+void gpio_lld_phy_gpioTx_up(void);
+void gpio_lld_phy_gpioTx_down(void);
+void gpio_lld_phy_gpioHardFault_up(void);
+void gpio_lld_phy_gpioHardFault_down(void);
+void gpio_lld_phy_gpio1_up(void);
+void gpio_lld_phy_gpio1_down(void);
+void gpio_lld_phy_gpio2_up(void);
+void gpio_lld_phy_gpio2_down(void);
+void gpio_lld_phy_deInit(void);
+
+void gpio_lld_mco_init(uint32_t mcoSource, uint32_t mcoDiv);
+void gpio_lld_mco_deInit(void);
+
+void gpio_lld_extPa_init(void);
+void gpio_lld_extPa_deInit(void);
+
+#ifdef USE_SIMU
+void gpio_lld_SimuMaster_init(void);
+void gpio_lld_SimuSlave_init(void);
+#endif
+
+void gpio_lld_lpuart_init(void);
+void gpio_lld_lpuart_deInit(void);
+
+void gpio_lld_usart_init(void);
+void gpio_lld_usart_deInit(void);
+
+#if !defined (USE_SIMU) && !defined(USE_FPGA)
+void gpio_lld_pa2_init(uint8_t mode);
+void gpio_lld_pa2_deInit(void);
+
+void gpio_lld_dtb_init(uint8_t dtbMode);
+void gpio_lld_dtb_deInit(void);
+#endif
+
+void gpio_lld_led1_toggle(void);
+void gpio_lld_led2_toggle(void);
+void gpio_lld_led3_toggle(void);
+
+#ifdef STM32WB15xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOA
+#define USART_TX_PIN GPIO_PIN_9
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOA
+#define USART_RX_PIN GPIO_PIN_10
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOA
+#define LPUART_TX_PIN GPIO_PIN_2
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOA
+#define LPUART_RX_PIN GPIO_PIN_3
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+#endif
+
+#ifdef STM32WB35xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOB
+#define USART_TX_PIN GPIO_PIN_6
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOB
+#define USART_RX_PIN GPIO_PIN_7
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOB
+#define LPUART_TX_PIN GPIO_PIN_5
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOA
+#define LPUART_RX_PIN GPIO_PIN_3
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+#endif
+
+#ifdef STM32WB55xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI1_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOB
+#define USART_TX_PIN GPIO_PIN_6
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOB
+#define USART_RX_PIN GPIO_PIN_7
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOC
+#define LPUART_TX_PIN GPIO_PIN_1
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOC
+#define LPUART_RX_PIN GPIO_PIN_0
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+#endif
+
+#endif /* GPIO_LLD_H_ */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_conf.h
new file mode 100644
index 000000000..cec656da9
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_conf.h
@@ -0,0 +1,186 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : hw_conf.h
+ * Description : Hardware configuration file for the application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_CONF_H
+#define HW_CONF_H
+
+/******************************************************************************
+ * Semaphores
+ * THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
+ *****************************************************************************/
+/**
+* The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
+* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+* + CPU1 takes CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+* + CPU1 releases CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+* CFG_HW_THREAD_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+* There is no timing constraint on how long this semaphore can be kept.
+*/
+#define CFG_HW_THREAD_NVM_SRAM_SEMID 9
+
+/**
+* The CPU2 may be configured to store the BLE persistent data either in internal NVM storage on CPU2 or in
+* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+* + CPU1 takes CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+* + CPU1 releases CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+* CFG_HW_BLE_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+* There is no timing constraint on how long this semaphore can be kept.
+*/
+#define CFG_HW_BLE_NVM_SRAM_SEMID 8
+
+/**
+* Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash
+* The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2
+* When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just
+* after writing a raw (64bits data) or erasing one sector.
+* On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit.
+* By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore
+* instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 7
+
+/**
+* Index of the semaphore used by CPU1 to prevent the CPU2 to either write or erase data in flash
+* In order to protect its timing, the CPU1 may get this semaphore to prevent the CPU2 to either
+* write or erase in flash (as this will stall both CPUs)
+* The PES bit shall not be used as this may stall the CPU2 in some cases.
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 6
+
+/**
+* Index of the semaphore used to manage the CLK48 clock configuration
+* When the USB is required, this semaphore shall be taken before configuring te CLK48 for USB
+* and should be released after the application switch OFF the clock when the USB is not used anymore
+* When using the RNG, it is good enough to use CFG_HW_RNG_SEMID to control CLK48.
+* More details in AN5289
+*/
+#define CFG_HW_CLK48_CONFIG_SEMID 5
+
+/* Index of the semaphore used to manage the entry Stop Mode procedure */
+#define CFG_HW_ENTRY_STOP_MODE_SEMID 4
+
+/* Index of the semaphore used to access the RCC */
+#define CFG_HW_RCC_SEMID 3
+
+/* Index of the semaphore used to access the FLASH */
+#define CFG_HW_FLASH_SEMID 2
+
+/* Index of the semaphore used to access the PKA */
+#define CFG_HW_PKA_SEMID 1
+
+/* Index of the semaphore used to access the RNG */
+#define CFG_HW_RNG_SEMID 0
+
+/******************************************************************************
+ * HW TIMER SERVER
+ *****************************************************************************/
+/**
+ * The user may define the maximum number of virtual timers supported.
+ * It shall not exceed 255
+ */
+#define CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER 6
+
+/**
+ * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
+ * wakeup timer.
+ * This setting is the preemptpriority part of the NVIC.
+ */
+#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO 3
+
+/**
+ * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
+ * wakeup timer.
+ * This setting is the subpriority part of the NVIC. It does not exist on all processors. When it is not supported
+ * on the CPU, the setting is ignored
+ */
+#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO 0
+
+/**
+ * Define a critical section in the Timer server
+ * The Timer server does not support the API to be nested
+ * The Application shall either:
+ * a) Ensure this will never happen
+ * b) Define the critical section
+ * The default implementations is masking all interrupts using the PRIMASK bit
+ * The TimerServer driver uses critical sections to avoid context corruption. This is achieved with the macro
+ * TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION. When CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION is set
+ * to 1, all STM32 interrupts are masked with the PRIMASK bit of the CortexM CPU. It is possible to use the BASEPRI
+ * register of the CortexM CPU to keep allowed some interrupts with high priority. In that case, the user shall
+ * re-implement TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION and shall make sure that no TimerServer
+ * API are called when the TIMER critical section is entered
+ */
+#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION 1
+
+/**
+ * This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt
+ * is generated by the Hardware and the time when the RTC interrupt handler is called. This time is measured in
+ * number of RTCCLK ticks.
+ * A relaxed timing would be 10ms
+ * When the value is too short, the timerserver will not be able to count properly and all timeout may be random.
+ * When the value is too long, the device may wake up more often than the most optimal configuration. However, the
+ * impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly
+ * recommended to select a value large enough to make sure it is not too short to ensure reliability of the system
+ * as this will have marginal impact on low power mode
+ */
+#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY ( 10 * (LSI_VALUE/1000) )
+
+ /**
+ * Interrupt ID in the NVIC of the RTC Wakeup interrupt handler
+ * It shall be type of IRQn_Type
+ */
+#define CFG_HW_TS_RTC_WAKEUP_HANDLER_ID RTC_WKUP_IRQn
+
+
+
+/******************************************************************************
+ * HW UART
+ *****************************************************************************/
+#if (CFG_LPM_SUPPORTED == 0)
+#define CFG_HW_LPUART1_ENABLED 1
+#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 1
+#define CFG_HW_USART1_ENABLED 1
+#define CFG_HW_USART1_DMA_TX_SUPPORTED 1
+
+#else
+#define CFG_HW_LPUART1_ENABLED 0
+#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 0
+#define CFG_HW_USART1_ENABLED 0
+#define CFG_HW_USART1_DMA_TX_SUPPORTED 0
+#endif
+/******************************************************************************
+ * External PA
+ *****************************************************************************/
+
+#if (CFG_LPM_SUPPORTED == 0)
+#define CFG_HW_EXTPA_ENABLED 1
+#else
+#define CFG_HW_EXTPA_ENABLED 0
+#endif
+
+#endif /*HW_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_if.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_if.h
new file mode 100644
index 000000000..3fd93b322
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_if.h
@@ -0,0 +1,287 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file hw_if.h
+ * @author MCD Application Team
+ * @brief Hardware Interface
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_IF_H
+#define HW_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx.h"
+#include "stm32wbxx_ll_exti.h"
+#include "stm32wbxx_ll_system.h"
+#include "stm32wbxx_ll_rcc.h"
+#include "stm32wbxx_ll_ipcc.h"
+#include "stm32wbxx_ll_bus.h"
+#include "stm32wbxx_ll_pwr.h"
+#include "stm32wbxx_ll_cortex.h"
+#include "stm32wbxx_ll_utils.h"
+#include "stm32wbxx_ll_hsem.h"
+#include "stm32wbxx_ll_gpio.h"
+#include "stm32wbxx_ll_rtc.h"
+
+#ifdef USE_STM32WBXX_USB_DONGLE
+#include "stm32wbxx_usb_dongle.h"
+#endif
+
+#ifdef USE_STM32WBXX_NUCLEO
+
+#ifdef STM32WB15xx
+#include "nucleo_wb15cc.h"
+#endif
+
+#ifdef STM32WB35xx
+#include "nucleo_wb35ce.h"
+#endif
+
+#ifdef STM32WB55xx
+#include "stm32wbxx_nucleo.h"
+#endif
+
+#endif
+
+#ifdef USE_X_NUCLEO_EPD
+#include "x_nucleo_epd.h"
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/******************************************************************************
+ * HW UART
+ ******************************************************************************/
+typedef enum
+{
+ hw_uart1,
+ hw_uart2,
+ hw_lpuart1,
+} hw_uart_id_t;
+
+typedef enum
+{
+ hw_uart_ok,
+ hw_uart_error,
+ hw_uart_busy,
+ hw_uart_to,
+} hw_status_t;
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+extern UART_HandleTypeDef hlpuart1;
+extern DMA_HandleTypeDef hdma_lpuart1_tx;
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+extern UART_HandleTypeDef huart1;
+extern DMA_HandleTypeDef hdma_usart1_tx;
+#endif
+
+//void HW_UART_Init(hw_uart_id_t hw_uart_id);
+hw_status_t HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
+hw_status_t HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
+hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, uint32_t timeout);
+hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*Callback)(void));
+#if 0
+void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+void MX_LPUART1_UART_Init(void);
+void MX_LPUART1_UART_DeInit(void);
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+void MX_USART1_UART_Init(void);
+void MX_USART1_UART_DeInit(void);
+#endif
+
+ /******************************************************************************
+ * HW TimerServer
+ ******************************************************************************/
+ /* Exported types ------------------------------------------------------------*/
+ /**
+ * This setting is used when standby mode is supported.
+ * hw_ts_InitMode_Limited should be used when the device restarts from Standby Mode. In that case, the Timer Server does
+ * not re-initialized its context. Only the Hardware register which content has been lost is reconfigured
+ * Otherwise, hw_ts_InitMode_Full should be requested (Start from Power ON) and everything is re-initialized.
+ */
+ typedef enum
+ {
+ hw_ts_InitMode_Full,
+ hw_ts_InitMode_Limited,
+ } HW_TS_InitMode_t;
+
+ /**
+ * When a Timer is created as a SingleShot timer, it is not automatically restarted when the timeout occurs. However,
+ * the timer is kept reserved in the list and could be restarted at anytime with HW_TS_Start()
+ *
+ * When a Timer is created as a Repeated timer, it is automatically restarted when the timeout occurs.
+ */
+ typedef enum
+ {
+ hw_ts_SingleShot,
+ hw_ts_Repeated
+ } HW_TS_Mode_t;
+
+ /**
+ * hw_ts_Successful is returned when a Timer has been successfully created with HW_TS_Create(). Otherwise, hw_ts_Failed
+ * is returned. When hw_ts_Failed is returned, that means there are not enough free slots in the list to create a
+ * Timer. In that case, CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER should be increased
+ */
+ typedef enum
+ {
+ hw_ts_Successful,
+ hw_ts_Failed,
+ }HW_TS_ReturnStatus_t;
+
+ typedef void (*HW_TS_pTimerCb_t)(void);
+
+ /**
+ * @brief Initialize the timer server
+ * This API shall be called by the application before any timer is requested to the timer server. It
+ * configures the RTC module to be connected to the LSI input clock.
+ *
+ * @param TimerInitMode: When the device restarts from Standby, it should request hw_ts_InitMode_Limited so that the
+ * Timer context is not re-initialized. Otherwise, hw_ts_InitMode_Full should be requested
+ * @param hrtc: RTC Handle
+ * @retval None
+ */
+ void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc);
+
+ /**
+ * @brief Interface to create a virtual timer
+ * The user shall call this API to create a timer. Once created, the timer is reserved to the module until it
+ * has been deleted. When creating a timer, the user shall specify the mode (single shot or repeated), the
+ * callback to be notified when the timer expires and a module ID to identify in the timer interrupt handler
+ * which module is concerned. In return, the user gets a timer ID to handle it.
+ *
+ * @param TimerProcessID: This is an identifier provided by the user and returned in the callback to allow
+ * identification of the requester
+ * @param pTimerId: Timer Id returned to the user to request operation (start, stop, delete)
+ * @param TimerMode: Mode of the virtual timer (Single shot or repeated)
+ * @param pTimerCallBack: Callback when the virtual timer expires
+ * @retval HW_TS_ReturnStatus_t: Return whether the creation is sucessfull or not
+ */
+ HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pTimerCallBack);
+
+ /**
+ * @brief Stop a virtual timer
+ * This API may be used to stop a running timer. A timer which is stopped is move to the pending state.
+ * A pending timer may be restarted at any time with a different timeout value but the mode cannot be changed.
+ * Nothing is done when it is called to stop a timer which has been already stopped
+ *
+ * @param TimerID: Id of the timer to stop
+ * @retval None
+ */
+ void HW_TS_Stop(uint8_t TimerID);
+
+ /**
+ * @brief Start a virtual timer
+ * This API shall be used to start a timer. The timeout value is specified and may be different each time.
+ * When the timer is in the single shot mode, it will move to the pending state when it expires. The user may
+ * restart it at any time with a different timeout value. When the timer is in the repeated mode, it always
+ * stay in the running state. When the timer expires, it will be restarted with the same timeout value.
+ * This API shall not be called on a running timer.
+ *
+ * @param TimerID: The ID Id of the timer to start
+ * @param timeout_ticks: Number of ticks of the virtual timer (Maximum value is (0xFFFFFFFF-0xFFFF = 0xFFFF0000)
+ * @retval None
+ */
+ void HW_TS_Start(uint8_t TimerID, uint32_t timeout_ticks);
+
+ /**
+ * @brief Delete a virtual timer from the list
+ * This API should be used when a timer is not needed anymore by the user. A deleted timer is removed from
+ * the timer list managed by the timer server. It cannot be restarted again. The user has to go with the
+ * creation of a new timer if required and may get a different timer id
+ *
+ * @param TimerID: The ID of the timer to remove from the list
+ * @retval None
+ */
+ void HW_TS_Delete(uint8_t TimerID);
+
+ /**
+ * @brief Schedule the timer list on the timer interrupt handler
+ * This interrupt handler shall be called by the application in the RTC interrupt handler. This handler takes
+ * care of clearing all status flag required in the RTC and EXTI peripherals
+ *
+ * @param None
+ * @retval None
+ */
+ void HW_TS_RTC_Wakeup_Handler(void);
+
+ /**
+ * @brief Return the number of ticks to count before the interrupt
+ * This API returns the number of ticks left to be counted before an interrupt is generated by the
+ * Timer Server. This API may be used by the application for power management optimization. When the system
+ * enters low power mode, the mode selection is a tradeoff between the wakeup time where the CPU is running
+ * and the time while the CPU will be kept in low power mode before next wakeup. The deeper is the
+ * low power mode used, the longer is the wakeup time. The low power mode management considering wakeup time
+ * versus time in low power mode is implementation specific
+ * When the timer is disabled (No timer in the list), it returns 0xFFFF
+ *
+ * @param None
+ * @retval The number of ticks left to count
+ */
+ uint16_t HW_TS_RTC_ReadLeftTicksToCount(void);
+
+ /**
+ * @brief Notify the application that a registered timer has expired
+ * This API shall be implemented by the user application.
+ * This API notifies the application that a timer expires. This API is running in the RTC Wakeup interrupt
+ * context. The application may implement an Operating System to change the context priority where the timer
+ * callback may be handled. This API provides the module ID to identify which module is concerned and to allow
+ * sending the information to the correct task
+ *
+ * @param TimerProcessID: The TimerProcessId associated with the timer when it has been created
+ * @param TimerID: The TimerID of the expired timer
+ * @param pTimerCallBack: The Callback associated with the timer when it has been created
+ * @retval None
+ */
+ void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack);
+
+ /**
+ * @brief Notify the application that the wakeupcounter has been updated
+ * This API should be implemented by the user application
+ * This API notifies the application that the counter has been updated. This is expected to be used along
+ * with the HW_TS_RTC_ReadLeftTicksToCount () API. It could be that the counter has been updated since the
+ * last call of HW_TS_RTC_ReadLeftTicksToCount () and before entering low power mode. This notification
+ * provides a way to the application to solve that race condition to reevaluate the counter value before
+ * entering low power mode
+ *
+ * @param None
+ * @retval None
+ */
+ void HW_TS_RTC_CountUpdated_AppNot(void);
+
+void MX_UART_Init(hw_uart_id_t uart);
+void MX_UART_Deinit(hw_uart_id_t uart);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*HW_IF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/main.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/main.h
new file mode 100644
index 000000000..0c024028b
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/main.h
@@ -0,0 +1,107 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+void SystemClock_Config_HSE(uint32_t usePLL);
+void SystemClock_Config_MSI(uint32_t usePLL);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+/* USER CODE BEGIN Private defines */
+
+
+/*
+ In this example TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1),
+ since APB1 prescaler is equal to 1.
+ TIM2CLK = PCLK1
+ PCLK1 = HCLK
+ => TIM2CLK = HCLK = SystemCoreClock
+ To get TIM2 counter clock at 10 KHz, the Prescaler is computed as following:
+ Prescaler = (TIM2CLK / TIM2 counter clock) - 1
+ Prescaler = (SystemCoreClock /10 KHz) - 1
+
+ Note:
+ SystemCoreClock variable holds HCLK frequency and is defined in system_stm32wbxx.c file.
+ Each time the core clock (HCLK) changes, user had to update SystemCoreClock
+ variable value. Otherwise, any configuration based on this variable will be incorrect.
+ This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ ----------------------------------------------------------------------- */
+
+/* Compute the prescaler value to have TIMx counter clock equal to 10000 Hz */
+
+#define PRESCALER_VALUE (uint32_t)(((SystemCoreClock) / (1000000)) - 1)
+
+ /* Initialize TIMx peripheral as follows:
+ + Period = 10000 - 1
+ + Prescaler = (SystemCoreClock/10000) - 1
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+
+#define PERIOD_VALUE (1000000 - 1);
+
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/nucleo_wb15cc_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/nucleo_wb15cc_conf.h
new file mode 100644
index 000000000..45c29d955
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/nucleo_wb15cc_conf.h
@@ -0,0 +1,77 @@
+/**
+ ******************************************************************************
+ * @file nucleo_wb15cc_conf.h
+ * @author MCD Application Team
+ * @brief NUCLEO-WB15CC board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef NUCLEO_WB15CC_CONF_H
+#define NUCLEO_WB15CC_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx_hal.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup NUCLEO_WB15CC
+ * @{
+ */
+
+/** @defgroup NUCLEO_WB15CC_CONFIG CONFIG
+ * @{
+ */
+
+/** @defgroup NUCLEO_WB15CC_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+/* COM usage define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM log define */
+#define USE_COM_LOG 0U
+
+/* IRQ priorities */
+#define BSP_BUTTON_SWx_IT_PRIORITY 15U
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NUCLEO_WB15CC_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32_lpm_if.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32_lpm_if.h
new file mode 100644
index 000000000..dac7e2cbb
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32_lpm_if.h
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file stm32_lpm_if.h
+ * @brief Header for stm32_lpm_if.c module (device specific LP management)
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32_LPM_IF_H
+#define __STM32_LPM_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/**
+ * @brief Enters Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_EnterOffMode( void );
+/**
+ * @brief Exits Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_ExitOffMode( void );
+
+/**
+ * @brief Enters Low Power Stop Mode
+ * @note ARM exists the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterStopMode( void );
+/**
+ * @brief Exits Low Power Stop Mode
+ * @note Enable the pll at 32MHz
+ * @param none
+ * @retval none
+ */
+void PWR_ExitStopMode( void );
+
+/**
+ * @brief Enters Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterSleepMode( void );
+
+/**
+ * @brief Exits Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_ExitSleepMode( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__STM32_LPM_IF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_hal_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_hal_conf.h
new file mode 100644
index 000000000..365809937
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_hal_conf.h
@@ -0,0 +1,353 @@
+/**
+ ******************************************************************************
+ * @file stm32wbxx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32WBxx_HAL_CONF_H
+#define STM32WBxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+#define HAL_CORTEX_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+/*#define HAL_I2C_MODULE_ENABLED */
+/*#define HAL_IPCC_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_PKA_MODULE_ENABLED */
+#define HAL_PWR_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED */
+#define HAL_RCC_MODULE_ENABLED
+/*#define HAL_RNG_MODULE_ENABLED */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_TSC_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
+#define USE_HAL_PKA_REGISTER_CALLBACKS 0u
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0u
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0u
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0u
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0u
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0u
+#define USE_HAL_TSC_REGISTER_CALLBACKS 0u
+#define USE_HAL_UART_REGISTER_CALLBACKS 0u
+#define USE_HAL_USART_REGISTER_CALLBACKS 0u
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (32000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI1) value.
+ */
+#if !defined (LSI1_VALUE)
+ #define LSI1_VALUE (32000UL) /*!< LSI1 Typical Value in Hz*/
+#endif /* LSI1_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+/**
+ * @brief Internal Low Speed oscillator (LSI2) value.
+ */
+#if !defined (LSI2_VALUE)
+ #define LSI2_VALUE (32000UL) /*!< LSI2 Typical Value in Hz*/
+#endif /* LSI2_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+ * @brief Internal Multiple Speed oscillator (HSI48) default value.
+ * This value is the default HSI48 range value after Reset.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI48_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for SAI1 peripheral
+ * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+ * frequency.
+ */
+#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
+ #define EXTERNAL_SAI1_CLOCK_VALUE (48000UL) /*!< Value of the SAI1 External clock source in Hz*/
+#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((1UL<<__NVIC_PRIO_BITS) - 1UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0
+#define PREFETCH_ENABLE 0
+#define INSTRUCTION_CACHE_ENABLE 1
+#define DATA_CACHE_ENABLE 1
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1 */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32wbxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32wbxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32wbxx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32wbxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32wbxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32wbxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32wbxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32wbxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32wbxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+ #include "stm32wbxx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32wbxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IPCC_MODULE_ENABLED
+ #include "stm32wbxx_hal_ipcc.h"
+#endif /* HAL_IPCC_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32wbxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32wbxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32wbxx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32wbxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32wbxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+ #include "stm32wbxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32wbxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32wbxx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32wbxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32wbxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32wbxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32wbxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32wbxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32wbxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32wbxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32wbxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+ #include "stm32wbxx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32wbxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32wbxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32wbxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32WBxx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_it.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_it.h
new file mode 100644
index 000000000..fd3ff7829
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_it.h
@@ -0,0 +1,83 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32wbxx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ *******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32WBxx_IT_H
+#define __STM32WBxx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "app_common.h"
+#include "gpio_lld.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel4_IRQHandler(void);
+void DMA1_Channel5_IRQHandler(void);
+void USART1_IRQHandler(void);
+void LPUART1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void RTC_WKUP_IRQHandler(void);
+
+void IPCC_C1_TX_IRQHandler(void);
+void IPCC_C1_RX_IRQHandler(void);
+
+void BUTTON_SW1_EXTI_IRQHandler(void);
+void BUTTON_SW2_EXTI_IRQHandler(void);
+void BUTTON_SW3_EXTI_IRQHandler(void);
+void TIM2_IRQHandler(void);
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32WBxx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm_logging.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm_logging.h
new file mode 100644
index 000000000..119d6e7a0
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm_logging.h
@@ -0,0 +1,63 @@
+/**
+ ******************************************************************************
+ * File Name : stm_logging.h
+ * Description : Application header file for logging
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+#ifndef STM_LOGGING_H_
+#define STM_LOGGING_H_
+
+#define LOG_LEVEL_NONE 0 /* None */
+#define LOG_LEVEL_CRIT 1U /* Critical */
+#define LOG_LEVEL_WARN 2U /* Warning */
+#define LOG_LEVEL_INFO 3U /* Info */
+#define LOG_LEVEL_DEBG 4U /* Debug */
+
+#define APP_DBG_FULL(level, region, ...) \
+ { \
+ if (APPLI_PRINT_FILE_FUNC_LINE == 1U) \
+ { \
+ printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__); \
+ } \
+ logApplication(level, region, __VA_ARGS__); \
+ }
+
+#define APP_DBG(...) \
+ { \
+ if (APPLI_PRINT_FILE_FUNC_LINE == 1U) \
+ { \
+ printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__); \
+ } \
+ logApplication(LOG_LEVEL_NONE, APPLI_LOG_REGION_GENERAL, __VA_ARGS__); \
+ }
+
+/**
+ * This enumeration represents log regions.
+ *
+ */
+typedef enum
+{
+ APPLI_LOG_REGION_GENERAL = 1U, /* General */
+ APPLI_LOG_REGION_OPENTHREAD_API = 2U, /* OpenThread API */
+ APPLI_LOG_REGION_OT_API_LINK = 3U, /* OpenThread Link API */
+ APPLI_LOG_REGION_OT_API_INSTANCE = 4U, /* OpenThread Instance API */
+ APPLI_LOG_REGION_OT_API_MESSAGE = 5U /* OpenThread Message API */
+} appliLogRegion_t;
+
+typedef uint8_t appliLogLevel_t;
+
+void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...);
+
+#endif /* STM_LOGGING_H_ */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/utilities_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/utilities_conf.h
new file mode 100644
index 000000000..4dde3509a
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Inc/utilities_conf.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : utilities_conf.h
+ * Description : Configuration file for STM32 Utilities.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef UTILITIES_CONF_H
+#define UTILITIES_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "cmsis_compiler.h"
+#include "string.h"
+
+/******************************************************************************
+ * common
+ ******************************************************************************/
+#define UTILS_ENTER_CRITICAL_SECTION( ) uint32_t primask_bit = __get_PRIMASK( );\
+ __disable_irq( )
+
+#define UTILS_EXIT_CRITICAL_SECTION( ) __set_PRIMASK( primask_bit )
+
+#define UTILS_MEMSET8( dest, value, size ) memset( dest, value, size);
+
+/******************************************************************************
+ * tiny low power manager
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_LPM_INIT_CRITICAL_SECTION( )
+#define UTIL_LPM_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_LPM_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
+
+/******************************************************************************
+ * sequencer
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_SEQ_INIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_SEQ_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_CONF_TASK_NBR (32)
+#define UTIL_SEQ_CONF_PRIO_NBR (2)
+#define UTIL_SEQ_MEMSET8( dest, value, size ) UTILS_MEMSET8( dest, value, size )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*UTILITIES_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/app_entry.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/app_entry.c
new file mode 100644
index 000000000..a377e0f8a
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/app_entry.c
@@ -0,0 +1,421 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file app_entry.c
+ * @author MCD Application Team
+ * @brief Entry point of the Application
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "app_entry.h"
+#include "app_ble_lld.h"
+#include "app_conf.h"
+#include "hw_conf.h"
+#include "stm32_seq.h"
+#include "stm_logging.h"
+#include "shci_tl.h"
+#include "stm32_lpm.h"
+#include "dbg_trace.h"
+#include "shci.h"
+#include "lowpower_app.h"
+
+/* Private includes -----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+extern RTC_HandleTypeDef hrtc;
+
+/* USER CODE END PTD */
+
+/* Private defines -----------------------------------------------------------*/
+/* POOL_SIZE = 2(TL_PacketHeader_t) + 258 (3(TL_EVT_HDR_SIZE) + 255(Payload size)) */
+#define POOL_SIZE (CFG_TL_EVT_QUEUE_LENGTH * 4U * DIVC(( sizeof(TL_PacketHeader_t) + TL_EVENT_FRAME_SIZE ), 4U))
+
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macros ------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t EvtPool[POOL_SIZE];
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t SystemCmdBuffer;
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t SystemSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255U];
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Global function prototypes -----------------------------------------------*/
+#if(CFG_DEBUG_TRACE != 0)
+size_t DbgTraceWrite(int handle, const unsigned char * buf, size_t bufSize);
+#endif
+
+/* USER CODE BEGIN GFP */
+
+/* USER CODE END GFP */
+
+/* Private functions prototypes-----------------------------------------------*/
+static void SystemPower_Config( void );
+static void Init_Debug( void );
+static void appe_Tl_Init( void );
+static void APPE_SysStatusNot( SHCI_TL_CmdStatus_t status );
+static void APPE_SysUserEvtRx( void * pPayload );
+static void APPE_SysEvtReadyProcessing( void );
+static void APPE_SysEvtError( SCHI_SystemErrCode_t ErrorCode);
+
+/* USER CODE BEGIN PFP */
+static void Led_Init( void );
+static void Button_Init( void );
+/* USER CODE END PFP */
+
+/* Functions Definition ------------------------------------------------------*/
+void APPE_Init( void )
+{
+ /**< Configure the system Power Mode */
+ SystemPower_Config();
+
+ HW_TS_Init(hw_ts_InitMode_Full, &hrtc); /**< Initialize the TimerServer */
+
+/* USER CODE BEGIN APPE_Init_1 */
+ /* initialize debugger module if supported and debug trace if activated */
+ Init_Debug();
+
+ Led_Init();
+ Button_Init();
+
+/* USER CODE END APPE_Init_1 */
+ /* Initialize all transport layers and start CPU2 which will send back a ready event to CPU1 */
+ appe_Tl_Init();
+
+ /**
+ * From now, the application is waiting for the ready event ( sub event : SHCI_SUB_EVT_CODE_READY / payload : WIRELESS_FW_RUNNING)
+ * received on the system channel before starting the LLD test appli using system message SHCI_OPCODE_C2_LLD_TESTS_INIT
+ * This system event is received with APPE_SysUserEvtRx()
+ */
+/* USER CODE BEGIN APPE_Init_2 */
+
+/* USER CODE END APPE_Init_2 */
+ return;
+}
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+static void Init_Debug( void )
+{
+#if (CFG_DEBUGGER_SUPPORTED == 1)
+ /**
+ * Keep debugger enabled while in any low power mode
+ */
+ HAL_DBGMCU_EnableDBGSleepMode();
+
+ /* Enable debugger EXTI lines */
+ LL_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+ LL_C2_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+
+#else
+ /* Disable debugger EXTI lines */
+ LL_EXTI_DisableIT_32_63(LL_EXTI_LINE_48);
+ LL_C2_EXTI_DisableIT_32_63(LL_EXTI_LINE_48);
+
+ /**
+ * Do not keep debugger enabled while in any low power mode
+ */
+ HAL_DBGMCU_DisableDBGSleepMode();
+ HAL_DBGMCU_DisableDBGStopMode();
+ HAL_DBGMCU_DisableDBGStandbyMode();
+#endif /* (CFG_DEBUGGER_SUPPORTED == 1) */
+
+#if(CFG_DEBUG_TRACE != 0)
+ DbgTraceInit();
+#endif
+
+ /* Send a first trace to debug trace port to see that M4 is alive */
+ APP_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ APP_DBG("traces init done on M4");
+ APP_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+ return;
+}
+
+/**
+ * @brief Configure the system for power optimization
+ *
+ * @note This API configures the system to be ready for low power mode
+ *
+ * @param None
+ * @retval None
+ */
+static void SystemPower_Config( void )
+{
+ // Disable internal wake-up which is active by default and is for RTC wake-up
+ LL_PWR_DisableInternWU();
+
+ // Before going to stop or standby modes, do the settings so that system clock and IP80215.4 clock
+ // start on HSI automatically
+ LL_RCC_HSI_EnableAutoFromStop();
+
+ /**
+ * Select HSI as system clock source after Wake Up from Stop mode
+ */
+ LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+ /* Initialize low power manager */
+ UTIL_LPM_Init( );
+
+ /* Disable low power mode until INIT is complete */
+ UTIL_LPM_SetOffMode(1 << CFG_LPM_APP, UTIL_LPM_DISABLE);
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP, UTIL_LPM_DISABLE);
+
+ return;
+}
+
+static void appe_Tl_Init( void )
+{
+ TL_MM_Config_t tl_mm_config;
+ SHCI_TL_HciInitConf_t SHci_Tl_Init_Conf;
+
+ /**< Reference table initialization */
+ TL_Init();
+
+ /**< System channel initialization */
+ UTIL_SEQ_RegTask( 1<< CFG_TASK_SYSTEM_HCI_ASYNCH_EVT, UTIL_SEQ_RFU, shci_user_evt_proc );
+ SHci_Tl_Init_Conf.p_cmdbuffer = (uint8_t*)&SystemCmdBuffer;
+ SHci_Tl_Init_Conf.StatusNotCallBack = APPE_SysStatusNot;
+ shci_init(APPE_SysUserEvtRx, (void*) &SHci_Tl_Init_Conf);
+
+ /**< Memory Manager channel initialization */
+ tl_mm_config.p_BleSpareEvtBuffer = 0;
+ tl_mm_config.p_SystemSpareEvtBuffer = SystemSpareEvtBuffer;
+ tl_mm_config.p_AsynchEvtPool = EvtPool;
+ tl_mm_config.AsynchEvtPoolSize = POOL_SIZE;
+ TL_MM_Init( &tl_mm_config );
+
+ /* Enable transport layer and start CPU2 */
+ TL_Enable();
+
+ return;
+}
+
+static void APPE_SysStatusNot( SHCI_TL_CmdStatus_t status )
+{
+ UNUSED(status);
+ return;
+}
+
+/**
+ * The type of the payload for a system user event is tSHCI_UserEvtRxParam
+ * When the system event is both :
+ * - a ready event (subevtcode = SHCI_SUB_EVT_CODE_READY)
+ * - reported by the FUS (sysevt_ready_rsp == FUS_FW_RUNNING)
+ * The buffer shall not be released
+ * ( eg ((tSHCI_UserEvtRxParam*)pPayload)->status shall be set to SHCI_TL_UserEventFlow_Disable )
+ * When the status is not filled, the buffer is released by default
+ */
+static void APPE_SysUserEvtRx( void * pPayload )
+{
+ TL_AsynchEvt_t *p_sys_event;
+ p_sys_event = (TL_AsynchEvt_t*)(((tSHCI_UserEvtRxParam*)pPayload)->pckt->evtserial.evt.payload);
+
+ switch(p_sys_event->subevtcode)
+ {
+ case SHCI_SUB_EVT_CODE_READY:
+ if (p_sys_event->payload[0] == WIRELESS_FW_RUNNING)
+ APPE_SysEvtReadyProcessing();
+ break;
+
+ case SHCI_SUB_EVT_ERROR_NOTIF:
+ APPE_SysEvtError((SCHI_SystemErrCode_t) (p_sys_event->payload[0]));
+ break;
+
+ default:
+ break;
+ }
+ return;
+}
+
+/**
+ * @brief Notify a system error coming from the M0 firmware
+ * @param ErrorCode : errorCode detected by the M0 firmware
+ *
+ * @retval None
+ */
+static void APPE_SysEvtError( SCHI_SystemErrCode_t ErrorCode)
+{
+ switch(ErrorCode)
+ {
+ case ERR_THREAD_LLD_FATAL_ERROR:
+ APP_DBG("** ERR_LLD_TESTS : LLD_FATAL_ERROR \n");
+ break;
+
+ case ERR_THREAD_UNKNOWN_CMD:
+ APP_DBG("** ERR_LLD_TESTS : UNKNOWN_CMD \n");
+ break;
+
+ default:
+ APP_DBG("** ERR_LLD_TESTS : ErroCode=%d \n",ErrorCode);
+ break;
+ }
+ return;
+}
+
+static void APPE_SysEvtReadyProcessing( void )
+{
+ /* Traces channel initialization */
+ TL_TRACES_Init( );
+
+ /* Application specific init */
+ LOWPOWER_APP_Init();
+
+#if ( CFG_LPM_SUPPORTED == 1)
+ /* Thread stack is initialized, low power mode can be enabled */
+ UTIL_LPM_SetOffMode(1U << CFG_LPM_APP, UTIL_LPM_ENABLE);
+ UTIL_LPM_SetStopMode(1U << CFG_LPM_APP, UTIL_LPM_ENABLE);
+#endif
+
+ return;
+}
+
+/* USER CODE BEGIN FD_LOCAL_FUNCTIONS */
+static void Led_Init( void )
+{
+#if (CFG_LED_SUPPORTED == 1U)
+ /**
+ * Leds Initialization
+ */
+#if (CFG_HW_LPUART1_ENABLED != 1) || ! defined (STM32WB35xx)
+ // On WB35, LED_BLUE share the GPIO PB5 with LPUART
+ BSP_LED_Init(LED_BLUE);
+#endif
+ BSP_LED_Init(LED_GREEN);
+ BSP_LED_Init(LED_RED);
+#endif
+
+ return;
+}
+
+static void Button_Init( void )
+{
+#if (CFG_BUTTON_SUPPORTED == 1U)
+ /**
+ * Button Initialization
+ */
+ BSP_PB_Init(BUTTON_SW1, BUTTON_MODE_EXTI);
+ BSP_PB_Init(BUTTON_SW2, BUTTON_MODE_EXTI);
+ BSP_PB_Init(BUTTON_SW3, BUTTON_MODE_EXTI);
+
+#endif
+
+ return;
+}
+
+/* USER CODE END FD_LOCAL_FUNCTIONS */
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+
+void UTIL_SEQ_Idle( void )
+{
+ /* Note that WFI (i.e. SLEEP mode) is required for SF timer tests but STOP or OFF mode will be managed by low-power test itself */
+#if ( CFG_LPM_SUPPORTED == 1)
+ UTIL_LPM_EnterLowPower( );
+#endif
+ return;
+}
+
+void shci_notify_asynch_evt(void* pdata)
+{
+ UNUSED(pdata);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_SYSTEM_HCI_ASYNCH_EVT, CFG_SCH_PRIO_0);
+ return;
+}
+
+void shci_cmd_resp_release(uint32_t flag)
+{
+ UNUSED(flag);
+ UTIL_SEQ_SetEvt(1U << CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP);
+ return;
+}
+
+void shci_cmd_resp_wait(uint32_t timeout)
+{
+ UNUSED(timeout);
+ UTIL_SEQ_WaitEvt(1U << CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP);
+ return;
+}
+
+/* Received trace buffer from M0 */
+void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt )
+{
+#if(CFG_DEBUG_TRACE != 0)
+ /* Call write/print function using DMA from dbg_trace */
+ /* - Cast to TL_AsynchEvt_t* to get "real" payload (without Sub Evt code 2bytes),
+ - (-2) to size to remove Sub Evt Code */
+ DbgTraceWrite(1U, (const unsigned char *) ((TL_AsynchEvt_t *)(hcievt->evtserial.evt.payload))->payload, hcievt->evtserial.evt.plen - 2U);
+#endif /* CFG_DEBUG_TRACE */
+ /* Release buffer */
+ TL_MM_EvtDone( hcievt );
+}
+/**
+ * @brief Initialisation of the trace mechanism
+ * @param None
+ * @retval None
+ */
+#if(CFG_DEBUG_TRACE != 0)
+void DbgOutputInit( void )
+{
+/* USER CODE BEGIN DbgOutputInit */
+#ifdef CFG_DEBUG_TRACE_UART
+ MX_UART_Init(CFG_DEBUG_TRACE_UART);
+#endif
+ return;
+}
+
+/**
+ * @brief Management of the traces
+ * @param p_data : data
+ * @param size : size
+ * @param call-back :
+ * @retval None
+ */
+void DbgOutputTraces( uint8_t *p_data, uint16_t size, void (*cb)(void) )
+{
+ HW_UART_Transmit_DMA(CFG_DEBUG_TRACE_UART, p_data, size, cb);
+
+ return;
+}
+#endif
+
+/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
+
+/* USER CODE END FD_WRAP_FUNCTIONS */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/gpio_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/gpio_lld.c
new file mode 100644
index 000000000..1ccb7b42f
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/gpio_lld.c
@@ -0,0 +1,132 @@
+/**
+ ******************************************************************************
+ * @file gpio_lld.c
+ * @author MCD Application Team
+ * @version $VERSION$
+ * @date $DATE$
+ * @brief This file contains the init of all the GPIOs used by LLD tests.
+ * It is to be used on both M0 and M4.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+// Be carrefull with the .h included as this file must be compilable on both M0 and M4 environments
+#include "app_conf.h"
+#include "gpio_lld.h"
+
+/* Set PHY GPIO_HARD_FAULT to '1' */
+void gpio_lld_phy_gpioHardFault_up(void) {
+ HAL_GPIO_WritePin(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN, GPIO_PIN_SET);
+}
+
+/* Set PHY GPIO_HARD_FAULT to '0' */
+void gpio_lld_phy_gpioHardFault_down(void) {
+ HAL_GPIO_WritePin(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN, GPIO_PIN_RESET);
+}
+
+/* Initialize GPIOs used by USART */
+void gpio_lld_usart_init(void)
+{
+ GPIO_InitTypeDef gpioinitstruct = {0};
+
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ USART_TX_GPIO_CLK_ENABLE();
+ USART_RX_GPIO_CLK_ENABLE();
+
+ /* Common configuration to Tx and Rx */
+ gpioinitstruct.Mode = GPIO_MODE_AF_PP;
+ gpioinitstruct.Pull = GPIO_NOPULL;
+ gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+ /* Configure USART Tx */
+ gpioinitstruct.Pin = USART_TX_PIN;
+ gpioinitstruct.Alternate = USART_TX_AF;
+ HAL_GPIO_Init(USART_TX_GPIO_PORT, &gpioinitstruct);
+
+ /* Configure USART Rx */
+ gpioinitstruct.Pin = USART_RX_PIN;
+ gpioinitstruct.Alternate = USART_RX_AF;
+ HAL_GPIO_Init(USART_RX_GPIO_PORT, &gpioinitstruct);
+
+ /*** Configure the USART peripheral ***/
+ /* Enable USART clock */
+ USART_CLK_ENABLE();
+}
+
+/* De-initialize GPIOs used by USART */
+void gpio_lld_usart_deInit(void) {
+ HAL_GPIO_DeInit(USART_TX_GPIO_PORT, USART_TX_PIN);
+ HAL_GPIO_DeInit(USART_RX_GPIO_PORT, USART_RX_PIN);
+ /* Do not disable clocks as they could be used by others GPIOs and it seems
+ to not need power in STOP mode */
+}
+
+/* Initialize GPIOs used by LPUART */
+void gpio_lld_lpuart_init(void)
+{
+ GPIO_InitTypeDef gpioinitstruct = {0};
+
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ LPUART_TX_GPIO_CLK_ENABLE();
+ LPUART_RX_GPIO_CLK_ENABLE();
+
+ /* Common configuration to Tx and Rx */
+ gpioinitstruct.Mode = GPIO_MODE_AF_PP;
+ gpioinitstruct.Pull = GPIO_NOPULL;
+ gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+ /* Configure LPUART Tx */
+ gpioinitstruct.Pin = LPUART_TX_PIN;
+ gpioinitstruct.Alternate = LPUART_TX_AF;
+ HAL_GPIO_Init(LPUART_TX_GPIO_PORT, &gpioinitstruct);
+
+ /* Configure LPUART Rx */
+ gpioinitstruct.Pin = LPUART_RX_PIN;
+ gpioinitstruct.Alternate = LPUART_RX_AF;
+ HAL_GPIO_Init(LPUART_RX_GPIO_PORT, &gpioinitstruct);
+
+ /*** Configure the LPUART peripheral ***/
+ /* Enable LPUART clock */
+ LPUART_CLK_ENABLE();
+}
+
+/* De-initialize GPIOs used by LPUART */
+void gpio_lld_lpuart_deInit(void) {
+ HAL_GPIO_DeInit(LPUART_TX_GPIO_PORT, LPUART_TX_PIN);
+ HAL_GPIO_DeInit(LPUART_RX_GPIO_PORT, LPUART_RX_PIN);
+ /* Do not disable clocks as they could be used by others GPIOs and it seems
+ to not need power in STOP mode */
+}
+
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_timerserver.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_timerserver.c
new file mode 100644
index 000000000..e0e4fcb5d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_timerserver.c
@@ -0,0 +1,893 @@
+/**
+ ******************************************************************************
+ * File Name : hw_timerserver.c
+ * Description : Hardware timerserver source file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "hw_conf.h"
+
+/* Private typedef -----------------------------------------------------------*/
+typedef enum
+{
+ TimerID_Free,
+ TimerID_Created,
+ TimerID_Running
+}TimerIDStatus_t;
+
+typedef enum
+{
+ SSR_Read_Requested,
+ SSR_Read_Not_Requested
+}RequestReadSSR_t;
+
+typedef enum
+{
+ WakeupTimerValue_Overpassed,
+ WakeupTimerValue_LargeEnough
+}WakeupTimerLimitation_Status_t;
+
+typedef struct
+{
+ HW_TS_pTimerCb_t pTimerCallBack;
+ uint32_t CounterInit;
+ uint32_t CountLeft;
+ TimerIDStatus_t TimerIDStatus;
+ HW_TS_Mode_t TimerMode;
+ uint32_t TimerProcessID;
+ uint8_t PreviousID;
+ uint8_t NextID;
+}TimerContext_t;
+
+/* Private defines -----------------------------------------------------------*/
+#define SSR_FORBIDDEN_VALUE 0xFFFFFFFF
+#define TIMER_LIST_EMPTY 0xFFFF
+
+/* Private macros ------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/**
+ * START of Section TIMERSERVER_CONTEXT
+ */
+
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile TimerContext_t aTimerContext[CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER];
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile uint8_t CurrentRunningTimerID;
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile uint8_t PreviousRunningTimerID;
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile uint32_t SSRValueOnLastSetup;
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile WakeupTimerLimitation_Status_t WakeupTimerLimitation;
+
+/**
+ * END of Section TIMERSERVER_CONTEXT
+ */
+
+static RTC_HandleTypeDef *phrtc; /**< RTC handle */
+static uint8_t WakeupTimerDivider;
+static uint8_t AsynchPrescalerUserConfig;
+static uint16_t SynchPrescalerUserConfig;
+static volatile uint16_t MaxWakeupTimerSetup;
+
+/* Global variables ----------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static void RestartWakeupCounter(uint16_t Value);
+static uint16_t ReturnTimeElapsed(void);
+static void RescheduleTimerList(void);
+static void UnlinkTimer(uint8_t TimerID, RequestReadSSR_t RequestReadSSR);
+static void LinkTimerBefore(uint8_t TimerID, uint8_t RefTimerID);
+static void LinkTimerAfter(uint8_t TimerID, uint8_t RefTimerID);
+static uint16_t linkTimer(uint8_t TimerID);
+static uint32_t ReadRtcSsrValue(void);
+
+__weak void HW_TS_RTC_CountUpdated_AppNot(void);
+
+/* Functions Definition ------------------------------------------------------*/
+
+/**
+ * @brief Read the RTC_SSR value
+ * As described in the reference manual, the RTC_SSR shall be read twice to ensure
+ * reliability of the value
+ * @param None
+ * @retval SSR value read
+ */
+static uint32_t ReadRtcSsrValue(void)
+{
+ uint32_t first_read;
+ uint32_t second_read;
+
+ first_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+
+ second_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+
+ while(first_read != second_read)
+ {
+ first_read = second_read;
+
+ second_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+ }
+
+ return second_read;
+}
+
+/**
+ * @brief Insert a Timer in the list after the Timer ID specified
+ * @param TimerID: The ID of the Timer
+ * @param RefTimerID: The ID of the Timer to be linked after
+ * @retval None
+ */
+static void LinkTimerAfter(uint8_t TimerID, uint8_t RefTimerID)
+{
+ uint8_t next_id;
+
+ next_id = aTimerContext[RefTimerID].NextID;
+
+ if(next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+ {
+ aTimerContext[next_id].PreviousID = TimerID;
+ }
+ aTimerContext[TimerID].NextID = next_id;
+ aTimerContext[TimerID].PreviousID = RefTimerID ;
+ aTimerContext[RefTimerID].NextID = TimerID;
+
+ return;
+}
+
+/**
+ * @brief Insert a Timer in the list before the ID specified
+ * @param TimerID: The ID of the Timer
+ * @param RefTimerID: The ID of the Timer to be linked before
+ * @retval None
+ */
+static void LinkTimerBefore(uint8_t TimerID, uint8_t RefTimerID)
+{
+ uint8_t previous_id;
+
+ if(RefTimerID != CurrentRunningTimerID)
+ {
+ previous_id = aTimerContext[RefTimerID].PreviousID;
+
+ aTimerContext[previous_id].NextID = TimerID;
+ aTimerContext[TimerID].NextID = RefTimerID;
+ aTimerContext[TimerID].PreviousID = previous_id ;
+ aTimerContext[RefTimerID].PreviousID = TimerID;
+ }
+ else
+ {
+ aTimerContext[TimerID].NextID = RefTimerID;
+ aTimerContext[RefTimerID].PreviousID = TimerID;
+ }
+
+ return;
+}
+
+/**
+ * @brief Insert a Timer in the list
+ * @param TimerID: The ID of the Timer
+ * @retval None
+ */
+static uint16_t linkTimer(uint8_t TimerID)
+{
+ uint32_t time_left;
+ uint16_t time_elapsed;
+ uint8_t timer_id_lookup;
+ uint8_t next_id;
+
+ if(CurrentRunningTimerID == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+ {
+ /**
+ * No timer in the list
+ */
+ PreviousRunningTimerID = CurrentRunningTimerID;
+ CurrentRunningTimerID = TimerID;
+ aTimerContext[TimerID].NextID = CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER;
+
+ SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+ time_elapsed = 0;
+ }
+ else
+ {
+ time_elapsed = ReturnTimeElapsed();
+
+ /**
+ * update count of the timer to be linked
+ */
+ aTimerContext[TimerID].CountLeft += time_elapsed;
+ time_left = aTimerContext[TimerID].CountLeft;
+
+ /**
+ * Search for index where the new timer shall be linked
+ */
+ if(aTimerContext[CurrentRunningTimerID].CountLeft <= time_left)
+ {
+ /**
+ * Search for the ID after the first one
+ */
+ timer_id_lookup = CurrentRunningTimerID;
+ next_id = aTimerContext[timer_id_lookup].NextID;
+ while((next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (aTimerContext[next_id].CountLeft <= time_left))
+ {
+ timer_id_lookup = aTimerContext[timer_id_lookup].NextID;
+ next_id = aTimerContext[timer_id_lookup].NextID;
+ }
+
+ /**
+ * Link after the ID
+ */
+ LinkTimerAfter(TimerID, timer_id_lookup);
+ }
+ else
+ {
+ /**
+ * Link before the first ID
+ */
+ LinkTimerBefore(TimerID, CurrentRunningTimerID);
+ PreviousRunningTimerID = CurrentRunningTimerID;
+ CurrentRunningTimerID = TimerID;
+ }
+ }
+
+ return time_elapsed;
+}
+
+/**
+ * @brief Remove a Timer from the list
+ * @param TimerID: The ID of the Timer
+ * @param RequestReadSSR: Request to read the SSR register or not
+ * @retval None
+ */
+static void UnlinkTimer(uint8_t TimerID, RequestReadSSR_t RequestReadSSR)
+{
+ uint8_t previous_id;
+ uint8_t next_id;
+
+ if(TimerID == CurrentRunningTimerID)
+ {
+ PreviousRunningTimerID = CurrentRunningTimerID;
+ CurrentRunningTimerID = aTimerContext[TimerID].NextID;
+ }
+ else
+ {
+ previous_id = aTimerContext[TimerID].PreviousID;
+ next_id = aTimerContext[TimerID].NextID;
+
+ aTimerContext[previous_id].NextID = aTimerContext[TimerID].NextID;
+ if(next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+ {
+ aTimerContext[next_id].PreviousID = aTimerContext[TimerID].PreviousID;
+ }
+ }
+
+ /**
+ * Timer is out of the list
+ */
+ aTimerContext[TimerID].TimerIDStatus = TimerID_Created;
+
+ if((CurrentRunningTimerID == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (RequestReadSSR == SSR_Read_Requested))
+ {
+ SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+ }
+
+ return;
+}
+
+/**
+ * @brief Return the number of ticks counted by the wakeuptimer since it has been started
+ * @note The API is reading the SSR register to get how many ticks have been counted
+ * since the time the timer has been started
+ * @param None
+ * @retval Time expired in Ticks
+ */
+static uint16_t ReturnTimeElapsed(void)
+{
+ uint32_t return_value;
+ uint32_t wrap_counter;
+
+ if(SSRValueOnLastSetup != SSR_FORBIDDEN_VALUE)
+ {
+ return_value = ReadRtcSsrValue(); /**< Read SSR register first */
+
+ if (SSRValueOnLastSetup >= return_value)
+ {
+ return_value = SSRValueOnLastSetup - return_value;
+ }
+ else
+ {
+ wrap_counter = SynchPrescalerUserConfig - return_value;
+ return_value = SSRValueOnLastSetup + wrap_counter;
+ }
+
+ /**
+ * At this stage, ReturnValue holds the number of ticks counted by SSR
+ * Need to translate in number of ticks counted by the Wakeuptimer
+ */
+ return_value = return_value*AsynchPrescalerUserConfig;
+ return_value = return_value >> WakeupTimerDivider;
+ }
+ else
+ {
+ return_value = 0;
+ }
+
+ return (uint16_t)return_value;
+}
+
+/**
+ * @brief Set the wakeup counter
+ * @note The API is writing the counter value so that the value is decreased by one to cope with the fact
+ * the interrupt is generated with 1 extra clock cycle (See RefManuel)
+ * It assumes all condition are met to be allowed to write the wakeup counter
+ * @param Value: Value to be written in the counter
+ * @retval None
+ */
+static void RestartWakeupCounter(uint16_t Value)
+{
+ /**
+ * The wakeuptimer has been disabled in the calling function to reduce the time to poll the WUTWF
+ * FLAG when the new value will have to be written
+ * __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);
+ */
+
+ if(Value == 0)
+ {
+ SSRValueOnLastSetup = ReadRtcSsrValue();
+
+ /**
+ * Simulate that the Timer expired
+ */
+ HAL_NVIC_SetPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);
+ }
+ else
+ {
+ if((Value > 1) ||(WakeupTimerDivider != 1))
+ {
+ Value -= 1;
+ }
+
+ while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == RESET);
+
+ /**
+ * make sure to clear the flags after checking the WUTWF.
+ * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+ * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+ * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+ * due to the autoreload feature
+ */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF); /**< Clear flag in RTC module */
+ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**< Clear flag in EXTI module */
+ HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Clear pending bit in NVIC */
+
+ MODIFY_REG(RTC->WUTR, RTC_WUTR_WUT, Value);
+
+ /**
+ * Update the value here after the WUTWF polling that may take some time
+ */
+ SSRValueOnLastSetup = ReadRtcSsrValue();
+
+ __HAL_RTC_WAKEUPTIMER_ENABLE(phrtc); /**< Enable the Wakeup Timer */
+
+ HW_TS_RTC_CountUpdated_AppNot();
+ }
+
+ return ;
+}
+
+/**
+ * @brief Reschedule the list of timer
+ * @note 1) Update the count left for each timer in the list
+ * 2) Setup the wakeuptimer
+ * @param None
+ * @retval None
+ */
+static void RescheduleTimerList(void)
+{
+ uint8_t localTimerID;
+ uint32_t timecountleft;
+ uint16_t wakeup_timer_value;
+ uint16_t time_elapsed;
+
+ /**
+ * The wakeuptimer is disabled now to reduce the time to poll the WUTWF
+ * FLAG when the new value will have to be written
+ */
+ if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+ {
+ /**
+ * Wait for the flag to be back to 0 when the wakeup timer is enabled
+ */
+ while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == SET);
+ }
+ __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc); /**< Disable the Wakeup Timer */
+
+ localTimerID = CurrentRunningTimerID;
+
+ /**
+ * Calculate what will be the value to write in the wakeuptimer
+ */
+ timecountleft = aTimerContext[localTimerID].CountLeft;
+
+ /**
+ * Read how much has been counted
+ */
+ time_elapsed = ReturnTimeElapsed();
+
+ if(timecountleft < time_elapsed )
+ {
+ /**
+ * There is no tick left to count
+ */
+ wakeup_timer_value = 0;
+ WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+ }
+ else
+ {
+ if(timecountleft > (time_elapsed + MaxWakeupTimerSetup))
+ {
+ /**
+ * The number of tick left is greater than the Wakeuptimer maximum value
+ */
+ wakeup_timer_value = MaxWakeupTimerSetup;
+
+ WakeupTimerLimitation = WakeupTimerValue_Overpassed;
+ }
+ else
+ {
+ wakeup_timer_value = timecountleft - time_elapsed;
+ WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+ }
+
+ }
+
+ /**
+ * update ticks left to be counted for each timer
+ */
+ while(localTimerID != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+ {
+ if (aTimerContext[localTimerID].CountLeft < time_elapsed)
+ {
+ aTimerContext[localTimerID].CountLeft = 0;
+ }
+ else
+ {
+ aTimerContext[localTimerID].CountLeft -= time_elapsed;
+ }
+ localTimerID = aTimerContext[localTimerID].NextID;
+ }
+
+ /**
+ * Write next count
+ */
+ RestartWakeupCounter(wakeup_timer_value);
+
+ return ;
+}
+
+/* Public functions ----------------------------------------------------------*/
+
+/**
+ * For all public interface except that may need write access to the RTC, the RTC
+ * shall be unlock at the beginning and locked at the output
+ * In order to ease maintainability, the unlock is done at the top and the lock at then end
+ * in case some new implementation is coming in the future
+ */
+
+void HW_TS_RTC_Wakeup_Handler(void)
+{
+ HW_TS_pTimerCb_t ptimer_callback;
+ uint32_t timer_process_id;
+ uint8_t local_current_running_timer_id;
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */
+ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+/* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+ /**
+ * Disable the Wakeup Timer
+ * This may speed up a bit the processing to wait the timer to be disabled
+ * The timer is still counting 2 RTCCLK
+ */
+ __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);
+
+ local_current_running_timer_id = CurrentRunningTimerID;
+
+ if(aTimerContext[local_current_running_timer_id].TimerIDStatus == TimerID_Running)
+ {
+ ptimer_callback = aTimerContext[local_current_running_timer_id].pTimerCallBack;
+ timer_process_id = aTimerContext[local_current_running_timer_id].TimerProcessID;
+
+ /**
+ * It should be good to check whether the TimeElapsed is greater or not than the tick left to be counted
+ * However, due to the inaccuracy of the reading of the time elapsed, it may return there is 1 tick
+ * to be left whereas the count is over
+ * A more secure implementation has been done with a flag to state whereas the full count has been written
+ * in the wakeuptimer or not
+ */
+ if(WakeupTimerLimitation != WakeupTimerValue_Overpassed)
+ {
+ if(aTimerContext[local_current_running_timer_id].TimerMode == hw_ts_Repeated)
+ {
+ UnlinkTimer(local_current_running_timer_id, SSR_Read_Not_Requested);
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+ HW_TS_Start(local_current_running_timer_id, aTimerContext[local_current_running_timer_id].CounterInit);
+
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+ }
+ else
+ {
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+ HW_TS_Stop(local_current_running_timer_id);
+
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+ }
+
+ HW_TS_RTC_Int_AppNot(timer_process_id, local_current_running_timer_id, ptimer_callback);
+ }
+ else
+ {
+ RescheduleTimerList();
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+ }
+ }
+ else
+ {
+ /**
+ * We should never end up in this case
+ * However, if due to any bug in the timer server this is the case, the mistake may not impact the user.
+ * We could just clean the interrupt flag and get out from this unexpected interrupt
+ */
+ while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == RESET);
+
+ /**
+ * make sure to clear the flags after checking the WUTWF.
+ * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+ * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+ * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+ * due to the autoreload feature
+ */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF); /**< Clear flag in RTC module */
+ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**< Clear flag in EXTI module */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+ }
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+ return;
+}
+
+void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc)
+{
+ uint8_t loop;
+ uint32_t localmaxwakeuptimersetup;
+
+ /**
+ * Get RTC handler
+ */
+ phrtc = hrtc;
+
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+ SET_BIT(RTC->CR, RTC_CR_BYPSHAD);
+
+ /**
+ * Readout the user config
+ */
+ WakeupTimerDivider = (4 - ((uint32_t)(READ_BIT(RTC->CR, RTC_CR_WUCKSEL))));
+
+ AsynchPrescalerUserConfig = (uint8_t)(READ_BIT(RTC->PRER, RTC_PRER_PREDIV_A) >> (uint32_t)POSITION_VAL(RTC_PRER_PREDIV_A)) + 1;
+
+ SynchPrescalerUserConfig = (uint16_t)(READ_BIT(RTC->PRER, RTC_PRER_PREDIV_S)) + 1;
+
+ /**
+ * Margin is taken to avoid wrong calculation when the wrap around is there and some
+ * application interrupts may have delayed the reading
+ */
+ localmaxwakeuptimersetup = ((((SynchPrescalerUserConfig - 1)*AsynchPrescalerUserConfig) - CFG_HW_TS_RTC_HANDLER_MAX_DELAY) >> WakeupTimerDivider);
+
+ if(localmaxwakeuptimersetup >= 0xFFFF)
+ {
+ MaxWakeupTimerSetup = 0xFFFF;
+ }
+ else
+ {
+ MaxWakeupTimerSetup = (uint16_t)localmaxwakeuptimersetup;
+ }
+
+ /**
+ * Configure EXTI module
+ */
+ LL_EXTI_EnableRisingTrig_0_31(RTC_EXTI_LINE_WAKEUPTIMER_EVENT);
+ LL_EXTI_EnableIT_0_31(RTC_EXTI_LINE_WAKEUPTIMER_EVENT);
+
+ if(TimerInitMode == hw_ts_InitMode_Full)
+ {
+ WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+ SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+
+ /**
+ * Initialize the timer server
+ */
+ for(loop = 0; loop < CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER; loop++)
+ {
+ aTimerContext[loop].TimerIDStatus = TimerID_Free;
+ }
+
+ CurrentRunningTimerID = CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER; /**< Set ID to non valid value */
+
+ __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc); /**< Disable the Wakeup Timer */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF); /**< Clear flag in RTC module */
+ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**< Clear flag in EXTI module */
+ HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Clear pending bit in NVIC */
+ __HAL_RTC_WAKEUPTIMER_ENABLE_IT(phrtc, RTC_IT_WUT); /**< Enable interrupt in RTC module */
+ }
+ else
+ {
+ if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTF) != RESET)
+ {
+ /**
+ * Simulate that the Timer expired
+ */
+ HAL_NVIC_SetPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);
+ }
+ }
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+ HAL_NVIC_SetPriority(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID, CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO, CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO); /**< Set NVIC priority */
+ HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Enable NVIC */
+
+ return;
+}
+
+HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pftimeout_handler)
+{
+ HW_TS_ReturnStatus_t localreturnstatus;
+ uint8_t loop = 0;
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */
+ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+ while((loop < CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (aTimerContext[loop].TimerIDStatus != TimerID_Free))
+ {
+ loop++;
+ }
+
+ if(loop != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+ {
+ aTimerContext[loop].TimerIDStatus = TimerID_Created;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+ aTimerContext[loop].TimerProcessID = TimerProcessID;
+ aTimerContext[loop].TimerMode = TimerMode;
+ aTimerContext[loop].pTimerCallBack = pftimeout_handler;
+ *pTimerId = loop;
+
+ localreturnstatus = hw_ts_Successful;
+ }
+ else
+ {
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+ localreturnstatus = hw_ts_Failed;
+ }
+
+ return(localreturnstatus);
+}
+
+void HW_TS_Delete(uint8_t timer_id)
+{
+ HW_TS_Stop(timer_id);
+
+ aTimerContext[timer_id].TimerIDStatus = TimerID_Free; /**< release ID */
+
+ return;
+}
+
+void HW_TS_Stop(uint8_t timer_id)
+{
+ uint8_t localcurrentrunningtimerid;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */
+ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+ HAL_NVIC_DisableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Disable NVIC */
+
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+ if(aTimerContext[timer_id].TimerIDStatus == TimerID_Running)
+ {
+ UnlinkTimer(timer_id, SSR_Read_Requested);
+ localcurrentrunningtimerid = CurrentRunningTimerID;
+
+ if(localcurrentrunningtimerid == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+ {
+ /**
+ * List is empty
+ */
+
+ /**
+ * Disable the timer
+ */
+ if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+ {
+ /**
+ * Wait for the flag to be back to 0 when the wakeup timer is enabled
+ */
+ while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == SET);
+ }
+ __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc); /**< Disable the Wakeup Timer */
+
+ while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == RESET);
+
+ /**
+ * make sure to clear the flags after checking the WUTWF.
+ * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+ * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+ * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+ * due to the autoreload feature
+ */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF); /**< Clear flag in RTC module */
+ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**< Clear flag in EXTI module */
+ HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Clear pending bit in NVIC */
+ }
+ else if(PreviousRunningTimerID != localcurrentrunningtimerid)
+ {
+ RescheduleTimerList();
+ }
+ }
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+ HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Enable NVIC */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+ return;
+}
+
+void HW_TS_Start(uint8_t timer_id, uint32_t timeout_ticks)
+{
+ uint16_t time_elapsed;
+ uint8_t localcurrentrunningtimerid;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ uint32_t primask_bit;
+#endif
+
+ if(aTimerContext[timer_id].TimerIDStatus == TimerID_Running)
+ {
+ HW_TS_Stop( timer_id );
+ }
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */
+ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+ HAL_NVIC_DisableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Disable NVIC */
+
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+ aTimerContext[timer_id].TimerIDStatus = TimerID_Running;
+
+ aTimerContext[timer_id].CountLeft = timeout_ticks;
+ aTimerContext[timer_id].CounterInit = timeout_ticks;
+
+ time_elapsed = linkTimer(timer_id);
+
+ localcurrentrunningtimerid = CurrentRunningTimerID;
+
+ if(PreviousRunningTimerID != localcurrentrunningtimerid)
+ {
+ RescheduleTimerList();
+ }
+ else
+ {
+ aTimerContext[timer_id].CountLeft -= time_elapsed;
+ }
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+ HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**< Enable NVIC */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+ return;
+}
+
+uint16_t HW_TS_RTC_ReadLeftTicksToCount(void)
+{
+ uint32_t primask_bit;
+ uint16_t return_value, auro_reload_value, elapsed_time_value;
+
+ primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */
+ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+
+ if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+ {
+ auro_reload_value = (uint32_t)(READ_BIT(RTC->WUTR, RTC_WUTR_WUT));
+
+ elapsed_time_value = ReturnTimeElapsed();
+
+ if(auro_reload_value > elapsed_time_value)
+ {
+ return_value = auro_reload_value - elapsed_time_value;
+ }
+ else
+ {
+ return_value = 0;
+ }
+ }
+ else
+ {
+ return_value = TIMER_LIST_EMPTY;
+ }
+
+ __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+
+ return (return_value);
+}
+
+__weak void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack)
+{
+ pTimerCallBack();
+
+ return;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_uart.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_uart.c
new file mode 100644
index 000000000..3c842b29a
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_uart.c
@@ -0,0 +1,442 @@
+/**
+ ******************************************************************************
+ * File Name : Src/hw_uart.c
+ * Description : HW UART source file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+
+/* Macros --------------------------------------------------------------------*/
+#define HW_UART_RX_IT(__HANDLE__, __USART_BASE__) \
+ do{ \
+ HW_##__HANDLE__##RxCb = cb; \
+ (__HANDLE__).Instance = (__USART_BASE__); \
+ hal_status = HAL_UART_Receive_IT(&(__HANDLE__), p_data, size); \
+ } while(0)
+
+#define HW_UART_TX_IT(__HANDLE__, __USART_BASE__) \
+ do{ \
+ HW_##__HANDLE__##TxCb = cb; \
+ (__HANDLE__).Instance = (__USART_BASE__); \
+ hal_status = HAL_UART_Transmit_IT(&(__HANDLE__), p_data, size); \
+ } while(0)
+
+#define HW_UART_TX(__HANDLE__, __USART_BASE__) \
+ do{ \
+ (__HANDLE__).Instance = (__USART_BASE__); \
+ hal_status = HAL_UART_Transmit(&(__HANDLE__), p_data, size, timeout); \
+ } while(0)
+
+/* Variables -----------------------------------------------------------------*/
+#if (CFG_HW_USART1_ENABLED == 1)
+UART_HandleTypeDef huart1;
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+DMA_HandleTypeDef hdma_usart1_tx;
+#endif
+void (*HW_huart1RxCb)(void);
+void (*HW_huart1TxCb)(void);
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+UART_HandleTypeDef hlpuart1;
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+DMA_HandleTypeDef hdma_lpuart1_tx;
+#endif
+void (*HW_hlpuart1RxCb)(void);
+void (*HW_hlpuart1TxCb)(void);
+#endif
+
+/* Functions Definition ------------------------------------------------------*/
+
+void MX_UART_Init(hw_uart_id_t uart)
+{
+ UART_HandleTypeDef *handle = NULL;
+ USART_TypeDef *instance = NULL;
+ switch(uart){
+ case hw_uart1:
+#if (CFG_HW_USART1_ENABLED != 1)
+ return;
+#endif
+ handle = &huart1;
+ instance = USART1;
+ break;
+ case hw_lpuart1:
+#if (CFG_HW_LPUART1_ENABLED != 1)
+ return;
+#endif
+ handle = &hlpuart1;
+ instance = LPUART1;
+ break;
+ default: Error_Handler();
+ }
+ handle->Instance = instance;
+ handle->Init.BaudRate = 115200;
+ handle->Init.WordLength = UART_WORDLENGTH_8B;
+ handle->Init.StopBits = UART_STOPBITS_1;
+ handle->Init.Parity = UART_PARITY_NONE;
+ handle->Init.Mode = UART_MODE_TX_RX;
+ handle->Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ handle->Init.OverSampling = UART_OVERSAMPLING_16;
+ handle->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ handle->Init.ClockPrescaler = UART_PRESCALER_DIV1;
+ handle->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ handle->FifoMode = UART_FIFOMODE_DISABLE;
+ if (HAL_UART_Init(handle) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetTxFifoThreshold(handle, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetRxFifoThreshold(handle, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_DisableFifoMode(handle) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+void MX_UART_Deinit(hw_uart_id_t uart)
+{
+ UART_HandleTypeDef *handle = NULL;
+ switch(uart){
+ case hw_uart1:
+#if (CFG_HW_USART1_ENABLED != 1)
+ return;
+#endif
+ handle = &huart1;
+ break;
+ case hw_lpuart1:
+#if (CFG_HW_LPUART1_ENABLED != 1)
+ return;
+#endif
+ handle = &hlpuart1;
+ break;
+ default: Error_Handler();
+ }
+ if (HAL_UART_DeInit(handle) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+hw_status_t HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_UART_RX_IT(huart1, USART1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_UART_RX_IT(hlpuart1, LPUART1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+hw_status_t HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_UART_TX_IT(huart1, USART1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_UART_TX_IT(hlpuart1, LPUART1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, uint32_t timeout)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_UART_TX(huart1, USART1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_UART_TX(hlpuart1, LPUART1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ hw_status_t hw_status = hw_uart_ok;
+
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HW_huart1TxCb = cb;
+ huart1.Instance = USART1;
+ hal_status = HAL_UART_Transmit_DMA(&huart1, p_data, size);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HW_hlpuart1TxCb = cb;
+ hlpuart1.Instance = LPUART1;
+ hal_status = HAL_UART_Transmit_DMA(&hlpuart1, p_data, size);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ switch (hal_status)
+ {
+ case HAL_OK:
+ hw_status = hw_uart_ok;
+ break;
+
+ case HAL_ERROR:
+ hw_status = hw_uart_error;
+ break;
+
+ case HAL_BUSY:
+ hw_status = hw_uart_busy;
+ break;
+
+ case HAL_TIMEOUT:
+ hw_status = hw_uart_to;
+ break;
+
+ default:
+ break;
+ }
+
+ return hw_status;
+}
+
+#if 0
+void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id)
+{
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case hw_uart1:
+ HAL_UART_IRQHandler(&huart1);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case hw_lpuart1:
+ HAL_UART_IRQHandler(&hlpuart1);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+
+void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id)
+{
+ switch (hw_uart_id)
+ {
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+ case hw_uart1:
+ HAL_DMA_IRQHandler(huart1.hdmatx);
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+ case hw_lpuart1:
+ HAL_DMA_IRQHandler(hlpuart1.hdmatx);
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+#endif
+
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+ switch ((uint32_t)huart->Instance)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case (uint32_t)USART1:
+ if(HW_huart1RxCb)
+ {
+ HW_huart1RxCb();
+ }
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case (uint32_t)LPUART1:
+ if(HW_hlpuart1RxCb)
+ {
+ HW_hlpuart1RxCb();
+ }
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+ switch ((uint32_t)huart->Instance)
+ {
+#if (CFG_HW_USART1_ENABLED == 1)
+ case (uint32_t)USART1:
+ if(HW_huart1TxCb)
+ {
+ HW_huart1TxCb();
+ }
+ break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ case (uint32_t)LPUART1:
+ if(HW_hlpuart1TxCb)
+ {
+ HW_hlpuart1TxCb();
+ }
+ break;
+#endif
+
+ default:
+ break;
+ }
+
+ return;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/main.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/main.c
new file mode 100644
index 000000000..b1012309c
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/main.c
@@ -0,0 +1,607 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file main.c
+ * @author MCD Application Team
+ * @brief RF LLD tests application
+ *
+ @verbatim
+ ==============================================================================
+ ##### IMPORTANT NOTE #####
+ ==============================================================================
+
+ This application requests having a M0 LLD tests binary
+ flashed on the Wireless Coprocessor.
+ If it is not the case, you need to use STM32CubeProgrammer to load the appropriate
+ binary.
+
+ All available binaries are located under following directory:
+ /Projects/STM32_Copro_Wireless_Binaries
+
+ Refer to UM2237 to learn how to use/install STM32CubeProgrammer.
+ Refer to /Projects/STM32_Copro_Wireless_Binaries/ReleaseNote.html for the
+ detailed procedure to change the Wireless Coprocessor binary.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "app_entry.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32_lpm.h"
+#include "stm32_seq.h"
+#include "dbg_trace.h"
+#include "hw_conf.h"
+#include "otp.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+RTC_HandleTypeDef hrtc;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+static void MX_DMA_Init(void);
+static void MX_RTC_Init(void);
+
+/* USER CODE BEGIN PFP */
+static void SystemClock_Config(void);
+static void PeriphClock_Config(void);
+static void Reset_Device( void );
+static void Reset_IPCC( void );
+static void Reset_BackupDomain( void );
+static void Init_Exti( void );
+static void Config_HSE(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /**
+ * The OPTVERR flag is wrongly set at power on
+ * It shall be cleared before using any HAL_FLASH_xxx() api
+ */
+ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+ Reset_Device();
+ Config_HSE();
+ /* USER CODE END Init */
+
+ /* Configure the system clock on HSE without using PLL and the periph clock needed by this application */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ PeriphClock_Config();
+ Init_Exti();
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_DMA_Init();
+ MX_RTC_Init();
+
+ /* Init code for STM32_WPAN */
+ APPE_Init();
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ UTIL_SEQ_Run( UTIL_SEQ_DEFAULT );
+ /* USER CODE END WHILE */
+
+ /* USER CODE END WHILE */
+ }
+ /* USER CODE BEGIN 3 */
+
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration : API to be called to use HSE (with or without PLL use) as 32Mhz system clock.
+ SystemClock_Config_HSE() must be called once just after boot (to go from default MSI to HSE).
+ Then application user can call both SystemClock_Config_HSE() and SystemClock_Config_MSI() at any time.
+ * @retval None
+ */
+void SystemClock_Config_HSE(uint32_t usePLL)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /* First, just set MSI ON (with the 32Mhz range) in case it was OFF, without any update on PLL */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_10;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+ /* Select MSI as system clock in order to be able to update HSE and PLL configuration */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Configure HSE and PLL if needed*/
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ if (usePLL == 1)
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ else
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Configure the system clock source and the dividers according to the fact that system clock source is 32Mhz */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+ RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ if (usePLL == 1)
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ else
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ // Note that function UTILS_SetFlashLatency() could be used to set the correct Flash latency
+ // (with 32Mhz, 2WS are needed if the range is changed to 1V instead of 1.2V)
+
+ /* Disable MSI Oscillator as the MSI is no more needed by the application */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* No update on PLL */
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief System Clock Configuration : API to be called to use MSI (with or without PLL use) as 32Mhz system clock.
+ SystemClock_Config_HSE() must be called once just after boot (to go from default MSI to HSE).
+ Then application user can call both SystemClock_Config_HSE() and SystemClock_Config_MSI() at any time.
+ * @retval None
+ */
+void SystemClock_Config_MSI(uint32_t usePLL)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /* First, just set HSE ON (with the 32Mhz range) in case it was OFF, without any update on PLL */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+ /* Select HSE as system clock in order to be able to update MSI and PLL configuration */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Configure MSI and PLL if needed*/
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_10;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ if (usePLL == 1)
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ else
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Configure the system clock source and the dividers according to the fact that system clock source is 32Mhz */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+ RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ if (usePLL == 1)
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ else
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+/* HSE cannot be stopped while using RF */
+#if 0
+ /* Disable HSE Oscillator as the HSE is no more needed by the application */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* No update on PLL */
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+#endif
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+/**
+ * @brief System Clock Configuration : must be called during application start-up
+ * @retval None
+ */
+static void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+ /* Configure LSE Drive Capability */
+ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+ #ifdef STM32WB15xx
+ #else
+ /* Configure the main internal regulator output voltage */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ #endif
+
+ /* Assuming that MSI is enabled by default after boot, lets go to HSE without using PLL */
+ SystemClock_Config_HSE(0);
+
+ /* Configure Others clock */
+ #ifdef STM32WB15xx
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI |
+ RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI2;
+ #else
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 |
+ RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI2;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_OFF;
+ #endif
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+ RCC_OscInitStruct.LSI2CalibrationValue = 0;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel4_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
+ /* DMA1_Channel5_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+}
+
+static void PeriphClock_Config(void)
+{
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+#if USE_SMPS_ENABLED_BY_DEFAULT
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+ PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
+ PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Initialize SMPS here like in BLE applis */
+ LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+ LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+ LL_PWR_SMPS_Enable();
+#else
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+#endif
+
+ return;
+}
+
+static void Config_HSE(void)
+{
+ OTP_ID0_t * p_otp;
+
+ /**
+ * Read HSE_Tuning from OTP
+ */
+ p_otp = (OTP_ID0_t *) OTP_Read(0);
+ if (p_otp)
+ {
+ LL_RCC_HSE_SetCapacitorTuning(p_otp->hse_tuning);
+ }
+
+ return;
+}
+
+
+static void Reset_Device( void )
+{
+#if ( CFG_HW_RESET_BY_FW == 1 )
+ Reset_BackupDomain();
+
+ Reset_IPCC();
+#endif
+
+ return;
+}
+
+static void Reset_IPCC( void )
+{
+ LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC);
+
+ LL_C1_IPCC_ClearFlag_CHx(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_ClearFlag_CHx(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C1_IPCC_DisableTransmitChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_DisableTransmitChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C1_IPCC_DisableReceiveChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_DisableReceiveChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ return;
+}
+
+static void Reset_BackupDomain( void )
+{
+ if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE))
+ {
+ HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
+
+ /**
+ * Write twice the value to flush the APB-AHB bridge
+ * This bit shall be written in the register before writing the next one
+ */
+ HAL_PWR_EnableBkUpAccess();
+
+ __HAL_RCC_BACKUPRESET_FORCE();
+ __HAL_RCC_BACKUPRESET_RELEASE();
+ }
+
+ return;
+}
+
+static void Init_Exti( void )
+{
+ /**< Disable all wakeup interrupt on CPU1 except LPUART(25), IPCC(36), HSEM(38) */
+ LL_EXTI_DisableIT_0_31( (~0) & (~(LL_EXTI_LINE_25)) );
+ LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) );
+
+ return;
+}
+
+/**
+ * @brief RTC Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_RTC_Init(void)
+{
+
+ /* USER CODE BEGIN RTC_Init 0 */
+
+ /* USER CODE END RTC_Init 0 */
+
+ /* USER CODE BEGIN RTC_Init 1 */
+
+ /* USER CODE END RTC_Init 1 */
+ /** Initialize RTC Only
+ */
+ hrtc.Instance = RTC;
+ hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+ hrtc.Init.AsynchPrediv = CFG_RTC_ASYNCH_PRESCALER;
+ hrtc.Init.SynchPrediv = CFG_RTC_SYNCH_PRESCALER;
+ hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+ hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+ hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+ hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+ if (HAL_RTC_Init(&hrtc) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN RTC_Init 2 */
+ /* Disable RTC registers write protection */
+ LL_RTC_DisableWriteProtection(RTC);
+
+ LL_RTC_WAKEUP_SetClock(RTC, CFG_RTC_WUCKSEL_DIVIDER);
+
+ /* Enable RTC registers write protection */
+ LL_RTC_EnableWriteProtection(RTC);
+ /* USER CODE END RTC_Init 2 */
+
+}
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+void HAL_Delay(uint32_t Delay)
+{
+ uint32_t tickstart = HAL_GetTick();
+ uint32_t wait = Delay;
+
+ /* Add a freq to guarantee minimum wait */
+ if (wait < HAL_MAX_DELAY)
+ {
+ wait += HAL_GetTickFreq();
+ }
+
+ while ((HAL_GetTick() - tickstart) < wait)
+ {
+ /************************************************************************************
+ * ENTER SLEEP MODE
+ ***********************************************************************************/
+ LL_LPM_EnableSleep( ); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+ #if defined ( __CC_ARM)
+ __force_stores();
+ #endif
+
+ __WFI( );
+ }
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ BSP_LED_On(LED_BLUE);
+ /* USER CODE BEGIN Error_Handler */
+ /* User can add his own implementation to report the HAL error return state */
+ /* USER CODE END Error_Handler */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN assert_failed */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END assert_failed */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/standby_stm32wb15.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/standby_stm32wb15.c
new file mode 100644
index 000000000..a0a8b4839
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/standby_stm32wb15.c
@@ -0,0 +1,159 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : standby_stm32wb15.c
+ * Description : Application configuration file for STM32WPAN Middleware.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "app_entry.h"
+#include "app_common.h"
+#include "app_debug.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+uint32_t backup_MSP;
+uint32_t backup_IPCC_C1MR;
+uint32_t boot_after_standby;
+extern RTC_HandleTypeDef hrtc;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+uint32_t standby_boot_mng(void);
+void standby_hw_save(void);
+void standby_hw_restore(void);
+/* USER CODE BEGIN PFP */
+void SystemClock_Config(void); // may be declared in main.h file ???
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*******************************************************************************
+ * This part may be updated by the user
+ ******************************************************************************/
+
+ /**
+ * @brief standby_hw_save function, saves hardware context to restore
+ * @param None
+ * @retval None
+ */
+void standby_hw_save(void)
+{
+ backup_IPCC_C1MR = READ_REG(IPCC->C1MR);
+
+ /* USER CODE BEGIN standby_hw_save */
+
+ /* USER CODE END standby_hw_save */
+ return;
+}
+
+ /**
+ * @brief standby_hw_restore function, restore and reconfigure hardware context
+ * @param None
+ * @retval None
+ */
+void standby_hw_restore(void)
+{
+ /* USER CODE BEGIN standby_hw_restore_1 */
+
+ /* USER CODE END standby_hw_restore_1 */
+
+ APPD_Init();
+
+ SystemClock_Config();
+
+ HAL_Init();
+
+ /* In this user section add MX init functions present in main.c , except MX_RTC_Init() */
+ /* USER CODE BEGIN standby_hw_restore_2 */
+
+ Init_Exti();
+ MX_GPIO_Init();
+ MX_DMA_Init();
+ MX_USART1_UART_Init();
+
+ /* USER CODE END standby_hw_restore_2 */
+
+ HW_IPCC_Init();
+ HW_IPCC_Enable();
+ WRITE_REG(IPCC->C1MR, backup_IPCC_C1MR);
+
+ HW_TS_Init(hw_ts_InitMode_Limited, &hrtc);
+
+ LL_PWR_EnableSRAM2Retention();
+
+ /* USER CODE BEGIN standby_hw_restore_3 */
+ APPE_Led_Init();
+ APPE_Button_Init();
+ /* USER CODE END standby_hw_restore_3 */
+
+ return;
+}
+
+/*******************************************************************************
+ * Do not update code from this limit.
+ ******************************************************************************/
+
+ /**
+ * @brief standby_boot_mng function, will restore MCU context if wakeup from standby
+ * @param None
+ * @retval None
+ */
+uint32_t standby_boot_mng(void)
+{
+#if ( CFG_LPM_STANDBY_SUPPORTED != 0 )
+ if( __HAL_PWR_GET_FLAG(PWR_FLAG_SB) != RESET )
+ {
+ __disable_irq( );
+
+ boot_after_standby = 1;
+ __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB);
+ }else{
+ boot_after_standby = 0;
+ }
+#else
+ boot_after_standby = 0;
+#endif
+
+ return boot_after_standby;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32_lpm_if.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32_lpm_if.c
new file mode 100644
index 000000000..e4e8fd597
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32_lpm_if.c
@@ -0,0 +1,288 @@
+ /*******************************************************************************
+ * @file stm32_lpm_if.c
+ * @author MCD Application Team
+ * @brief Low layer function to enter/exit low power modes (stop, sleep)
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32_lpm_if.h"
+#include "stm32_lpm.h"
+#include "app_conf.h"
+/* USER CODE BEGIN include */
+
+/* USER CODE END include */
+
+/* Exported variables --------------------------------------------------------*/
+const struct UTIL_LPM_Driver_s UTIL_PowerDriver =
+{
+ PWR_EnterSleepMode,
+ PWR_ExitSleepMode,
+
+ PWR_EnterStopMode,
+ PWR_ExitStopMode,
+
+ PWR_EnterOffMode,
+ PWR_ExitOffMode,
+};
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN Private_Function_Prototypes */
+static void Switch_On_HSI( void );
+
+/* USER CODE END Private_Function_Prototypes */
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN Private_Typedef */
+
+/* USER CODE END Private_Typedef */
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Private_Define */
+
+/* USER CODE END Private_Define */
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Private_Macro */
+
+/* USER CODE END Private_Macro */
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Private_Variables */
+
+/* USER CODE END Private_Variables */
+
+/**
+ * @brief Enters Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_EnterOffMode( void )
+{
+/* USER CODE BEGIN PWR_EnterOffMode */
+
+ /**
+ * The systick should be disabled for the same reason than when the device enters stop mode because
+ * at this time, the device may enter either OffMode or StopMode.
+ */
+ HAL_SuspendTick();
+
+ /************************************************************************************
+ * ENTER OFF MODE
+ ***********************************************************************************/
+ /*
+ * There is no risk to clear all the WUF here because in the current implementation, this API is called
+ * in critical section. If an interrupt occurs while in that critical section before that point,
+ * the flag is set and will be cleared here but the system will not enter Off Mode
+ * because an interrupt is pending in the NVIC. The ISR will be executed when moving out
+ * of this critical section
+ */
+ LL_PWR_ClearFlag_WU( );
+
+ LL_PWR_SetPowerMode( LL_PWR_MODE_STANDBY );
+
+ LL_LPM_EnableDeepSleep( ); /**< Set SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+#if defined ( __CC_ARM)
+ __force_stores( );
+#endif
+
+ __WFI( );
+/* USER CODE END PWR_EnterOffMode */
+}
+
+/**
+ * @brief Exits Low Power Off Mode
+ * @param none
+ * @retval none
+ */
+void PWR_ExitOffMode( void )
+{
+/* USER CODE BEGIN PWR_ExitOffMode */
+
+ HAL_ResumeTick();
+
+/* USER CODE END PWR_ExitOffMode */
+}
+
+/**
+ * @brief Enters Low Power Stop Mode
+ * @note ARM exists the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterStopMode( void )
+{
+/* USER CODE BEGIN PWR_EnterStopMode */
+ /**
+ * When HAL_DBGMCU_EnableDBGStopMode() is called to keep the debugger active in Stop Mode,
+ * the systick shall be disabled otherwise the cpu may crash when moving out from stop mode
+ *
+ * When in production, the HAL_DBGMCU_EnableDBGStopMode() is not called so that the device can reach best power consumption
+ * However, the systick should be disabled anyway to avoid the case when it is about to expire at the same time the device enters
+ * stop mode ( this will abort the Stop Mode entry ).
+ */
+ HAL_SuspendTick();
+
+ /**
+ * This function is called from CRITICAL SECTION
+ */
+ while( LL_HSEM_1StepLock( HSEM, CFG_HW_RCC_SEMID ) );
+
+ if ( ! LL_HSEM_1StepLock( HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID ) )
+ {
+ if( LL_PWR_IsActiveFlag_C2DS( ) )
+ {
+ /* Release ENTRY_STOP_MODE semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0 );
+
+ /**
+ * The switch on HSI before entering Stop Mode is required on Cut2.0
+ * It is useless from Cut2.1
+ */
+ Switch_On_HSI( );
+ }
+ }
+ else
+ {
+ /**
+ * The switch on HSI before entering Stop Mode is required on Cut2.0
+ * It is useless from Cut2.1
+ */
+ Switch_On_HSI( );
+ }
+
+ /* Release RCC semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_RCC_SEMID, 0 );
+
+ /************************************************************************************
+ * ENTER STOP MODE
+ ***********************************************************************************/
+ LL_PWR_SetPowerMode(CFG_PWR_MODE_STOP);
+
+ LL_LPM_EnableDeepSleep( ); /**< Set SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+#if defined ( __CC_ARM)
+ __force_stores( );
+#endif
+
+ __WFI();
+/* USER CODE END PWR_EnterStopMode */
+}
+
+/**
+ * @brief Exits Low Power Stop Mode
+ * @param none
+ * @retval none
+ */
+void PWR_ExitStopMode( void )
+{
+/* USER CODE BEGIN PWR_ExitStopMode */
+ /**
+ * This function is called from CRITICAL SECTION
+ */
+
+ /* Release ENTRY_STOP_MODE semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0 );
+
+ while( LL_HSEM_1StepLock( HSEM, CFG_HW_RCC_SEMID ) );
+// CCO : Taken from MAC project already validated in low-power
+// if(LL_RCC_GetSysClkSource( ) == LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
+ if(LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSE)
+ {
+ LL_RCC_HSE_Enable( );
+ while(!LL_RCC_HSE_IsReady( ));
+ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSE);
+ while (LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSE);
+ }
+ else
+ {
+ /**
+ * As long as the current application is fine with HSE as system clock source,
+ * there is nothing to do here
+ */
+ }
+
+ /* Release RCC semaphore */
+ LL_HSEM_ReleaseLock( HSEM, CFG_HW_RCC_SEMID, 0 );
+
+ HAL_ResumeTick();
+
+/* USER CODE END PWR_ExitStopMode */
+}
+
+/**
+ * @brief Enters Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_EnterSleepMode( void )
+{
+/* USER CODE BEGIN PWR_EnterSleepMode */
+
+ HAL_SuspendTick();
+
+ /************************************************************************************
+ * ENTER SLEEP MODE
+ ***********************************************************************************/
+ LL_LPM_EnableSleep( ); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+#if defined ( __CC_ARM)
+ __force_stores();
+#endif
+
+ __WFI( );
+/* USER CODE END PWR_EnterSleepMode */
+}
+
+/**
+ * @brief Exits Low Power Sleep Mode
+ * @note ARM exits the function when waking up
+ * @param none
+ * @retval none
+ */
+void PWR_ExitSleepMode( void )
+{
+/* USER CODE BEGIN PWR_ExitSleepMode */
+
+ HAL_ResumeTick();
+
+/* USER CODE END PWR_ExitSleepMode */
+}
+
+/* USER CODE BEGIN Private_Functions */
+/**
+ * @brief Switch the system clock on HSI
+ * @param none
+ * @retval none
+ */
+static void Switch_On_HSI( void )
+{
+ LL_RCC_HSI_Enable( );
+ while(!LL_RCC_HSI_IsReady( ));
+ LL_RCC_SetSysClkSource( LL_RCC_SYS_CLKSOURCE_HSI );
+ LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSI);
+ while (LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSI);
+}
+
+/* USER CODE END Private_Functions */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_hal_msp.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_hal_msp.c
new file mode 100644
index 000000000..c789f48a8
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_hal_msp.c
@@ -0,0 +1,332 @@
+/**
+ ******************************************************************************
+ * @file stm32wbxx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file contains the HAL System and Peripheral (UARTs) MSP initialization
+ * and de-initialization functions.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx_hal.h"
+#include "app_common.h"
+#include "gpio_lld.h"
+
+/** @addtogroup STM32WBxx_HAL_Driver
+ * @{
+ */
+
+/** @defgroup HAL_MSP HAL MSP
+ * @brief HAL MSP module.
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes the Global MSP.
+ * @note This function is called from HAL_Init() function to perform system
+ * level initialization (GPIOs, clock, DMA, interrupt).
+ * @retval None
+ */
+void HAL_MspInit(void)
+{
+
+}
+
+/**
+ * @brief DeInitializes the Global MSP.
+ * @note This functiona is called from HAL_DeInit() function to perform system
+ * level de-initialization (GPIOs, clock, DMA, interrupt).
+ * @retval None
+ */
+void HAL_MspDeInit(void)
+{
+
+}
+
+/**
+ * @brief UART MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ HAL_DMA_MuxSyncConfigTypeDef pSyncConfig;
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ if(huart->Instance == LPUART1)
+ {
+ /* USER CODE BEGIN LPUART1_MspInit 0 */
+
+ /* USER CODE END LPUART1_MspInit 0 */
+
+ /* GPIOs configuration */
+ #if(CFG_DEBUG_TRACE != 0)
+ gpio_lld_lpuart_init();
+ #endif
+
+
+ /* LPUART1 DMA Init */
+ /* LPUART1_TX Init */
+ hdma_lpuart1_tx.Instance = DMA1_Channel4;
+ hdma_lpuart1_tx.Init.Request = DMA_REQUEST_LPUART1_TX;
+ hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_lpuart1_tx.Init.Mode = DMA_NORMAL;
+ hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ pSyncConfig.SyncSignalID = HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT;
+ pSyncConfig.SyncPolarity = HAL_DMAMUX_SYNC_NO_EVENT;
+ pSyncConfig.SyncEnable = DISABLE;
+ pSyncConfig.EventEnable = DISABLE;
+ pSyncConfig.RequestNumber = 1;
+ if (HAL_DMAEx_ConfigMuxSync(&hdma_lpuart1_tx, &pSyncConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(huart,hdmatx,hdma_lpuart1_tx);
+
+ /* LPUART1 interrupt Init */
+ HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(LPUART1_IRQn);
+ /* USER CODE BEGIN LPUART1_MspInit 1 */
+
+ /* USER CODE END LPUART1_MspInit 1 */
+ }
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+ if(huart->Instance == USART1)
+ {
+ /* USER CODE BEGIN USART1_MspInit 0 */
+
+ /* USER CODE END USART1_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USART1_CLK_ENABLE();
+
+ /* GPIOs configuration */
+ #if(CFG_DEBUG_TRACE != 0)
+ gpio_lld_usart_init();
+ #endif
+
+
+ /* USART1 DMA Init */
+ /* USART1_TX Init */
+ hdma_usart1_tx.Instance = DMA1_Channel5;
+ hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
+ hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+ hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
+ /* USART1 interrupt Init */
+ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(USART1_IRQn);
+ /* USER CODE BEGIN USART1_MspInit 1 */
+
+ /* USER CODE END USART1_MspInit 1 */
+ }
+#endif
+}
+
+/**
+ * @brief UART MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ if(huart->Instance == LPUART1)
+ {
+ /* USER CODE BEGIN LPUART1_MspDeInit 0 */
+
+ /* USER CODE END LPUART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_LPUART1_CLK_DISABLE();
+
+ /* De-init GPIOs */
+ gpio_lld_lpuart_deInit();
+
+ /* LPUART1 DMA DeInit */
+ HAL_DMA_DeInit(huart->hdmatx);
+
+ /* LPUART1 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(LPUART1_IRQn);
+ /* USER CODE BEGIN LPUART1_MspDeInit 1 */
+
+ /* USER CODE END LPUART1_MspDeInit 1 */
+ }
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+ if(huart->Instance == USART1)
+ {
+ /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+ /* USER CODE END USART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART1_CLK_DISABLE();
+
+ /* De-init GPIOs */
+ gpio_lld_usart_deInit();
+
+
+ /* USART1 DMA DeInit */
+ HAL_DMA_DeInit(huart->hdmatx);
+
+ /* USART1 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(USART1_IRQn);
+ /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+ /* USER CODE END USART1_MspDeInit 1 */
+ }
+#endif
+}
+
+/**
+ * @}
+ */
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspInit 0 */
+
+ /* USER CODE END TIM2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ /* TIM2 interrupt Init */
+ HAL_NVIC_SetPriority(TIM2_IRQn, 3, 0);
+ HAL_NVIC_EnableIRQ(TIM2_IRQn);
+ /* USER CODE BEGIN TIM2_MspInit 1 */
+
+ /* USER CODE END TIM2_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+ /* USER CODE END TIM2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM2_CLK_DISABLE();
+
+ /* TIM2 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(TIM2_IRQn);
+ /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+ /* USER CODE END TIM2_MspDeInit 1 */
+ }
+
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+ if(hrtc->Instance==RTC)
+ {
+ /* USER CODE BEGIN RTC_MspInit 0 */
+ HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
+
+ /**
+ * Write twice the value to flush the APB-AHB bridge
+ * This bit shall be written in the register before writing the next one
+ */
+ HAL_PWR_EnableBkUpAccess();
+
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE); /**< Select LSI as RTC Input */
+ /* USER CODE END RTC_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_RTC_ENABLE();
+ __HAL_RCC_RTCAPB_CLK_ENABLE();
+ /* USER CODE BEGIN RTC_MspInit 1 */
+ HAL_RTCEx_EnableBypassShadow(hrtc);
+ /* USER CODE END RTC_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+ if(hrtc->Instance==RTC)
+ {
+ /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+ /* USER CODE END RTC_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_RTC_DISABLE();
+ __HAL_RCC_RTCAPB_CLK_DISABLE();
+ /* USER CODE BEGIN RTC_MspDeInit 1 */
+
+ /* USER CODE END RTC_MspDeInit 1 */
+ }
+
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_it.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_it.c
new file mode 100644
index 000000000..09fb8f08f
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_it.c
@@ -0,0 +1,323 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32wbxx_it.c
+ * @brief Interrupt Service Routines.
+ *******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "stm32wbxx_it.h"
+#include "gpio_lld.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+ gpio_lld_phy_gpioHardFault_up();
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32WBxx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32wbxx.s). */
+/******************************************************************************/
+/**
+ * @brief This function handles DMA1 channel4 global interrupt.
+ */
+void DMA1_Channel4_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel4_IRQn 0 */
+#if (CFG_HW_LPUART1_ENABLED == 1)
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+ HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
+#endif
+#endif
+ /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel4_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 channel4 global interrupt.
+ */
+void DMA1_Channel5_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel5_IRQn 0 */
+#if (CFG_HW_USART1_ENABLED == 1)
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+ HAL_DMA_IRQHandler(&hdma_usart1_tx);
+#endif
+#endif
+ /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel5_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USART1 global interrupt.
+ */
+void USART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART1_IRQn 0 */
+
+ /* USER CODE END USART1_IRQn 0 */
+#if (CFG_HW_USART1_ENABLED == 1)
+ HAL_UART_IRQHandler(&huart1);
+#endif
+ /* USER CODE BEGIN USART1_IRQn 1 */
+
+ /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles LPUART1 global interrupt.
+ */
+void LPUART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN LPUART1_IRQn 0 */
+
+ /* USER CODE END LPUART1_IRQn 0 */
+#if (CFG_HW_LPUART1_ENABLED == 1)
+ HAL_UART_IRQHandler(&hlpuart1);
+#endif
+ /* USER CODE BEGIN LPUART1_IRQn 1 */
+
+ /* USER CODE END LPUART1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles External line
+ * interrupt request.
+ * @param None
+ * @retval None
+ */
+void BUTTON_SW1_EXTI_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_SW1_PIN);
+}
+
+/**
+ * @brief This function handles External line
+ * interrupt request.
+ * @param None
+ * @retval None
+ */
+void BUTTON_SW2_EXTI_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_SW2_PIN);
+}
+
+/**
+ * @brief This function handles External line
+ * interrupt request.
+ * @param None
+ * @retval None
+ */
+void BUTTON_SW3_EXTI_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_SW3_PIN);
+}
+
+void RTC_WKUP_IRQHandler(void)
+{
+ HW_TS_RTC_Wakeup_Handler();
+}
+
+void IPCC_C1_TX_IRQHandler(void)
+{
+ HW_IPCC_Tx_Handler();
+
+ return;
+}
+
+void IPCC_C1_RX_IRQHandler(void)
+{
+ HW_IPCC_Rx_Handler();
+ return;
+}
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm_logging.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm_logging.c
new file mode 100644
index 000000000..40997ccd7
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm_logging.c
@@ -0,0 +1,213 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : stm_logging.c
+ * Description : This file contains all the defines and functions used
+ * for logging on Application examples.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/**
+ * @file
+ * This file implements logging functions to be used in Application examples.
+ *
+ */
+
+#include <ctype.h>
+#include <inttypes.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "app_conf.h"
+#include "stm_logging.h"
+
+#define LOG_PARSE_BUFFER_SIZE 256U
+
+#define LOG_TIMESTAMP_ENABLE 0
+#define LOG_REGION_ENABLE 1U
+#define LOG_RTT_COLOR_ENABLE 1U
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+#define RTT_COLOR_CODE_DEFAULT "\x1b[0m"
+#define RTT_COLOR_CODE_RED "\x1b[0;91m"
+#define RTT_COLOR_CODE_GREEN "\x1b[0;92m"
+#define RTT_COLOR_CODE_YELLOW "\x1b[0;93m"
+#define RTT_COLOR_CODE_CYAN "\x1b[0;96m"
+
+#else /* LOG_RTT_COLOR_ENABLE == 1 */
+#define RTT_COLOR_CODE_DEFAULT ""
+#define RTT_COLOR_CODE_RED ""
+#define RTT_COLOR_CODE_GREEN ""
+#define RTT_COLOR_CODE_YELLOW ""
+#define RTT_COLOR_CODE_CYAN ""
+#endif /* LOG_RTT_COLOR_ENABLE == 1 */
+
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for outputting code region string.
+ *
+ * @param[inout] aLogString Pointer to log buffer.
+ * @param[in] aMaxSize Maximum size of log buffer.
+ * @param[in] otLogRegion The region ID.
+ *
+ * @returns String with a log level color value.
+ */
+static inline uint16_t logRegion(char *aLogString, uint16_t aMaxSize,
+ appliLogRegion_t aLogRegion)
+{
+ char logRegionString[30U];
+
+ switch (aLogRegion)
+ {
+ case APPLI_LOG_REGION_GENERAL:
+ strcpy(logRegionString, "[M4 APPLICATION]");
+ break;
+ case APPLI_LOG_REGION_OPENTHREAD_API:
+ strcpy(logRegionString, "[M4 OPENTHREAD API]");
+ break;
+ case APPLI_LOG_REGION_OT_API_LINK:
+ strcpy(logRegionString, "[M4 LINK API]");
+ break;
+ case APPLI_LOG_REGION_OT_API_INSTANCE:
+ strcpy(logRegionString, "[M4 INSTANCE API]");
+ break;
+ case APPLI_LOG_REGION_OT_API_MESSAGE:
+ strcpy(logRegionString, "[M4 MESSAGE API]");
+ break;
+ default:
+ strcpy(logRegionString, "[M4]");
+ break;
+ }
+
+ return snprintf(aLogString, aMaxSize, "%s ", logRegionString);
+}
+#endif /* CFG_DEBUG_TRACE */
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for getting color of a given level log.
+ *
+ * @param[in] aLogLevel The log level.
+ *
+ * @returns String with a log level color value.
+ */
+static inline const char *levelToString(appliLogLevel_t aLogLevel)
+{
+ switch (aLogLevel)
+ {
+ case LOG_LEVEL_CRIT:
+ return RTT_COLOR_CODE_RED;
+
+ case LOG_LEVEL_WARN:
+ return RTT_COLOR_CODE_YELLOW;
+
+ case LOG_LEVEL_INFO:
+ return RTT_COLOR_CODE_GREEN;
+
+ case LOG_LEVEL_DEBG:
+ default:
+ return RTT_COLOR_CODE_DEFAULT;
+ }
+}
+#endif /* CFG_DEBUG_TRACE */
+
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for printing log level.
+ *
+ * @param[inout] aLogString Pointer to log buffer.
+ * @param[in] aMaxSize Maximum size of log buffer.
+ * @param[in] aLogLevel Log level.
+ *
+ * @returns Number of bytes successfully written to the log buffer.
+ */
+static inline uint16_t logLevel(char *aLogString, uint16_t aMaxSize,
+ appliLogLevel_t aLogLevel)
+{
+ return snprintf(aLogString, aMaxSize, "%s", levelToString(aLogLevel));
+}
+#endif /* CFG_DEBUG_TRACE */
+#endif /* LOG_RTT_COLOR_ENABLE */
+
+#if (LOG_TIMESTAMP_ENABLE == 1U)
+/**
+ * Function for printing actual timestamp.
+ *
+ * @param[inout] aLogString Pointer to the log buffer.
+ * @param[in] aMaxSize Maximum size of the log buffer.
+ *
+ * @returns Number of bytes successfully written to the log buffer.
+ */
+static inline uint16_t logTimestamp(char *aLogString, uint16_t aMaxSize)
+{
+ return snprintf(aLogString, aMaxSize, "%s[%010ld]", RTT_COLOR_CODE_DEFAULT,
+ otPlatAlarmMilliGetNow());
+}
+#endif /* LOG_TIMESTAMP_ENABLE */
+
+/**
+ * Function for printing application log
+ *
+ * @param[in] aLogLevel Log level.
+ * @param[in] aLogRegion The region ID.
+ * @param[in] aFormat User string format.
+ *
+ * @returns Number of bytes successfully written to the log buffer.
+ */
+void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...)
+{
+#if (CFG_DEBUG_TRACE != 0) /* Since the traces are disabled, there is nothing to print */
+ uint16_t length = 0;
+ char logString[LOG_PARSE_BUFFER_SIZE + 1U];
+
+#if (LOG_TIMESTAMP_ENABLE == 1U)
+ length += logTimestamp(logString, LOG_PARSE_BUFFER_SIZE);
+#endif
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+ /* Add level information */
+ length += logLevel(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+ aLogLevel);
+#endif
+
+#if (LOG_REGION_ENABLE == 1U)
+ /* Add Region information */
+ length += logRegion(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+ aLogRegion);
+#endif
+
+ /* Parse user string */
+ va_list paramList;
+ va_start(paramList, aFormat);
+ length += vsnprintf(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+ aFormat, paramList);
+ logString[length++] = '\r';
+ logString[length++] = '\n';
+ logString[length++] = 0;
+ va_end(paramList);
+
+ if (aLogLevel <= APPLI_CONFIG_LOG_LEVEL)
+ {
+ printf("%s", logString);
+ }else
+ {
+ /* Print nothing */
+ }
+#endif /* CFG_DEBUG_TRACE */
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/system_stm32wbxx.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/system_stm32wbxx.c
new file mode 100644
index 000000000..791008e1d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/Core/Src/system_stm32wbxx.c
@@ -0,0 +1,355 @@
+/**
+ ******************************************************************************
+ * @file system_stm32wbxx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32wbxx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the MSI (4 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32wbxx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | MSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 8
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_P | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_Q | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_R | NA
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for USB OTG FS, | Disabled
+ * SDIO and RNG clock |
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/Apache-2.0
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32WBxx_system
+ * @{
+ */
+
+/** @addtogroup stm32WBxx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32wbxx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (32000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
+#endif /* LSI_VALUE */
+
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Defines
+ * @{
+ */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+
+#define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = 4000000UL ; /*CPU1: M4 on MSI clock after startup (4MHz)*/
+
+ const uint32_t AHBPrescTable[16UL] = {1UL, 3UL, 5UL, 1UL, 1UL, 6UL, 10UL, 32UL, 2UL, 4UL, 8UL, 16UL, 64UL, 128UL, 256UL, 512UL};
+
+ const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
+
+ const uint32_t MSIRangeTable[16UL] = {100000UL, 200000UL, 400000UL, 800000UL, 1000000UL, 2000000UL, \
+ 4000000UL, 8000000UL, 16000000UL, 24000000UL, 32000000UL, 48000000UL, 0UL, 0UL, 0UL, 0UL}; /* 0UL values are incorrect cases */
+
+ const uint32_t SmpsPrescalerTable[4UL][6UL]={{1UL,3UL,2UL,2UL,1UL,2UL}, \
+ {2UL,6UL,4UL,3UL,2UL,4UL}, \
+ {4UL,12UL,8UL,6UL,4UL,8UL}, \
+ {4UL,12UL,8UL,6UL,4UL,8UL}};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32WBxx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+ /* Configure the Vector Table location add offset address ------------------*/
+#if defined(VECT_TAB_SRAM) && defined(VECT_TAB_BASE_ADDRESS)
+ /* program in SRAMx */
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAMx for CPU1 */
+#else /* program in FLASH */
+ SCB->VTOR = VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10UL*2UL))|(3UL << (11UL*2UL))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set MSION bit */
+ RCC->CR |= RCC_CR_MSION;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00070000U;
+
+ /* Reset PLLSAI1ON, PLLON, HSECSSON, HSEON, HSION, and MSIPLLON bits */
+ RCC->CR &= (uint32_t)0xFAF6FEFBU;
+
+ /*!< Reset LSI1 and LSI2 bits */
+ RCC->CSR &= (uint32_t)0xFFFFFFFAU;
+
+ /*!< Reset HSI48ON bit */
+ RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x22041000U;
+
+#if defined(STM32WB55xx)
+ /* Reset PLLSAI1CFGR register */
+ RCC->PLLSAI1CFGR = 0x22041000U;
+#endif
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= 0xFFFBFFFFU;
+
+ /* Disable all interrupts */
+ RCC->CIER = 0x00000000;
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) MSI_VALUE is a constant defined in stm32wbxx_hal.h file (default value
+ * 4 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32wbxx_hal_conf.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32wbxx_hal_conf.h file (default value
+ * 32 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, msirange, pllvco, pllr, pllsource , pllm;
+
+ /* Get MSI Range frequency--------------------------------------------------*/
+
+ /*MSI frequency range in Hz*/
+ msirange = MSIRangeTable[(RCC->CR & RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos];
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x00: /* MSI used as system clock source */
+ SystemCoreClock = msirange;
+ break;
+
+ case 0x04: /* HSI used as system clock source */
+ /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL ;
+
+ if(pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else if(pllsource == 0x03UL) /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ else /* MSI used as PLL clock source */
+ {
+ pllvco = (msirange / pllm);
+ }
+
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
+
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ SystemCoreClock = msirange;
+ break;
+ }
+
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK1 prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
+ /* HCLK clock frequency */
+ SystemCoreClock = SystemCoreClock / tmp;
+
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewd b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewd
new file mode 100644
index 000000000..290b215c5
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>BLE_LLD</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCVariant</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>MemOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32WB15.ddf</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadVerifyAll</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCProductVersion</name>
+ <state>7.10.3.6927</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>STLINK_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>8.20.2.14834</state>
+ </option>
+ <option>
+ <name>UseFlashLoader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CLowLevel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacFile2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CDevice</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>FlashLoadersV3</name>
+ <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32WB15xx.board</state>
+ </option>
+ <option>
+ <name>OCImagesSuppressCheck1</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesPath1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesSuppressCheck2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesPath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesSuppressCheck3</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesPath3</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OverrideDefFlashBoard</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesOffset1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesOffset2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesOffset3</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCImagesUse1</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesUse2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCImagesUse3</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDeviceConfigMacroFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDebuggerExtraOption</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCAllMTBOptions</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCMulticoreNrOfCores</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCMulticoreMaster</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCMulticorePort</name>
+ <state>53461</state>
+ </option>
+ <option>
+ <name>OCMulticoreWorkspace</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCMulticoreSlaveProject</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCMulticoreSlaveConfiguration</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadExtraImage</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCAttachSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MassEraseBeforeFlashing</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCSimEnablePSP</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspOverrideConfig</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspConfigFile</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CADI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCadiMemory</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Fast Model</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCADILogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCADILogFileEditB</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CMSISDAP_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>4</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CatchSFERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCIarProbeScriptFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CMSISDAPResetList</name>
+ <version>1</version>
+ <state>10</state>
+ </option>
+ <option>
+ <name>CMSISDAPHWResetDuration</name>
+ <state>300</state>
+ </option>
+ <option>
+ <name>CMSISDAPHWResetDelay</name>
+ <state>200</state>
+ </option>
+ <option>
+ <name>CMSISDAPDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CMSISDAPInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiTargetEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPJtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPRestoreBreakpointsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPUpdateBreakpointsEdit</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>RDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchUndef</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchData</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchPrefetch</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchMMERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchNOCPERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchCHKERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchSTATERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchBUSERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchINTERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchHARDERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiCPUEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPMultiCPUNumber</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeCfgOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeConfig</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CMSISDAPProbeConfigRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CMSISDAPSelectedCPUBehaviour</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ICpuName</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCJetEmuParams</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCCMSISDAPUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCCMSISDAPUsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>GDBSERVER_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJTagBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagUpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IJET_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>8</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CatchSFERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCIarProbeScriptFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetResetList</name>
+ <version>1</version>
+ <state>10</state>
+ </option>
+ <option>
+ <name>IjetHWResetDuration</name>
+ <state>300</state>
+ </option>
+ <option>
+ <name>IjetHWResetDelay</name>
+ <state>200</state>
+ </option>
+ <option>
+ <name>IjetPowerFromProbe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetPowerRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>IjetInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiTargetEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetScanChainNonARMDevices</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetIRLength</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetJtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetProtocolRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetSwoPin</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetCpuClockEdit</name>
+ <state>72.0</state>
+ </option>
+ <option>
+ <name>IjetSwoPrescalerList</name>
+ <version>1</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetRestoreBreakpointsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetUpdateBreakpointsEdit</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>RDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchUndef</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchData</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchPrefetch</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CatchMMERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchNOCPERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchCHKERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchSTATERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchBUSERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchINTERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchHARDERR</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeCfgOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCProbeConfig</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IjetProbeConfigRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiCPUEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetMultiCPUNumber</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetSelectedCPUBehaviour</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ICpuName</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCJetEmuParams</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetPreferETB</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IjetTraceSettingsList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IjetTraceSizeList</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>FlashBoardPathSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIjetUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCIjetUsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>16</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCCatchSFERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>1000</state>
+ </option>
+ <option>
+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>1000</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCScanChainNonARMDevices</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkIRLength</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkCommRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadioV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCUSBDevice</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkUpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>CCJLinkInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkResetList</name>
+ <version>6</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>CCJLinkInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchMMERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchNOCPERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchCHRERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchSTATERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchBUSERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchINTERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchHARDERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkScriptFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCJLinkUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCTcpIpAlt</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTcpIpSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCCpuClockEdit</name>
+ <state>72.0</state>
+ </option>
+ <option>
+ <name>CCSwoClockAuto</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSwoClockEdit</name>
+ <state>2000</state>
+ </option>
+ <option>
+ <name>OCJLinkTraceSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkTraceSourceDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkDeviceName</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>LMIFTDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>2</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>LmiftdiSpeed</name>
+ <state>500</state>
+ </option>
+ <option>
+ <name>CCLmiftdiDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLmiftdiLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCLmiFtdiInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLmiFtdiInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>PEMICRO_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>3</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCJPEMicroShowSettings</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>STLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>4</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCSTLinkInterfaceRadio</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCSTLinkInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkResetList</name>
+ <version>3</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>CCCpuClockEdit</name>
+ <state>32.0</state>
+ </option>
+ <option>
+ <name>CCSwoClockAuto</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSwoClockEdit</name>
+ <state>2000</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCSTLinkDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkUpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchMMERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchNOCPERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchCHRERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchSTATERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchBUSERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchINTERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchSFERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchHARDERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkCatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkUsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCSTLinkUsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkJtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSTLinkDAPNumber</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCSTLinkDebugAccessPortRadio</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>###Uninitialized###</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileEditB</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>TIFET_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCMSPFetResetList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetInterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetTargetVccTypeDefault</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetTargetVoltage</name>
+ <state>###Uninitialized###</state>
+ </option>
+ <option>
+ <name>CCMSPFetVCCDefault</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCMSPFetTargetSettlingtime</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetRadioJtagSpeedType</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCMSPFetConnection</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetUsbComPort</name>
+ <state>Automatic</state>
+ </option>
+ <option>
+ <name>CCMSPFetAllowAccessToBSL</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMSPFetLogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCMSPFetRadioEraseFlash</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>XDS100_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>6</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TIPackageOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>TIPackage</name>
+ <state></state>
+ </option>
+ <option>
+ <name>BoardFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$PROJ_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCXds100BreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100DoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100UpdateBreakpoints</name>
+ <state>_call_main</state>
+ </option>
+ <option>
+ <name>CCXds100CatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchCORERESET</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchMMERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchNOCPERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchCHRERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchSTATERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchBUSERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchINTERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchSFERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchHARDERR</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CatchDummy</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100CpuClockEdit</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCXds100SwoClockAuto</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100SwoClockEdit</name>
+ <state>1000</state>
+ </option>
+ <option>
+ <name>CCXds100HWResetDelay</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100ResetList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100UsbSerialNo</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCXds100UsbSerialNoSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100JtagSpeedList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100InterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100InterfaceCmdLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100ProbeList</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100SWOPortRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCXds100SWOPort</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+</project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewp b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewp
new file mode 100644
index 000000000..5d7606398
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.ewp
@@ -0,0 +1,1235 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>BLE_LLD</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>30</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>BLE_LLD/Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>BLE_LLD/Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>BLE_LLD/List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Full formatting, with multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Full formatting, with multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>4.41A</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.20.2.14834</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32WB15CC ST STM32WB15CC</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>26</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>26</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32WB15CC ST STM32WB15CC</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
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+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+ <group>
+ <name>Application</name>
+ <group>
+ <name>EWARM</name>
+ <file>
+ <name>$PROJ_DIR$\startup_stm32wb15xx_cm4.s</name>
+ </file>
+ </group>
+ <group>
+ <name>User</name>
+ <group>
+ <name>Core</name>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\app_entry.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\gpio_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\hw_uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\hw_timerserver.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\main.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm32_lpm_if.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm32wbxx_hal_msp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm32wbxx_it.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\stm_logging.c</name>
+ </file>
+ </group>
+ <group>
+ <name>STM32_WPAN</name>
+ <group>
+ <name>App</name>
+ <file>
+ <name>$PROJ_DIR$\..\STM32_WPAN\App\app_ble_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\STM32_WPAN\App\lowpower_app.c</name>
+ </file>
+ </group>
+ <group>
+ <name>Target</name>
+ <file>
+ <name>$PROJ_DIR$\..\STM32_WPAN\Target\hw_ipcc.c</name>
+ </file>
+ </group>
+ </group>
+ </group>
+ </group>
+ <group>
+ <name>Doc</name>
+ <file>
+ <name>$PROJ_DIR$\..\readme.txt</name>
+ </file>
+ </group>
+ <group>
+ <name>Drivers</name>
+ <group>
+ <name>BSP</name>
+ <group>
+ <name>NUCLEO-WB15CC</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\BSP\NUCLEO-WB15CC\nucleo_wb15cc.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>CMSIS</name>
+ <file>
+ <name>$PROJ_DIR$\..\Core\Src\system_stm32wbxx.c</name>
+ </file>
+ </group>
+ <group>
+ <name>STM32WBxx_HAL_Driver</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_cortex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_dma.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_dma_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_exti.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_flash.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_flash_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_gpio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_hsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_pwr.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_pwr_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_rcc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_rcc_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_tim.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_tim_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_uart_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_rtc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\STM32WBxx_HAL_Driver\Src\stm32wbxx_hal_rtc_ex.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>Middlewares</name>
+ <group>
+ <name>STM32_WPAN</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\ble_lld\hal\ble_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\ble_lld\lld\ble_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\dbg_trace.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\otp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\shci\shci.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\tl\shci_tl.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\tl\shci_tl_if.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\stm_list.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\stm_queue.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\interface\patterns\ble_thread\tl\tl_mbox.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>Utilities</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Utilities\lpm\tiny_lpm\stm32_lpm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Utilities\sequencer\stm32_seq.c</name>
+ </file>
+ </group>
+</project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.eww b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.eww
new file mode 100644
index 000000000..d67d8deec
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/BLE_LLD_Lowpower.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+ <project>
+ <path>$WS_DIR$\BLE_LLD_Lowpower.ewp</path>
+ </project>
+ <batchBuild />
+</workspace>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/startup_stm32wb15xx_cm4.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/startup_stm32wb15xx_cm4.s
new file mode 100644
index 000000000..de618745d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/startup_stm32wb15xx_cm4.s
@@ -0,0 +1,432 @@
+;******************************************************************************
+;* File Name : startup_stm32wb15xx_cm4.s
+;* Author : MCD Application Team
+;* Description : M4 core vector table of the STM32WB15xx devices for the
+;* IAR (EWARM) toolchain with support of standby.
+;*
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;******************************************************************************
+;* @attention
+;*
+;* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.</center></h2>
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD and PVM Interrupt
+ DCD TAMP_STAMP_LSECSS_IRQHandler ; RTC Tamper, TimeStamp Interrupts and LSECSS Interrupts
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup Interrupt
+ DCD FLASH_IRQHandler ; FLASH global Interrupt
+ DCD RCC_IRQHandler ; RCC Interrupt
+ DCD EXTI0_IRQHandler ; EXTI Line 0 Interrupt
+ DCD EXTI1_IRQHandler ; EXTI Line 1 Interrupt
+ DCD EXTI2_IRQHandler ; EXTI Line 2 Interrupt
+ DCD EXTI3_IRQHandler ; EXTI Line 3 Interrup
+ DCD EXTI4_IRQHandler ; EXTI Line 4 Interrupt
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 Interrupt
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 Interrupt
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 Interrupt
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 Interrupt
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 Interrupt
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 Interrupt
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 Interrupt
+ DCD ADC1_IRQHandler ; ADC1 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD C2SEV_PWR_C2H_IRQHandler ; CPU M0+ SEV Interrupt
+ DCD COMP_IRQHandler ; COMP1 Interrupts
+ DCD EXTI9_5_IRQHandler ; EXTI Lines [9:5] Interrupt
+ DCD TIM1_BRK_IRQHandler ; TIM1 Break Interrupt
+ DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
+ DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Communication Interrupts
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare Interrupt
+ DCD TIM2_IRQHandler ; TIM2 Global Interrupt
+ DCD PKA_IRQHandler ; PKA Interrupt
+ DCD I2C1_EV_IRQHandler ; I2C1 Event Interrupt
+ DCD I2C1_ER_IRQHandler ; I2C1 Error Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI1_IRQHandler ; SPI1 Interrupt
+ DCD 0 ; Reserved
+ DCD USART1_IRQHandler ; USART1 Interrupt
+ DCD LPUART1_IRQHandler ; LPUART1 Interrupt
+ DCD 0 ; Reserved
+ DCD TSC_IRQHandler ; TSC Interrupt
+ DCD EXTI15_10_IRQHandler ; EXTI Lines1[15:10 ]Interrupts
+ DCD RTC_Alarm_IRQHandler ; RTC Alarms (A and B) Interrupt
+ DCD 0 ; Reserved
+ DCD PWR_SOTF_BLEACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR
+ DCD IPCC_C1_RX_IRQHandler ; IPCC CPU1 RX occupied interrupt
+ DCD IPCC_C1_TX_IRQHandler ; IPCC CPU1 RX free interrupt
+ DCD HSEM_IRQHandler ; HSEM0 Interrupt
+ DCD LPTIM1_IRQHandler ; LPTIM1 Interrupt
+ DCD LPTIM2_IRQHandler ; LPTIM2 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD AES2_IRQHandler ; AES2 Interrupt
+ DCD RNG_IRQHandler ; RNG1 Interrupt
+ DCD FPU_IRQHandler ; FPU Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMAMUX1_OVR_IRQHandler ; DMAMUX overrun Interrupt
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK TAMP_STAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TAMP_STAMP_LSECSS_IRQHandler
+ B TAMP_STAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_IRQHandler
+ B ADC1_IRQHandler
+
+ PUBWEAK C2SEV_PWR_C2H_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+C2SEV_PWR_C2H_IRQHandler
+ B C2SEV_PWR_C2H_IRQHandler
+
+ PUBWEAK COMP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP_IRQHandler
+ B COMP_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_IRQHandler
+ B TIM1_BRK_IRQHandler
+
+ PUBWEAK TIM1_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_IRQHandler
+ B TIM1_UP_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_IRQHandler
+ B TIM1_TRG_COM_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK PKA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PKA_IRQHandler
+ B PKA_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK TSC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TSC_IRQHandler
+ B TSC_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ B PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+
+ PUBWEAK IPCC_C1_RX_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+IPCC_C1_RX_IRQHandler
+ B IPCC_C1_RX_IRQHandler
+
+ PUBWEAK IPCC_C1_TX_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+IPCC_C1_TX_IRQHandler
+ B IPCC_C1_TX_IRQHandler
+
+ PUBWEAK HSEM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HSEM_IRQHandler
+ B HSEM_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK LPTIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM2_IRQHandler
+ B LPTIM2_IRQHandler
+
+ PUBWEAK AES2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+AES2_IRQHandler
+ B AES2_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK DMAMUX1_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX1_OVR_IRQHandler
+ B DMAMUX1_OVR_IRQHandler
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/stm32wb15xx_flash_cm4.icf b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/stm32wb15xx_flash_cm4.icf
new file mode 100644
index 000000000..9888197af
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/EWARM/stm32wb15xx_flash_cm4.icf
@@ -0,0 +1,42 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+/***** FLASH Part dedicated to M4 *****/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0801B800;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000008;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20002FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__ = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __ICFEDIT_region_RAM_SHARED_start__ = 0x20030000;
+define symbol __ICFEDIT_region_RAM_SHARED_end__ = 0x200327FF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM_SHARED_region = mem:[from __ICFEDIT_region_RAM_SHARED_start__ to __ICFEDIT_region_RAM_SHARED_end__];
+define region Total_RAM_region = RAM_region | RAM_SHARED_region ;
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+/* MB_MEM1 and MB_MEM2 are sections reserved to mailbox communication. It is placed in the shared memory */
+initialize by copy { readwrite };
+do not initialize { section .noinit,
+ section MAPPING_TABLE,
+ section MB_MEM1 };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { block CSTACK, block HEAP };
+place in Total_RAM_region { readwrite };
+place in RAM_SHARED_region { first section MAPPING_TABLE};
+place in RAM_SHARED_region { section MB_MEM1};
+place in RAM_SHARED_region { section MB_MEM2};
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx
new file mode 100644
index 000000000..78577bf71
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx
@@ -0,0 +1,829 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>BLE_LLD</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath></ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>18</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>1</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>6</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32WB1x_320_M4 -FS08000000 -FL050000 -FP0($$Device:STM32WB15CCUx$Drivers\CMSIS\Flash\STM32WB1x_320_M4.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ST-LINKIII-KEIL_SWO</Key>
+ <Name>-U066AFF363730554157104150 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32WB1x_320_M4.FLM -FS08000000 -FL050000 -FP0($$Device:STM32WB15CCUx$Drivers\CMSIS\Flash\STM32WB1x_320_M4.FLM)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>1</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Application/MDK-ARM</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>2</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>startup_stm32wb15xx_cm4.s</PathWithFileName>
+ <FilenameWithoutPath>startup_stm32wb15xx_cm4.s</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Application/User/Core</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/app_entry.c</PathWithFileName>
+ <FilenameWithoutPath>app_entry.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/gpio_lld.c</PathWithFileName>
+ <FilenameWithoutPath>gpio_lld.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
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+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/hw_uart.c</PathWithFileName>
+ <FilenameWithoutPath>hw_uart.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
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+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
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+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/hw_timerserver.c</PathWithFileName>
+ <FilenameWithoutPath>hw_timerserver.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/main.c</PathWithFileName>
+ <FilenameWithoutPath>main.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>7</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm32_lpm_if.c</PathWithFileName>
+ <FilenameWithoutPath>stm32_lpm_if.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
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+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm32wbxx_hal_msp.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal_msp.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
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+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
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+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm32wbxx_it.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_it.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
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+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
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+ <FileType>1</FileType>
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+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm_logging.c</PathWithFileName>
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+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/App</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
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+ <File>
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+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../STM32_WPAN/App/app_ble_lld.c</PathWithFileName>
+ <FilenameWithoutPath>app_ble_lld.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>3</GroupNumber>
+ <FileNumber>12</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../STM32_WPAN/App/lowpower_app.c</PathWithFileName>
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+ <RteFlg>0</RteFlg>
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+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/Target</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>4</GroupNumber>
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+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../STM32_WPAN/Target/hw_ipcc.c</PathWithFileName>
+ <FilenameWithoutPath>hw_ipcc.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Doc</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>5</GroupNumber>
+ <FileNumber>14</FileNumber>
+ <FileType>5</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../readme.txt</PathWithFileName>
+ <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Drivers/BSP/NUCLEO-WB15CC</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>15</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../../../../../Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</PathWithFileName>
+ <FilenameWithoutPath>nucleo_wb15cc.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Drivers/CMSIS</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>7</GroupNumber>
+ <FileNumber>16</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/system_stm32wbxx.c</PathWithFileName>
+ <FilenameWithoutPath>system_stm32wbxx.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Drivers/STM32WBxx_HAL_Driver</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>8</GroupNumber>
+ <FileNumber>17</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>8</GroupNumber>
+ <FileNumber>18</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal_cortex.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>8</GroupNumber>
+ <FileNumber>19</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal_dma.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>8</GroupNumber>
+ <FileNumber>20</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal_dma_ex.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
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+ </File>
+ <File>
+ <GroupNumber>8</GroupNumber>
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+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal_exti.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>8</GroupNumber>
+ <FileNumber>22</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
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diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvprojx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvprojx
new file mode 100644
index 000000000..41a7baa47
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvprojx
@@ -0,0 +1,704 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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+ <SchemaVersion>2.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
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+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x3000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x8000000</StartAddress>
+ <Size>0x50000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x8000000</StartAddress>
+ <Size>0x50000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x3000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>1</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>2</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>1</uC99>
+ <uGnu>0</uGnu>
+ <useXO>0</useXO>
+ <v6Lang>5</v6Lang>
+ <v6LangP>3</v6LangP>
+ <vShortEn>1</vShortEn>
+ <vShortWch>1</vShortWch>
+ <v6Lto>0</v6Lto>
+ <v6WtE>0</v6WtE>
+ <v6Rtti>0</v6Rtti>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>CORE_CM4,USE_HAL_DRIVER,STM32WB15xx,USE_STM32WBXX_NUCLEO,BLE_LLD_WB,BLE_LLD_LP</Define>
+ <Undefine></Undefine>
+ <IncludePath>../Core/Inc;../STM32_WPAN/App;../STM32_WPAN/Target;../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/NUCLEO-WB15CC;../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc;../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy;../../../../../../Utilities/lpm/tiny_lpm;../../../../../../Utilities/sequencer;../../../../../../Middlewares/ST/STM32_WPAN;../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal;../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld;../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread;../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl;../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci;../../../../../../Middlewares/ST/STM32_WPAN/utilities;../../../../../../Middlewares/ST/STM32_WPAN/ble;../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template;../../../../../../Middlewares/ST/STM32_WPAN/ble/core</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <ClangAsOpt>4</ClangAsOpt>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange></TextAddressRange>
+ <DataAddressRange></DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile>stm32wb15xx_flash_cm4.sct</ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc>--diag_suppress L6314W
+--diag_suppress 1296</Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Application/MDK-ARM</GroupName>
+ <Files>
+ <File>
+ <FileName>startup_stm32wb15xx_cm4.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>startup_stm32wb15xx_cm4.s</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Application/User/Core</GroupName>
+ <Files>
+ <File>
+ <FileName>app_entry.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/app_entry.c</FilePath>
+ </File>
+ <File>
+ <FileName>gpio_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/gpio_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>hw_uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/hw_uart.c</FilePath>
+ </File>
+ <File>
+ <FileName>hw_timerserver.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/hw_timerserver.c</FilePath>
+ </File>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/main.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_lpm_if.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm32_lpm_if.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_msp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm32wbxx_hal_msp.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_it.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm32wbxx_it.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm_logging.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/stm_logging.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/App</GroupName>
+ <Files>
+ <File>
+ <FileName>app_ble_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../STM32_WPAN/App/app_ble_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>lowpower_app.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../STM32_WPAN/App/lowpower_app.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/Target</GroupName>
+ <Files>
+ <File>
+ <FileName>hw_ipcc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../STM32_WPAN/Target/hw_ipcc.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Doc</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>../readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers/BSP/NUCLEO-WB15CC</GroupName>
+ <Files>
+ <File>
+ <FileName>nucleo_wb15cc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers/CMSIS</GroupName>
+ <Files>
+ <File>
+ <FileName>system_stm32wbxx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../Core/Src/system_stm32wbxx.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers/STM32WBxx_HAL_Driver</GroupName>
+ <Files>
+ <File>
+ <FileName>stm32wbxx_hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_cortex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_dma_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_exti.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_flash.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_flash_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_gpio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_hsem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_pwr.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_pwr_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_rcc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_rcc_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_tim.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_tim_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_uart_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_rtc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32wbxx_hal_rtc_ex.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Middlewares/STM32_WPAN</GroupName>
+ <Files>
+ <File>
+ <FileName>ble_hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal/ble_hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>ble_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld/ble_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>dbg_trace.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c</FilePath>
+ </File>
+ <File>
+ <FileName>otp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/otp.c</FilePath>
+ </File>
+ <File>
+ <FileName>shci.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c</FilePath>
+ </File>
+ <File>
+ <FileName>shci_tl.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c</FilePath>
+ </File>
+ <File>
+ <FileName>shci_tl_if.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm_list.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_list.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm_queue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_queue.c</FilePath>
+ </File>
+ <File>
+ <FileName>tl_mbox.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Utilities</GroupName>
+ <Files>
+ <File>
+ <FileName>stm32_lpm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Utilities/lpm/tiny_lpm/stm32_lpm.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_seq.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../../../../../Utilities/sequencer/stm32_seq.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components>
+ <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+ <targetInfos>
+ <targetInfo name="BLE_LLD"/>
+ </targetInfos>
+ </component>
+ </components>
+ <files/>
+ </RTE>
+
+ <LayerInfo>
+ <Layers>
+ <Layer>
+ <LayName>&lt;Project Info&gt;</LayName>
+ <LayDesc></LayDesc>
+ <LayUrl></LayUrl>
+ <LayKeys></LayKeys>
+ <LayCat></LayCat>
+ <LayLic></LayLic>
+ <LayTarg>0</LayTarg>
+ <LayPrjMark>1</LayPrjMark>
+ </Layer>
+ </Layers>
+ </LayerInfo>
+
+</Project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s
new file mode 100644
index 000000000..7794948c3
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s
@@ -0,0 +1,336 @@
+;******************************************************************************
+;* File Name : startup_stm32wb15xx_cm4.s
+;* Author : MCD Application Team
+;* Description : STM32WB15xx devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the CortexM4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics. All rights reserved.
+;*
+;* This software component is licensed by ST under Apache License, Version 2.0,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/Apache-2.0
+;*
+;******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD and PVM detector
+ DCD TAMP_STAMP_LSECSS_IRQHandler ; RTC Tamper and TimeStamp Interrupts and LSECSS Interrupts
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup Interrupt
+ DCD FLASH_IRQHandler ; FLASH global Interrupt
+ DCD RCC_IRQHandler ; RCC Interrupt
+ DCD EXTI0_IRQHandler ; EXTI Line 0 Interrupt
+ DCD EXTI1_IRQHandler ; EXTI Line 1 Interrupt
+ DCD EXTI2_IRQHandler ; EXTI Line 2 Interrupt
+ DCD EXTI3_IRQHandler ; EXTI Line 3 Interrup
+ DCD EXTI4_IRQHandler ; EXTI Line 4 Interrupt
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 Interrupt
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 Interrupt
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 Interrupt
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 Interrupt
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 Interrupt
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 Interrupt
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 Interrupt
+ DCD ADC1_IRQHandler ; ADC1 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD C2SEV_PWR_C2H_IRQHandler ; CPU M0+ SEV Interrupt
+ DCD COMP_IRQHandler ; COMP1 Interrupts
+ DCD EXTI9_5_IRQHandler ; EXTI Lines [9:5] Interrupt
+ DCD TIM1_BRK_IRQHandler ; TIM1 Break Interrupt
+ DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
+ DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Communication Interrupts
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare Interrupt
+ DCD TIM2_IRQHandler ; TIM2 Global Interrupt
+ DCD PKA_IRQHandler ; PKA Interrupt
+ DCD I2C1_EV_IRQHandler ; I2C1 Event Interrupt
+ DCD I2C1_ER_IRQHandler ; I2C1 Error Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI1_IRQHandler ; SPI1 Interrupt
+ DCD 0 ; Reserved
+ DCD USART1_IRQHandler ; USART1 Interrupt
+ DCD LPUART1_IRQHandler ; LPUART1 Interrupt
+ DCD 0 ; Reserved
+ DCD TSC_IRQHandler ; TSC Interrupt
+ DCD EXTI15_10_IRQHandler ; EXTI Lines1[15:10 ]Interrupts
+ DCD RTC_Alarm_IRQHandler ; RTC Alarms (A and B) Interrupt
+ DCD 0 ; Reserved
+ DCD PWR_SOTF_BLEACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR
+ DCD IPCC_C1_RX_IRQHandler ; IPCC CPU1 RX occupied interrupt
+ DCD IPCC_C1_TX_IRQHandler ; IPCC CPU1 RX free interrupt
+ DCD HSEM_IRQHandler ; HSEM0 Interrupt
+ DCD LPTIM1_IRQHandler ; LPTIM1 Interrupt
+ DCD LPTIM2_IRQHandler ; LPTIM2 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD AES2_IRQHandler ; AES2 Interrupt
+ DCD RNG_IRQHandler ; RNG1 Interrupt
+ DCD FPU_IRQHandler ; FPU Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMAMUX1_OVR_IRQHandler ; DMAMUX overrun Interrupt
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT TAMP_STAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_IRQHandler [WEAK]
+ EXPORT C2SEV_PWR_C2H_IRQHandler [WEAK]
+ EXPORT COMP_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_IRQHandler [WEAK]
+ EXPORT TIM1_UP_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT PKA_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT TSC_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT PWR_SOTF_BLEACT_RFPHASE_IRQHandler [WEAK]
+ EXPORT IPCC_C1_RX_IRQHandler [WEAK]
+ EXPORT IPCC_C1_TX_IRQHandler [WEAK]
+ EXPORT HSEM_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT LPTIM2_IRQHandler [WEAK]
+ EXPORT AES1_IRQHandler [WEAK]
+ EXPORT AES2_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+C2SEV_PWR_C2H_IRQHandler
+COMP_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_IRQHandler
+TIM1_UP_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+PKA_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+SPI1_IRQHandler
+USART1_IRQHandler
+LPUART1_IRQHandler
+TSC_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+IPCC_C1_RX_IRQHandler
+IPCC_C1_TX_IRQHandler
+HSEM_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+AES1_IRQHandler
+AES2_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+DMAMUX1_OVR_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct
new file mode 100644
index 000000000..28aca4068
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct
@@ -0,0 +1,21 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x0001B800 { ; load region size_region
+ ER_IROM1 0x08000000 0x0001B800 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000008 0x2FF8 { ; RW data
+ .ANY (+RW +ZI)
+ }
+ RW_RAM_SHARED 0x20030000 0x2800 { ; RW data
+ *(MAPPING_TABLE)
+ *(MB_MEM1)
+ *(MB_MEM2)
+ }
+ }
+
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.cproject b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..4ae41eb10
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.cproject
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1254129982">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1254129982" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1254129982" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+ <folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1254129982." name="/" resourcePath="">
+ <toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2100182353" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.955356650" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32WB15CCUx" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1867830107" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1211229049" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2016775467" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.105898202" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1023566420" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="NUCLEO-WB15CC" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.370605789" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.4 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-WB15CC || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../Core/Inc | ../../STM32_WPAN/App | ../../STM32_WPAN/Target | ../../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include | ../../../../../../../Drivers/CMSIS/Include | ../../../../../../../Drivers/BSP/NUCLEO-WB15CC | ../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc | ../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/lpm/tiny_lpm | ../../../../../../../Utilities/sequencer | ../../../../../../../Middlewares/ST/STM32_WPAN | ../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal | ../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci | ../../../../../../../Middlewares/ST/STM32_WPAN/utilities | ../../../../../../../Middlewares/ST/STM32_WPAN/ble | ../../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template | ../../../../../../../Middlewares/ST/STM32_WPAN/ble/core || || || CORE_CM4 | BLE_LLD_WB | USE_HAL_DRIVER | BLE_LLD_LP | STM32WB15xx | USE_STM32WBXX_NUCLEO || || || || || ${workspace_loc:/${ProjName}/STM32WB15CCUX_FLASH.ld} || true || NonSecure || || || || None" valueType="string"/>
+ <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1360340110" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+ <builder buildPath="${workspace_loc:/BLE_LLD_Lowpower}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.736897164" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1495440149" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.973353270" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+ <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1630306869" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+ </tool>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.50534688" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.244188178" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+ <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.654131711" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="DEBUG"/>
+ <listOptionValue builtIn="false" value="CORE_CM4"/>
+ <listOptionValue builtIn="false" value="BLE_LLD_WB"/>
+ <listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+ <listOptionValue builtIn="false" value="BLE_LLD_LP"/>
+ <listOptionValue builtIn="false" value="STM32WB15xx"/>
+ <listOptionValue builtIn="false" value="USE_STM32WBXX_NUCLEO"/>
+ </option>
+ <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.652845535" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+ <listOptionValue builtIn="false" value="../../STM32_WPAN/App"/>
+ <listOptionValue builtIn="false" value="../../STM32_WPAN/Target"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/NUCLEO-WB15CC"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc"/>
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+ <listOptionValue builtIn="false" value="../../../../../../../Utilities/lpm/tiny_lpm"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Utilities/sequencer"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/utilities"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/ble"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_WPAN/ble/core"/>
+ </option>
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+ </tool>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.903607362" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+ </tool>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.500171998" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1000814889" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32WB15CCUX_FLASH.ld}" valueType="string"/>
+ <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1054481485" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+ <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+ <additionalInput kind="additionalinput" paths="$(LIBS)"/>
+ </inputType>
+ </tool>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1061104637" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1701173748" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.84117802" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.2085473029" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1930004336" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1758260728" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1697468495" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+ </toolChain>
+ </folderInfo>
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diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.project b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.project
new file mode 100644
index 000000000..77c824327
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/.project
@@ -0,0 +1,264 @@
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+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_tim.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_tim_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_uart.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_uart_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/ble_hal.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/ble_lld/hal/ble_hal.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/ble_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/ble_lld/lld/ble_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/dbg_trace.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/otp.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/otp.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/shci.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/shci_tl.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/shci_tl_if.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/stm_list.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/stm_list.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/stm_queue.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/stm_queue.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/tl_mbox.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/app_entry.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/app_entry.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/gpio_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/gpio_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/hw_timerserver.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/hw_timerserver.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/hw_uart.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/hw_uart.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/main.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/main.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32_lpm_if.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32_lpm_if.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32wbxx_hal_msp.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32wbxx_hal_msp.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32wbxx_it.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32wbxx_it.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm_logging.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm_logging.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/App/app_ble_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/App/app_ble_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/App/lowpower_app.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/App/lowpower_app.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/Target/hw_ipcc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/Target/hw_ipcc.c</locationURI>
+ </link>
+ </linkedResources>
+</projectDescription>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s
new file mode 100644
index 000000000..58cc21a82
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s
@@ -0,0 +1,394 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32wb15xx_cm4.s
+ * @author MCD Application Team
+ * @brief STM32WB15xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+* This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/Apache-2.0
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+/* start address for the .MB_MEM2 section. defined in linker script */
+.word _sMB_MEM2
+/* end address for the .MB_MEM2 section. defined in linker script */
+.word _eMB_MEM2
+
+/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
+.macro INIT_BSS start, end
+ ldr r0, =\start
+ ldr r1, =\end
+ movs r3, #0
+ bl LoopFillZerobss
+.endm
+
+/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
+.macro INIT_DATA start, end, src
+ ldr r0, =\start
+ ldr r1, =\end
+ ldr r2, =\src
+ movs r3, #0
+ bl LoopCopyDataInit
+.endm
+
+.section .text.data_initializers
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+ bx lr
+
+FillZerobss:
+ str r3, [r0]
+ adds r0, r0, #4
+
+LoopFillZerobss:
+ cmp r0, r1
+ bcc FillZerobss
+ bx lr
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+/* Call the clock system intitialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ INIT_DATA _sdata, _edata, _sidata
+
+/* Zero fill the bss segments. */
+ INIT_BSS _sbss, _ebss
+ INIT_BSS _sMB_MEM2, _eMB_MEM2
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application s entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word TAMP_STAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_IRQHandler
+ .word 0
+ .word 0
+ .word C2SEV_PWR_C2H_IRQHandler
+ .word COMP_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_IRQHandler
+ .word TIM1_UP_IRQHandler
+ .word TIM1_TRG_COM_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word PKA_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word 0
+ .word 0
+ .word SPI1_IRQHandler
+ .word 0
+ .word USART1_IRQHandler
+ .word LPUART1_IRQHandler
+ .word 0
+ .word TSC_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word 0
+ .word PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ .word IPCC_C1_RX_IRQHandler
+ .word IPCC_C1_TX_IRQHandler
+ .word HSEM_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word LPTIM2_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word AES2_IRQHandler
+ .word RNG_IRQHandler
+ .word FPU_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word DMAMUX1_OVR_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak TAMP_STAMP_LSECSS_IRQHandler
+ .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_IRQHandler
+ .thumb_set ADC1_IRQHandler,Default_Handler
+
+ .weak C2SEV_PWR_C2H_IRQHandler
+ .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
+
+ .weak COMP_IRQHandler
+ .thumb_set COMP_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_IRQHandler
+ .thumb_set TIM1_BRK_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_IRQHandler
+ .thumb_set TIM1_UP_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_IRQHandler
+ .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak PKA_IRQHandler
+ .thumb_set PKA_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak TSC_IRQHandler
+ .thumb_set TSC_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ .thumb_set PWR_SOTF_BLEACT_RFPHASE_IRQHandler,Default_Handler
+
+ .weak IPCC_C1_RX_IRQHandler
+ .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
+
+ .weak IPCC_C1_TX_IRQHandler
+ .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
+
+ .weak HSEM_IRQHandler
+ .thumb_set HSEM_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak LPTIM2_IRQHandler
+ .thumb_set LPTIM2_IRQHandler,Default_Handler
+
+ .weak AES2_IRQHandler
+ .thumb_set AES2_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak DMAMUX1_OVR_IRQHandler
+ .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/syscalls.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/syscalls.c
new file mode 100644
index 000000000..4ec95844d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/syscalls.c
@@ -0,0 +1,159 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+//#undef errno
+extern int errno;
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+register char * stack_ptr asm("sp");
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/sysmem.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/sysmem.c
new file mode 100644
index 000000000..d7cc52cd4
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/Application/User/Core/sysmem.c
@@ -0,0 +1,80 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/STM32WB15CCUX_FLASH.ld b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/STM32WB15CCUX_FLASH.ld
new file mode 100644
index 000000000..8f86b87c9
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32CubeIDE/STM32WB15CCUX_FLASH.ld
@@ -0,0 +1,179 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : STM32CubeIDE
+**
+** Abstract : Linker script for STM32WB15xC Device
+** 320Kbytes FLASH
+** 48Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+** All rights reserved.</center></h2>
+**
+** This software component is licensed by ST under BSD 3-Clause license,
+** the "License"; You may not use this file except in compliance with the
+** License. You may obtain a copy of the License at:
+** opensource.org/licenses/BSD-3-Clause
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20003000; /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200 ; /* required amount of heap */
+_Min_Stack_Size = 0x400 ; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 110K
+RAM1 (xrw) : ORIGIN = 0x20000008, LENGTH = 0x2FF8
+RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
+}
+
+/* Define output sections */
+SECTIONS
+{
+ /* The startup code goes first into FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data goes into FLASH */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+ .ARM : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH
+
+ /* used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections goes into RAM, load LMA copy after code */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM1 AT> FLASH
+
+
+ /* Uninitialized data section */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM1
+
+ /* User_heap_stack section, used to check that there is enough RAM left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM1
+
+
+
+ /* Remove information from the standard libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+ MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
+ MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
+ MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
+}
+
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.c
new file mode 100644
index 000000000..ea1573ea1
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.c
@@ -0,0 +1,390 @@
+/**
+ ******************************************************************************
+ * File Name : app_ble_lld.c
+ * Description : application utilities.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/**
+ * This file provides low level utilities for application:
+ * - IPCC for communication with radio MCU
+ * - UART management
+ * - error handling
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdbool.h>
+#include "app_common.h"
+#include "utilities_common.h"
+#include "app_entry.h"
+#include "dbg_trace.h"
+#include "tl.h"
+#include "shci.h"
+#include "stm_logging.h"
+#include "stm32_lpm.h"
+#include "stm32_seq.h"
+#include "gpio_lld.h"
+#include "stm_queue.h"
+#include "ble_lld.h"
+#include "app_ble_lld.h"
+
+/* Private includes ----------------------------------------------------------*/
+
+/* Private typedef -----------------------------------------------------------*/
+/*
+ * List of all errors tracked by the application
+ * running on M4. Some of these errors may be fatal
+ * or just warnings
+ */
+typedef enum
+{
+ ERR_BLE_LLD_SET_STATE_CB,
+ ERR_BLE_LLD_ERASE_PERSISTENT_INFO,
+ ERR_BLE_LLD_CHECK_WIRELESS
+} ErrAppBleLldIdEnum_t;
+
+/* Private defines -----------------------------------------------------------*/
+#define UART_BUFFER_SIZE 64
+#define TX_BUFFER_SIZE 268
+#define UART_TX_CHUNK_SIZE 16
+#define UART_LINE_END "\r\n"
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+static void uartTxSendChunk(void);
+static void uartRxCpltCallback(void);
+static void m0CmdProcess(void);
+
+/* Private variables ---------------------------------------------------------*/
+static queue_t uartTxBuf;
+static uint8_t uartTxBufData[TX_BUFFER_SIZE];
+
+static bool txBusy = false;
+
+static char uartRxBuf;
+static void(*uartRxUserCb)(char);
+
+// IPCC configuration
+PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static TL_BLE_LLD_Config_t BleLldConfigBuffer;
+
+// Shared memory used by IPCC to send/receive messages to/from M0
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t BleLldM0CmdPacket;
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t BleLldCmdRspPacket;
+
+/* Shared memory used to send/receive data and parameters to/from M0 because
+ IPCC messages have a limited size */
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static msg_BLE_LLD_t bleparam_BLE_LLD_Packet;
+
+// Shared buffers for packet transmission and reception, separate buffers are needed because radio
+PLACE_IN_SECTION("MB_MEM2") static ipBLE_lld_txrxdata_Type txBuffer;
+PLACE_IN_SECTION("MB_MEM2") static ipBLE_lld_txrxdata_Type rxBuffer;
+
+
+/* Functions Definition ------------------------------------------------------*/
+
+void APP_BLE_LLD_Init(void)
+{
+ uint32_t devId = HAL_GetDEVID();
+ uint32_t revId = HAL_GetREVID();
+ uint8_t param[8];
+ SHCI_CmdStatus_t LldTestsInitStatus;
+
+ /* Initialize transport layer */
+ BleLldConfigBuffer.p_BleLldCmdRspBuffer = (uint8_t*)&BleLldCmdRspPacket;
+ BleLldConfigBuffer.p_BleLldM0CmdBuffer = (uint8_t*)&BleLldM0CmdPacket;
+ TL_BLE_LLD_Init(&BleLldConfigBuffer);
+
+ APP_BLE_LLD_Init_UART();
+
+ /* Send LLD tests start information to UART */
+ uartWrite("");
+ uartWrite("================================");
+ uartWrite("RF BLE LLD");
+ uartWrite("================================");
+#if (CFG_DEBUGGER_SUPPORTED == 0U)
+ uartWrite("Debugger de-activated");
+#endif
+#if (( CFG_DEBUG_TRACE_FULL == 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ))
+ uartWrite("Trace is de-activated");
+#endif
+
+ APP_DBG("Test appli initialized on M4, waiting for M0 initialization");
+
+ /* Send start cmd to M0 (with device and revision ID as parameters */
+ memcpy(&param[0], &devId, sizeof(devId));
+ memcpy(&param[4], &revId, sizeof(revId));
+ LldTestsInitStatus = SHCI_C2_BLE_LLD_Init(sizeof(param), param);
+ if(LldTestsInitStatus != SHCI_Success){
+ APP_DBG("!! ERROR during M0 init !!");
+ }else{
+ APP_DBG("M0 initialized");
+ }
+
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_CMD_FROM_M0_TO_M4, UTIL_SEQ_RFU, m0CmdProcess);
+
+ BLE_LLD_PRX_Init(&bleparam_BLE_LLD_Packet.params,
+ &txBuffer,
+ &rxBuffer,
+ APP_BLE_LLD_SendCmdM0);
+}
+
+/**
+ * @brief Warn the user that an error has occurred.In this case,
+ * the LEDs on the Board will start blinking.
+ * @param ErrId :
+ * @param ErrCode
+ * @retval None
+ */
+void APP_BLE_LLD_Error(uint32_t ErrId, uint32_t ErrCode)
+{
+ char *msg;
+ switch(ErrId)
+ {
+ case ERR_BLE_LLD_SET_STATE_CB: msg = "ERROR: ERR_BLE_LLD_SET_STATE_CB"; break;
+ case ERR_BLE_LLD_ERASE_PERSISTENT_INFO: msg = "ERROR: ERR_BLE_BLE_LLD_ERASE_PERSISTENT_INFO"; break;
+ case ERR_BLE_LLD_CHECK_WIRELESS: msg = "ERROR: ERR_BLE_LLD_CHECK_WIRELESS "; break;
+ default: msg = "ERROR Unknown "; break;
+ }
+ APP_DBG("**** Fatal error = %s (Err = %d)", msg, ErrCode);
+ while(true)
+ {
+ BSP_LED_Toggle(LED1);
+ HAL_Delay(500U);
+ BSP_LED_Toggle(LED2);
+ HAL_Delay(500U);
+ BSP_LED_Toggle(LED3);
+ HAL_Delay(500U);
+ }
+}
+
+/**
+ * @brief Check if the Coprocessor Wireless Firmware loaded supports Thread
+ * and display associated informations
+ * @param None
+ * @retval None
+ */
+void CheckWirelessFirmwareInfo(void)
+{
+ WirelessFwInfo_t wireless_info_instance;
+ WirelessFwInfo_t* p_wireless_info = &wireless_info_instance;
+ if (SHCI_GetWirelessFwInfo(p_wireless_info) != SHCI_Success)
+ {
+ APP_BLE_LLD_Error(ERR_BLE_LLD_CHECK_WIRELESS, 0);
+ }
+ else
+ {
+ APP_DBG("**********************************************************");
+ APP_DBG("Loaded M0 TEST FW info:");
+ switch(p_wireless_info->StackType)
+ {
+ case INFO_STACK_TYPE_BLE_PHY_VALID :
+ APP_DBG(" M0 FW Type: BLE and radio PHY validation");
+ break;
+
+ default :
+ APP_DBG(" ERROR: incompatible firmware");
+ APP_BLE_LLD_Error(ERR_BLE_LLD_CHECK_WIRELESS, 0);
+ break;
+ }
+ APP_DBG(" M0 FW VERSION: v%d.%d.%d", p_wireless_info->VersionMajor, p_wireless_info->VersionMinor, p_wireless_info->VersionSub);
+ APP_DBG("**********************************************************");
+ }
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+/**
+ * @brief Perform initialization of UART.
+ * @param None
+ * @retval None
+ */
+void APP_BLE_LLD_Init_UART(void)
+{
+#ifdef CFG_UART
+ MX_UART_Init(CFG_UART);
+#endif
+
+ CircularQueue_Init(&uartTxBuf,
+ uartTxBufData,
+ sizeof(uartTxBufData),
+ sizeof(char),
+ CIRCULAR_QUEUE_NO_FLAG);
+ txBusy = false;
+}
+
+/**
+ * @brief Perform de-initialization of UART.
+ * @param None
+ * @retval None
+ */
+void APP_BLE_LLD_DeInit_UART(void)
+{
+#ifdef CFG_UART
+ MX_UART_Deinit(CFG_UART);
+#endif
+}
+
+static void uartRxStart(void)
+{
+ if (HW_UART_Receive_IT(CFG_UART, (uint8_t *)&uartRxBuf, 1, uartRxCpltCallback) != hw_uart_ok){
+ APP_DBG("ERROR returned by HW_UART_Receive_IT()");
+ }
+}
+
+void APP_BLE_LLD_uartRxStart(void(*callback)(char))
+{
+ uartRxUserCb = callback;
+ uartRxStart();
+}
+
+static void uartRxCpltCallback(void)
+{
+ // No need to buffer uartRxBuf since the callback is called by value
+ uartRxUserCb(uartRxBuf);
+ // Since UART is in full duplex, receive can be always active without blocking send
+ uartRxStart();
+}
+
+void uartWrite(const char *format, ...)
+{
+ char out[UART_BUFFER_SIZE];
+ int nbChar;
+ va_list argp;
+ va_start(argp, format);
+ nbChar = vsnprintf(out, sizeof(out), format, argp);
+ va_end(argp);
+ if (nbChar < 0){
+ return;
+ }
+ if (nbChar > (sizeof(out) - ((strlen(UART_LINE_END) + 1)))){
+ strcpy(&(out[sizeof(out) - (strlen(UART_LINE_END) + 1)]), UART_LINE_END);
+ }else{
+ strcat(out, UART_LINE_END);
+ }
+ uartWriteRaw(out);
+}
+
+void uartWriteRaw(const char *str)
+{
+ CRITICAL_BEGIN();
+ while (*str != '\0'){
+ CircularQueue_Add(&uartTxBuf, (uint8_t *)str, 0, 1);
+ str++;
+ }
+ if (! txBusy){
+ uartTxSendChunk();
+ }
+ CRITICAL_END();
+}
+
+// Send multiple chars through the UART
+// must be called inside critical section
+// loop on itself via the UART callback
+static void uartTxSendChunk(void){
+ static char hwBuf[UART_TX_CHUNK_SIZE];
+ char *charPtr;
+ uint32_t count = 0;
+
+ while ((charPtr = (char *)CircularQueue_Remove(&uartTxBuf, NULL)) != NULL){
+ hwBuf[count] = *charPtr;
+ count++;
+ if (count >= UART_TX_CHUNK_SIZE){
+ break;
+ }
+ }
+ if (count != 0){
+ txBusy = true;
+ if (HW_UART_Transmit_IT(CFG_UART, (uint8_t *)hwBuf, count, uartTxSendChunk) != hw_uart_ok){
+ APP_DBG("ERROR returned by HW_UART_Transmit_IT()");
+ }
+ }else{
+ txBusy = false;
+ }
+}
+
+static void m0CmdProcess(void)
+{
+ BLE_LLD_PRX_EventProcessTask();
+}
+
+/**
+ * @brief Processes an event from radio CPU
+ *
+ * @param cmdBuffer : a pointer to TL_CmdPacket_t
+ * @return None
+ */
+void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * cmdBuffer )
+{
+ BLE_LLD_PRX_EventProcessInter((radioEventType)cmdBuffer->cmdserial.cmd.cmdcode);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_CMD_FROM_M0_TO_M4, CFG_SCH_PRIO_0);
+ TL_BLE_LLD_SendM0CmdAck();
+}
+
+/**
+ * @brief Sends a command to radio CPU
+ *
+ * Waits for reply from radio CPU before returning (synchronous calls).
+ *
+ * @param[in] command BLE command already packed (by LLD)
+ */
+uint8_t APP_BLE_LLD_SendCmdM0(BLE_LLD_Code_t bleCmd)
+{
+ BleLldCmdRspPacket.cmdserial.cmd.cmdcode = bleCmd;
+ payload_BLE_LLD_t *payload = (payload_BLE_LLD_t *)&BleLldCmdRspPacket.cmdserial.cmd.payload;
+ payload->msg = &bleparam_BLE_LLD_Packet;
+ UTIL_SEQ_ClrEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+ TL_BLE_LLD_SendCmd();
+ UTIL_SEQ_WaitEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+
+ return bleparam_BLE_LLD_Packet.returnValue;
+}
+
+/**
+ * @brief Processes a reply (to a command) from radio CPU
+ *
+ * Unlocks task waiting in APP_BLE_LLD_SendCmdM0(), this is used to make LLD
+ * API calls synchronous.
+ *
+ * @param Notbuffer : a pointer to TL_CmdPacket_t
+ * @return None
+ */
+void TL_BLE_LLD_ReceiveRsp( TL_CmdPacket_t * Notbuffer )
+{
+ switch (Notbuffer->cmdserial.cmd.cmdcode){
+ case BLE_LLD_RSP_END:
+ UTIL_SEQ_SetEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+ break;
+ default:
+ APP_DBG("WARNING: unknown response received %d", Notbuffer->cmdserial.cmd.cmdcode);
+ }
+
+ /* This is just a trace from M0, write to UART */
+ //uartWriteRaw(sourceBuf);
+
+ TL_BLE_LLD_SendRspAck();
+}
+
+/* USER CODE END FD_WRAP_FUNCTIONS */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.h
new file mode 100644
index 000000000..3bd87e32c
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.h
@@ -0,0 +1,71 @@
+/**
+ ******************************************************************************
+ * File Name : app_ble_lld.h
+ * Description : Header for BLE LLD application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_BLE_LLD_H
+#define APP_BLE_LLD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "ble_lld_transport.h"
+
+/* Private includes ----------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+
+/* Exported constants --------------------------------------------------------*/
+
+/* External variables --------------------------------------------------------*/
+
+/* Exported macros ------------------------------------------------------------*/
+
+/* Exported functions ------------------------------------------------------- */
+void APP_BLE_LLD_Init(void);
+void APP_BLE_LLD_Error(uint32_t ErrId, uint32_t ErrCode);
+void APP_BLE_LLD_Init_UART(void);
+void APP_BLE_LLD_DeInit_UART(void);
+
+void APP_BLE_LLD_uartRxStart(void(*cb)(char));
+
+void CheckWirelessFirmwareInfo(void);
+void uartWrite(const char *format, ...);
+void uartWriteRaw(const char *str);
+uint8_t APP_BLE_LLD_SendCmdM0(BLE_LLD_Code_t bleCmd);
+
+/**
+ * @brief Active polling for a given delay
+ * @param microsec the delay in us unit
+ **/
+void us_delay_16m(uint32_t microsec);
+void us_delay_32m(uint32_t microsec);
+#ifdef USE_SYS_CLOCK_DIV_2
+#define us_delay us_delay_16m
+#else
+#define us_delay us_delay_32m
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+
+#endif /* APP_BLE_LLD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.c
new file mode 100644
index 000000000..4063e0755
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.c
@@ -0,0 +1,167 @@
+/**
+ ******************************************************************************
+ * File Name : lowpower_app.c
+ * Description : BLE LLD simple demo to control LEDs remotely
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stdbool.h"
+#include "app_common.h"
+#include "stm32_seq.h"
+#include "stm32_lpm.h"
+#include "stm_logging.h"
+#include "dbg_trace.h"
+#include "ble_hal.h"
+#include "ipBLE_lld_public.h"
+#include "app_ble_lld.h"
+#include "lowpower_app.h"
+
+/* Private includes -----------------------------------------------------------*/
+
+/* Private typedef -----------------------------------------------------------*/
+// Allows to pack and unpack user data in payload (must not exceed 255 bytes)
+typedef PACKED_STRUCT
+{
+ uint8_t led;
+} userPayload;
+
+/* Private defines -----------------------------------------------------------*/
+#define CHANNEL 8 // radio channel
+#define POWER TX_POW_PLUS_6_DB // Transmit power
+#define NET_ID 0x5A964129 // network ID, both devices must use the same
+#define WAKEUP_US 10000 // delay before starting radio operation
+#define RX_TIMEOUT_US (1*1000*1000) // max delay radio will listen for a packet
+#define LED_ON_TIMER (2*1000*1000/CFG_TS_TICK_VAL) /**< 2000ms */ // delay of Toggle
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+static void radioInit(void);
+static void sendStart(void);
+static void sendLed1(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+static void sendLed2(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+static void sendLed3(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+
+/* Private variables -----------------------------------------------*/
+static ActionPacket apSend[ACTION_PACKET_NB];
+
+uint8_t SwitchOffGPIO_timer_Id;
+
+/* Functions Definition ------------------------------------------------------*/
+
+void LOWPOWER_APP_Init(void)
+{
+ CheckWirelessFirmwareInfo();
+
+ /* Disable low power */
+ UTIL_LPM_SetOffMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE);
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE );
+
+ /* Register tasks for event processing */
+ UTIL_SEQ_RegTask(1<<CFG_TASK_TIMER, UTIL_SEQ_RFU, sendStart);
+
+ APP_BLE_LLD_Init();
+ HW_TS_Create(CFG_TIM_PROC_ID_ISR, &SwitchOffGPIO_timer_Id, hw_ts_SingleShot, Appli_TS_Callback);
+
+ radioInit();
+ HW_TS_Start(SwitchOffGPIO_timer_Id, (uint32_t)LED_ON_TIMER);
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE ); // TO ENABLE
+
+}
+
+static void radioInit(void)
+{
+ HAL_BLE_LLD_Init(CFG_HS_STARTUP_TIME, true);
+ HAL_BLE_LLD_Configure(POWER, CHANNEL, true, CFG_BACK2BACK_TIME, NET_ID);
+
+ ActionPacket *ap1;
+ userPayload payload1;
+ payload1.led = LED1;
+ uint32_t wakeup_time1 = WAKEUP_US;
+ // Packet to send
+ ap1 = &apSend[APACKET_1];
+ ap1->actionPacketNb = APACKET_1;
+ ap1->StateMachineNo = STATE_MACHINE_0;
+ ap1->ActionTag = TXRX | TIMER_WAKEUP;
+ ap1->WakeupTime = wakeup_time1;
+ ap1->data = &payload1;
+ ap1->dataSize = sizeof(payload1);
+ ap1->nextTrue = APACKET_2;
+ ap1->nextFalse = APACKET_STOP;
+ ap1->callback = sendLed1;
+ BLE_LLD_SetReservedArea(ap1);
+
+ ActionPacket *ap2;
+ userPayload payload2;
+ payload2.led = LED2;
+ uint32_t wakeup_time2 = 2*WAKEUP_US;
+ // Packet to send
+ ap2 = &apSend[APACKET_2];
+ ap2->actionPacketNb = APACKET_2;
+ ap2->StateMachineNo = STATE_MACHINE_0;
+ ap2->ActionTag = TXRX | TIMER_WAKEUP;
+ ap2->WakeupTime = wakeup_time2;
+ ap2->data = &payload2;
+ ap2->dataSize = sizeof(payload2);
+ ap2->nextTrue = APACKET_3;
+ ap2->nextFalse = APACKET_STOP;
+ ap2->callback = sendLed2;
+ BLE_LLD_SetReservedArea(ap2);
+
+ ActionPacket *ap3;
+ userPayload payload3;
+ payload3.led = LED3;
+ uint32_t wakeup_time3 = 4*WAKEUP_US;
+ // Packet to send
+ ap3 = &apSend[APACKET_3];
+ ap3->actionPacketNb = APACKET_3;
+ ap3->StateMachineNo = STATE_MACHINE_0;
+ ap3->ActionTag = TXRX | TIMER_WAKEUP;
+ ap3->WakeupTime = wakeup_time3;
+ ap3->data = &payload3;
+ ap3->dataSize = sizeof(payload3);
+ ap3->nextTrue = APACKET_STOP;
+ ap3->nextFalse = APACKET_STOP;
+ ap3->callback = sendLed3;
+ BLE_LLD_SetReservedArea(ap3);
+}
+
+
+static void sendStart(void)
+{
+ BLE_LLD_MakeActionPacketPending(&apSend[APACKET_1]);
+}
+
+static void sendLed1(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+}
+
+static void sendLed2(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+}
+
+static void sendLed3(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_ENABLE ); // TO ENABLE
+ HW_TS_Start(SwitchOffGPIO_timer_Id, (uint32_t)LED_ON_TIMER);
+}
+
+
+void Appli_TS_Callback(void)
+{
+ UTIL_SEQ_SetTask(1U << CFG_TASK_TIMER, CFG_SCH_PRIO_0);
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.h
new file mode 100644
index 000000000..3024b6884
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.h
@@ -0,0 +1,50 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : lowpower_app.h
+ * Description : Header for BLE LLD application.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef LOWPOWER_APP_H
+#define LOWPOWER_APP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+
+/* Exported constants --------------------------------------------------------*/
+
+/* External variables --------------------------------------------------------*/
+
+/* Exported macros ------------------------------------------------------------*/
+
+/* Exported functions ------------------------------------------------------- */
+void LOWPOWER_APP_Init(void);
+void Appli_TS_Callback(void);
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/tl_dbg_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/tl_dbg_conf.h
new file mode 100644
index 000000000..b468b2863
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/tl_dbg_conf.h
@@ -0,0 +1,126 @@
+/**
+ ******************************************************************************
+ * File Name : tl_dbg_conf.h
+ * Description : Debug configuration file for stm32wpan transport layer interface.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TL_DBG_CONF_H
+#define __TL_DBG_CONF_H
+
+/* USER CODE BEGIN Tl_Conf */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_conf.h" /* required as some configuration used in dbg_trace.h are set there */
+#include "dbg_trace.h"
+#include "hw_if.h"
+
+/**
+ * Enable or Disable traces
+ * The raw data output is the hci binary packet format as specified by the BT specification *
+ */
+#define TL_SHCI_CMD_DBG_EN 0 /* Reports System commands sent to CPU2 and the command response */
+#define TL_SHCI_CMD_DBG_RAW_EN 0 /* Reports raw data System commands sent to CPU2 and the command response */
+#define TL_SHCI_EVT_DBG_EN 0 /* Reports System Asynchronous Events received from CPU2 */
+#define TL_SHCI_EVT_DBG_RAW_EN 0 /* Reports raw data System Asynchronous Events received from CPU2 */
+
+#define TL_HCI_CMD_DBG_EN 0 /* Reports BLE command sent to CPU2 and the command response */
+#define TL_HCI_CMD_DBG_RAW_EN 0 /* Reports raw data BLE command sent to CPU2 and the command response */
+#define TL_HCI_EVT_DBG_EN 0 /* Reports BLE Asynchronous Events received from CPU2 */
+#define TL_HCI_EVT_DBG_RAW_EN 0 /* Reports raw data BLE Asynchronous Events received from CPU2 */
+
+#define TL_MM_DBG_EN 0 /* Reports the informations of the buffer released to CPU2 */
+
+/**
+ * Macro definition
+ */
+
+/**
+ * System Transport Layer
+ */
+#if (TL_SHCI_CMD_DBG_EN != 0)
+#define TL_SHCI_CMD_DBG_MSG PRINT_MESG_DBG
+#define TL_SHCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_SHCI_CMD_DBG_MSG(...)
+#define TL_SHCI_CMD_DBG_BUF(...)
+#endif
+
+#if (TL_SHCI_CMD_DBG_RAW_EN != 0)
+#define TL_SHCI_CMD_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_SHCI_CMD_DBG_RAW(...)
+#endif
+
+#if (TL_SHCI_EVT_DBG_EN != 0)
+#define TL_SHCI_EVT_DBG_MSG PRINT_MESG_DBG
+#define TL_SHCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_SHCI_EVT_DBG_MSG(...)
+#define TL_SHCI_EVT_DBG_BUF(...)
+#endif
+
+#if (TL_SHCI_EVT_DBG_RAW_EN != 0)
+#define TL_SHCI_EVT_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_SHCI_EVT_DBG_RAW(...)
+#endif
+
+/**
+ * BLE Transport Layer
+ */
+#if (TL_HCI_CMD_DBG_EN != 0)
+#define TL_HCI_CMD_DBG_MSG PRINT_MESG_DBG
+#define TL_HCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_HCI_CMD_DBG_MSG(...)
+#define TL_HCI_CMD_DBG_BUF(...)
+#endif
+
+#if (TL_HCI_CMD_DBG_RAW_EN != 0)
+#define TL_HCI_CMD_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_HCI_CMD_DBG_RAW(...)
+#endif
+
+#if (TL_HCI_EVT_DBG_EN != 0)
+#define TL_HCI_EVT_DBG_MSG PRINT_MESG_DBG
+#define TL_HCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG
+#else
+#define TL_HCI_EVT_DBG_MSG(...)
+#define TL_HCI_EVT_DBG_BUF(...)
+#endif
+
+#if (TL_HCI_EVT_DBG_RAW_EN != 0)
+#define TL_HCI_EVT_DBG_RAW(_PDATA_, _SIZE_) HW_UART_Transmit(hw_uart1, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_HCI_EVT_DBG_RAW(...)
+#endif
+
+/**
+ * Memory Manager - Released buffer tracing
+ */
+#if (TL_MM_DBG_EN != 0)
+#define TL_MM_DBG_MSG PRINT_MESG_DBG
+#else
+#define TL_MM_DBG_MSG(...)
+#endif
+
+/* USER CODE END Tl_Conf */
+
+#endif /*__TL_DBG_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/Target/hw_ipcc.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/Target/hw_ipcc.c
new file mode 100644
index 000000000..7ce3de621
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/Target/hw_ipcc.c
@@ -0,0 +1,676 @@
+/**
+ ******************************************************************************
+ * File Name : Target/hw_ipcc.c
+ * Description : Hardware IPCC source file for STM32WPAN Middleware.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "mbox_def.h"
+
+/* Global variables ---------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
+#define HW_IPCC_TX_PENDING( channel ) ( !(LL_C1_IPCC_IsActiveFlag_CHx( IPCC, channel )) ) && (((~(IPCC->C1MR)) & (channel << 16U)))
+#define HW_IPCC_RX_PENDING( channel ) (LL_C2_IPCC_IsActiveFlag_CHx( IPCC, channel )) && (((~(IPCC->C1MR)) & (channel << 0U)))
+
+/* Private macros ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static void (*FreeBufCb)( void );
+
+/* Private function prototypes -----------------------------------------------*/
+static void HW_IPCC_BLE_EvtHandler( void );
+static void HW_IPCC_BLE_AclDataEvtHandler( void );
+static void HW_IPCC_MM_FreeBufHandler( void );
+static void HW_IPCC_SYS_CmdEvtHandler( void );
+static void HW_IPCC_SYS_EvtHandler( void );
+static void HW_IPCC_TRACES_EvtHandler( void );
+
+#ifdef THREAD_WB
+static void HW_IPCC_OT_CmdEvtHandler( void );
+static void HW_IPCC_THREAD_NotEvtHandler( void );
+static void HW_IPCC_THREAD_CliNotEvtHandler( void );
+#endif
+
+#ifdef LLD_TESTS_WB
+static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void );
+static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void );
+#endif
+
+#ifdef BLE_LLD_WB
+/*static void HW_IPCC_BLE_LLD_ReceiveCliRspHandler( void );*/
+static void HW_IPCC_BLE_LLD_ReceiveRspHandler( void );
+static void HW_IPCC_BLE_LLD_ReceiveM0CmdHandler( void );
+#endif
+
+#ifdef MAC_802_15_4_WB
+static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void );
+static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void );
+#endif
+
+#ifdef ZIGBEE_WB
+static void HW_IPCC_ZIGBEE_CmdEvtHandler( void );
+static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void );
+static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void );
+#endif
+
+/* Public function definition -----------------------------------------------*/
+
+/******************************************************************************
+ * INTERRUPT HANDLER
+ ******************************************************************************/
+void HW_IPCC_Rx_Handler( void )
+{
+ if (HW_IPCC_RX_PENDING( HW_IPCC_SYSTEM_EVENT_CHANNEL ))
+ {
+ HW_IPCC_SYS_EvtHandler();
+ }
+#ifdef MAC_802_15_4_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ))
+ {
+ HW_IPCC_MAC_802_15_4_NotEvtHandler();
+ }
+#endif /* MAC_802_15_4_WB */
+#ifdef THREAD_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ))
+ {
+ HW_IPCC_THREAD_NotEvtHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ))
+ {
+ HW_IPCC_THREAD_CliNotEvtHandler();
+ }
+#endif /* THREAD_WB */
+#ifdef LLD_TESTS_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ))
+ {
+ HW_IPCC_LLDTESTS_ReceiveCliRspHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ))
+ {
+ HW_IPCC_LLDTESTS_ReceiveM0CmdHandler();
+ }
+#endif /* LLD_TESTS_WB */
+#ifdef BLE_LLD_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_LLD_RSP_CHANNEL ))
+ {
+ HW_IPCC_BLE_LLD_ReceiveRspHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_LLD_M0_CMD_CHANNEL ))
+ {
+ HW_IPCC_BLE_LLD_ReceiveM0CmdHandler();
+ }
+#endif /* BLE_LLD_WB */
+#ifdef ZIGBEE_WB
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ))
+ {
+ HW_IPCC_ZIGBEE_StackNotifEvtHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ))
+ {
+ HW_IPCC_ZIGBEE_StackM0RequestHandler();
+ }
+#endif /* ZIGBEE_WB */
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_EVENT_CHANNEL ))
+ {
+ HW_IPCC_BLE_EvtHandler();
+ }
+ else if (HW_IPCC_RX_PENDING( HW_IPCC_TRACES_CHANNEL ))
+ {
+ HW_IPCC_TRACES_EvtHandler();
+ }
+
+ return;
+}
+
+void HW_IPCC_Tx_Handler( void )
+{
+ if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_SYS_CmdEvtHandler();
+ }
+#ifdef MAC_802_15_4_WB
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_MAC_802_15_4_CmdEvtHandler();
+ }
+#endif /* MAC_802_15_4_WB */
+#ifdef THREAD_WB
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_OT_CmdEvtHandler();
+ }
+#endif /* THREAD_WB */
+#ifdef LLD_TESTS_WB
+// No TX handler for LLD tests
+#endif /* LLD_TESTS_WB */
+#ifdef ZIGBEE_WB
+ if (HW_IPCC_TX_PENDING( HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL ))
+ {
+ HW_IPCC_ZIGBEE_CmdEvtHandler();
+ }
+#endif /* ZIGBEE_WB */
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ))
+ {
+ HW_IPCC_SYS_CmdEvtHandler();
+ }
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ))
+ {
+ HW_IPCC_MM_FreeBufHandler();
+ }
+ else if (HW_IPCC_TX_PENDING( HW_IPCC_HCI_ACL_DATA_CHANNEL ))
+ {
+ HW_IPCC_BLE_AclDataEvtHandler();
+ }
+
+ return;
+}
+/******************************************************************************
+ * GENERAL
+ ******************************************************************************/
+void HW_IPCC_Enable( void )
+{
+ /**
+ * Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running
+ when FUS is running on CPU2 and CPU1 enters deep sleep mode
+ */
+ LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC);
+
+ /**
+ * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2
+ */
+ LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 );
+ LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 );
+
+ /**
+ * In case the SBSFU is implemented, it may have already set the C2BOOT bit to startup the CPU2.
+ * In that case, to keep the mechanism transparent to the user application, it shall call the system command
+ * SHCI_C2_Reinit( ) before jumping to the application.
+ * When the CPU2 receives that command, it waits for its event input to be set to restart the CPU2 firmware.
+ * This is required because once C2BOOT has been set once, a clear/set on C2BOOT has no effect.
+ * When SHCI_C2_Reinit( ) is not called, generating an event to the CPU2 does not have any effect
+ * So, by default, the application shall both set the event flag and set the C2BOOT bit.
+ */
+ __SEV( ); /* Set the internal event flag and send an event to the CPU2 */
+ __WFE( ); /* Clear the internal event flag */
+ LL_PWR_EnableBootC2( );
+
+ return;
+}
+
+void HW_IPCC_Init( void )
+{
+ LL_AHB3_GRP1_EnableClock( LL_AHB3_GRP1_PERIPH_IPCC );
+
+ LL_C1_IPCC_EnableIT_RXO( IPCC );
+ LL_C1_IPCC_EnableIT_TXF( IPCC );
+
+ HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn);
+ HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn);
+
+ return;
+}
+
+/******************************************************************************
+ * BLE
+ ******************************************************************************/
+void HW_IPCC_BLE_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_EVENT_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_BLE_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_CMD_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_BLE_EvtHandler( void )
+{
+ HW_IPCC_BLE_RxEvtNot();
+
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_EVENT_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_BLE_SendAclData( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_BLE_AclDataEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+
+ HW_IPCC_BLE_AclDataAckNot();
+
+ return;
+}
+
+__weak void HW_IPCC_BLE_AclDataAckNot( void ){};
+__weak void HW_IPCC_BLE_RxEvtNot( void ){};
+
+/******************************************************************************
+ * SYSTEM
+ ******************************************************************************/
+void HW_IPCC_SYS_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_SYS_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_SYS_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+
+ HW_IPCC_SYS_CmdEvtNot();
+
+ return;
+}
+
+static void HW_IPCC_SYS_EvtHandler( void )
+{
+ HW_IPCC_SYS_EvtNot();
+
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL );
+
+ return;
+}
+
+__weak void HW_IPCC_SYS_CmdEvtNot( void ){};
+__weak void HW_IPCC_SYS_EvtNot( void ){};
+
+/******************************************************************************
+ * MAC 802.15.4
+ ******************************************************************************/
+#ifdef MAC_802_15_4_WB
+void HW_IPCC_MAC_802_15_4_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_MAC_802_15_4_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_MAC_802_15_4_SendAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+
+ HW_IPCC_MAC_802_15_4_CmdEvtNot();
+
+ return;
+}
+
+static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+ HW_IPCC_MAC_802_15_4_EvtNot();
+
+ return;
+}
+__weak void HW_IPCC_MAC_802_15_4_CmdEvtNot( void ){};
+__weak void HW_IPCC_MAC_802_15_4_EvtNot( void ){};
+#endif
+
+/******************************************************************************
+ * THREAD
+ ******************************************************************************/
+#ifdef THREAD_WB
+void HW_IPCC_THREAD_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_OT_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_CLI_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_CMD_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_THREAD_SendAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_THREAD_CliSendAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_OT_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+
+ HW_IPCC_OT_CmdEvtNot();
+
+ return;
+}
+
+static void HW_IPCC_THREAD_NotEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+
+ HW_IPCC_THREAD_EvtNot();
+
+ return;
+}
+
+static void HW_IPCC_THREAD_CliNotEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+ HW_IPCC_THREAD_CliEvtNot();
+
+ return;
+}
+
+__weak void HW_IPCC_OT_CmdEvtNot( void ){};
+__weak void HW_IPCC_CLI_CmdEvtNot( void ){};
+__weak void HW_IPCC_THREAD_EvtNot( void ){};
+
+#endif /* THREAD_WB */
+
+/******************************************************************************
+ * LLD TESTS
+ ******************************************************************************/
+#ifdef LLD_TESTS_WB
+void HW_IPCC_LLDTESTS_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ return;
+}
+
+void HW_IPCC_LLDTESTS_SendCliCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ HW_IPCC_LLDTESTS_ReceiveCliRsp();
+ return;
+}
+
+void HW_IPCC_LLDTESTS_SendCliRspAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ HW_IPCC_LLDTESTS_ReceiveM0Cmd();
+ return;
+}
+
+
+void HW_IPCC_LLDTESTS_SendM0CmdAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+ return;
+}
+__weak void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ){};
+__weak void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ){};
+#endif /* LLD_TESTS_WB */
+
+/******************************************************************************
+ * BLE LLD
+ ******************************************************************************/
+#ifdef BLE_LLD_WB
+void HW_IPCC_BLE_LLD_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ return;
+}
+
+void HW_IPCC_BLE_LLD_SendCliCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_LLD_CLI_CMD_CHANNEL );
+ return;
+}
+
+/*static void HW_IPCC_BLE_LLD_ReceiveCliRspHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL );
+ HW_IPCC_BLE_LLD_ReceiveCliRsp();
+ return;
+}*/
+
+void HW_IPCC_BLE_LLD_SendCliRspAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_BLE_LLD_ReceiveM0CmdHandler( void )
+{
+ //LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ HW_IPCC_BLE_LLD_ReceiveM0Cmd();
+ return;
+}
+
+
+void HW_IPCC_BLE_LLD_SendM0CmdAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ //LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_M0_CMD_CHANNEL );
+ return;
+}
+__weak void HW_IPCC_BLE_LLD_ReceiveCliRsp( void ){};
+__weak void HW_IPCC_BLE_LLD_ReceiveM0Cmd( void ){};
+
+/* Transparent Mode */
+void HW_IPCC_BLE_LLD_SendCmd( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_LLD_CMD_CHANNEL );
+ return;
+}
+
+static void HW_IPCC_BLE_LLD_ReceiveRspHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ HW_IPCC_BLE_LLD_ReceiveRsp();
+ return;
+}
+
+void HW_IPCC_BLE_LLD_SendRspAck( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_LLD_RSP_CHANNEL );
+ return;
+}
+
+#endif /* BLE_LLD_WB */
+
+/******************************************************************************
+ * ZIGBEE
+ ******************************************************************************/
+#ifdef ZIGBEE_WB
+void HW_IPCC_ZIGBEE_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4RequestToM0( void )
+{
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+
+ return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4AckToM0Notify( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_ZIGBEE_CmdEvtHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+
+ HW_IPCC_ZIGBEE_RecvAppliAckFromM0();
+
+ return;
+}
+
+static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+
+ HW_IPCC_ZIGBEE_RecvM0NotifyToM4();
+
+ return;
+}
+
+static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void )
+{
+ LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+ HW_IPCC_ZIGBEE_RecvM0RequestToM4();
+
+ return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4AckToM0Request( void )
+{
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+ return;
+}
+
+__weak void HW_IPCC_ZIGBEE_RecvAppliAckFromM0( void ){};
+__weak void HW_IPCC_ZIGBEE_RecvM0NotifyToM4( void ){};
+__weak void HW_IPCC_ZIGBEE_RecvM0RequestToM4( void ){};
+#endif /* ZIGBEE_WB */
+
+/******************************************************************************
+ * MEMORY MANAGER
+ ******************************************************************************/
+void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) )
+{
+ if ( LL_C1_IPCC_IsActiveFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ) )
+ {
+ FreeBufCb = cb;
+ LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+ }
+ else
+ {
+ cb();
+
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+ }
+
+ return;
+}
+
+static void HW_IPCC_MM_FreeBufHandler( void )
+{
+ LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+
+ FreeBufCb();
+
+ LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+
+ return;
+}
+
+/******************************************************************************
+ * TRACES
+ ******************************************************************************/
+void HW_IPCC_TRACES_Init( void )
+{
+ LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_TRACES_CHANNEL );
+
+ return;
+}
+
+static void HW_IPCC_TRACES_EvtHandler( void )
+{
+ HW_IPCC_TRACES_EvtNot();
+
+ LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_TRACES_CHANNEL );
+
+ return;
+}
+
+__weak void HW_IPCC_TRACES_EvtNot( void ){};
+
+/******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/readme.txt b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/readme.txt
new file mode 100644
index 000000000..7541ff8c4
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/readme.txt
@@ -0,0 +1,140 @@
+/**
+ @page BLE_LLD_Lowpower example
+
+ @verbatim
+ ******************** (C) COPYRIGHT 2021 STMicroelectronics *******************
+ * @file BLE_LLD/BLE_LLD_Lowpower/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the BLE LLD BLE_LLD_Lowpower application
+ ******************************************************************************
+ *
+ * Copyright (c) 2021 STMicroelectronics. All rights reserved.
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+How to to Send Automatically LED to Toggle on another board.
+
+@note The objectives are to communicate using BLE_LLD between 2 boards,
+ in BLE Radio format not BLE Stack protocol.
+ BLE_LLD_Lowpower must be used with another board flashed with a Reception mode (Pressbutton)
+ Appli is based on LP and a programmed TIMER that send a payload that contains info to Toggle LED
+ It is launched after reset.
+
+@note BLE_LLD is a 2-level stack implemented just over the Hardware and Radio layer.
+ Lowest Layer also called Low Level or LL
+ It is just over the Hardware and Radio Layer.
+ It contains all the API to Set/Configure/Initialize all the parameters for Sending/receiving BLE Radio format packet data
+ Over LL layer there is HAL level
+ It contains a reduced number of API to Send/Receive BLE Radio format packet with predefined parameters
+ It works by calling a set of LL API
+ It make simple and fast to Send/Receive Packet
+ But It does allow the user to change all the Radio parameters
+
+@note LL is for user that want to customize the Radio and BLE parameters, it is more complex to implement
+ HAL is for user that want to Send/Receive in a very simple way less complex, without configuring LL
+ ble_lld module contains LLD API HAL and LL API
+ app_ble_lld module contains Transport Layer Command call from CPU1 to CPU2 + Buffer management + IT Radio management from CPU2
+
+@par Keywords
+
+BLE_LLD, Connectivity, BLE, LLD, IPCC, HAL, Dual core, send and receive Packet
+
+@par Directory contents
+
+ - BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.h Header for app_ble_lld.c module
+ - BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.h Header for Lowpower Application lowpower_app.c module
+ - BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/tl_dbg_conf.h Header for ble_lld debug module
+ - BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/app_ble_lld.c contains TL management and Buffer for BLE LLD Application
+ - BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/App/lowpower_app.c Lowpower program
+ - BLE_LLD/BLE_LLD_Lowpower/STM32_WPAN/Target/hw_ipcc.c IPCC Driver
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_common.h Header for all modules with common definition
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_conf.h Parameters configuration file of the application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/app_entry.h Parameters configuration file of the application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/gpio_lld.h Parameters for gpio configuration file of the application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_conf.h Configuration file of the HW
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/hw_if.h Configuration file of the HW
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/main.h Header for main.c module
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm_logging.h Header for stm_logging.c module
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32_lpm_if.h Header for stm32_lpm_if.c module
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_hal_conf.h HAL configuration file
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/stm32wbxx_it.h Interrupt handlers header file
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/utilities_conf.h Configuration file of the utilities
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Inc/nucleo_wb15cc_conf.h NUCLEO-WB15CC board configuration file
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/app_entry.c Initialization of the application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/gpio_lld.c GPIO for application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_timerserver.c TIMERSERVER for Lowpower application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/hw_uart.c UART Driver
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/main.c Main program
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm_logging.c Logging for application
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32_lpm_if.c Low Power Manager Interface
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_it.c Interrupt handlers
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/system_stm32wbxx.c stm32wbxx system source file
+ - BLE_LLD/BLE_LLD_Lowpower/Core/Src/stm32wbxx_hal_msp.c HAL MPS for application
+
+@par Hardware and Software environment
+
+ - This application uses two STM32WB15xx devices.
+
+ - This example has been tested with an STMicroelectronics NUCLEO-WB15CC
+ board and can be easily tailored to any other supported device
+ and development board.
+
+ - On NUCLEO-WB15CC, the jumpers must be configured as described
+ in this section. Starting from the top left position up to the bottom
+ right position, the jumpers on the Board must be set as follows:
+
+ CN11: GND [OFF]
+ JP4: VDDRF [ON]
+ JP6: VC0 [ON]
+ JP2: +3V3 [ON]
+ JP1: USB_STL [ON] All others [OFF]
+ CN12: GND [OFF]
+ CN7: <All> [OFF]
+ JP3: VDD_MCU [ON]
+ JP5: GND [OFF] All others [ON]
+ CN10: <All> [OFF]
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Connect 1 NUCLEO-WB15CC board to your PC
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into one target memory
+ - Rebuild all files of BLE_LLD/BLE_LLD_Lowpower application
+ and load your image into the other target memory
+ + load stm32wb1x_BLE_LLD_fw.bin
+ - Run the application
+
+BLE_LLD_Lowpower used only LL API for Send
+
+3 consecutive TX ActionPackets are chained:
+ - 1st TX ActionPacket send LED1 Toggling payload command
+ - 2nd TX ActionPacket send LED2 Toggling payload command
+ - 3rd TX ActionPacket send LED3 Toggling payload command
+
+
+You can not control this application, after power and reset Send Packet are automatically done
+A loop configuration has been developed.
+In this order and described into main.c:
+
+After power On or Reset (ALL the LED are OFF):
+ 1) Radio Init is done and the 3 consecutive ActionPackets are configured, Low-Power is not yet activated
+ 2) The TIMER SERVER is launched
+ 3) First TX ActionPacket is launched at the TIMER SERVER Timeout
+ 4) At the end of the 3 consecutive TX ActionPackets TIMER SERVER is launched, Low-Power is activated
+ 5) loop on step 3
+
+Serial Port Setup TERMINAL
+Baud Rate:115200 / Data:8 bits / Parity:none / Stop:1bit / Flow Control:none
+
+ * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
+ */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_conf.h
index b05951fbd..f24d94eb9 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_conf.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_conf.h
@@ -29,6 +29,9 @@
/******************************************************************************
* Application Config
******************************************************************************/
+#define CFG_HS_STARTUP_TIME 0x0099 /* Start up time of the high speed oscillator in system time units (625/256us) */
+
+#define CFG_BACK2BACK_TIME 200 /* Back to back time (us) */
/******************************************************************************
* Transport Layer
@@ -56,7 +59,7 @@
* Select UART interfaces
*/
#define CFG_DEBUG_TRACE_UART hw_lpuart1
-#define CFG_CLI_UART hw_uart1
+#define CFG_UART hw_uart1
/******************************************************************************
* USB interface
@@ -77,12 +80,14 @@
*
******************************************************************************/
#define CFG_LPM_SUPPORTED 0
-
+
#ifdef BLE_LLD_LP
#undef CFG_LPM_SUPPORTED
#define CFG_LPM_SUPPORTED 1
#endif
+#define CFG_PWR_MODE_STOP LL_PWR_MODE_STOP1
+
/******************************************************************************
* Timer Server
******************************************************************************/
@@ -181,11 +186,6 @@ typedef enum
*/
#define CFG_DEBUGGER_SUPPORTED 1
-#if (CFG_LPM_SUPPORTED == 1)
-#undef CFG_DEBUGGER_SUPPORTED
-#define CFG_DEBUGGER_SUPPORTED 0
-#endif
-
/*****************************************************************************
* Traces
* Enable or Disable traces in application
@@ -196,11 +196,6 @@ typedef enum
*****************************************************************************/
#define CFG_DEBUG_TRACE 1
-#if (CFG_LPM_SUPPORTED == 1)
-#undef CFG_DEBUG_TRACE
-#define CFG_DEBUG_TRACE 0
-#endif
-
/**
* When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
* When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
@@ -249,24 +244,9 @@ typedef enum
* When CFG_LED_SUPPORTED is set, LEDS are activated if requested
* When CFG_BUTTON_SUPPORTED is set, the push button are activated if requested
******************************************************************************/
-#if (CFG_LPM_SUPPORTED == 1)
-#define CFG_LED_SUPPORTED 0
-#define CFG_BUTTON_SUPPORTED 0
-#else
#define CFG_LED_SUPPORTED 1
#define CFG_BUTTON_SUPPORTED 1
-#endif
-
-#ifdef STM32WB15xx
-#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
-#define PUSH_BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
-#define PUSH_BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
-#else
-#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler
-#define PUSH_BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler
-#define PUSH_BUTTON_SW3_EXTI_IRQHandler EXTI1_IRQHandler
-#endif
/* USER CODE END Defines */
/******************************************************************************
@@ -282,10 +262,8 @@ typedef enum
CFG_TASK_CMD_FROM_M0_TO_M4,
CFG_TASK_SEND_CLI_TO_M0,
CFG_TASK_SEND_TO_M0,
- CFG_TASK_HAL_BLE_INIT,
/* USER CODE BEGIN IdleTask */
- CFG_TASK_HAL_BLE_SENDPACKET,
- CFG_TASK_HAL_BLE_RECEIVEPACKET,
+ CFG_TASK_BUTTON,
/* USER CODE END IdleTask */
CFG_TASK_SYSTEM_HCI_ASYNCH_EVT,
CFG_TASK_PROCESS_UART_RX_BUFFER,
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/gpio_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/gpio_lld.h
index 71678202a..e9ceb78c0 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/gpio_lld.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/gpio_lld.h
@@ -6,41 +6,9 @@
#ifndef GPIO_LLD_H_
#define GPIO_LLD_H_
-#if defined (USE_SIMU) || defined (USE_FPGA)
-/* Be carefull with GPIO used on SIMU plateform */
-// GPIOA port is used for CRC management on MASTER only
-// GPIOC ad GPIOD ports are used to send messages between the 2 DORYs
-#define GPIO_TX_PIN GPIO_PIN_8
-#define GPIO_TX_PORT GPIOB
-
-#define GPIO_1_PIN GPIO_PIN_9
-#define GPIO_1_PORT GPIOB
-#else /* on Nucleo boards */
-/* Use GPIO PB.8 to monitor TX time during valid on Boards */
-#define GPIO_TX_PIN GPIO_PIN_8
-#define GPIO_TX_PORT GPIOB
-
#define GPIO_HARD_FAULT_PIN GPIO_PIN_4
#define GPIO_HARD_FAULT_PORT GPIOA
-#define GPIO_MCO_PIN GPIO_PIN_15
-#define GPIO_MCO_PORT GPIOA
-
-#ifdef STM32WB35xx
-#define GPIO_1_PIN GPIO_PIN_3
-#define GPIO_1_PORT GPIOB
-
-#define GPIO_2_PIN GPIO_PIN_4
-#define GPIO_2_PORT GPIOB
-#else
-#define GPIO_1_PIN GPIO_PIN_2
-#define GPIO_1_PORT GPIOC
-
-#define GPIO_2_PIN GPIO_PIN_3
-#define GPIO_2_PORT GPIOC
-#endif
-#endif
-
// External PA TX/RX pin is fixed by the chip
#define GPIO_EXT_PA_TX_PIN GPIO_PIN_0
#define GPIO_EXT_PA_TX_PORT GPIOB
@@ -88,4 +56,124 @@ void gpio_lld_led1_toggle(void);
void gpio_lld_led2_toggle(void);
void gpio_lld_led3_toggle(void);
+#ifdef STM32WB15xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOA
+#define USART_TX_PIN GPIO_PIN_9
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOA
+#define USART_RX_PIN GPIO_PIN_10
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOA
+#define LPUART_TX_PIN GPIO_PIN_2
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOA
+#define LPUART_RX_PIN GPIO_PIN_3
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+#endif
+
+#ifdef STM32WB35xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI9_5_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOB
+#define USART_TX_PIN GPIO_PIN_6
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOB
+#define USART_RX_PIN GPIO_PIN_7
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOB
+#define LPUART_TX_PIN GPIO_PIN_5
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOA
+#define LPUART_RX_PIN GPIO_PIN_3
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
+#endif
+
+#ifdef STM32WB55xx
+#define BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler
+#define BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler
+#define BUTTON_SW3_EXTI_IRQHandler EXTI1_IRQHandler
+
+/**
+ * @brief USART pins
+ */
+#define USART_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+
+#define USART_TX_AF GPIO_AF7_USART1
+#define USART_TX_GPIO_PORT GPIOB
+#define USART_TX_PIN GPIO_PIN_6
+#define USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define USART_RX_AF GPIO_AF7_USART1
+#define USART_RX_GPIO_PORT GPIOB
+#define USART_RX_PIN GPIO_PIN_7
+#define USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define USART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+/**
+ * @brief LPUART pins
+ */
+#define LPUART_CLK_ENABLE() __HAL_RCC_LPUART1_CLK_ENABLE()
+
+#define LPUART_TX_AF GPIO_AF8_LPUART1
+#define LPUART_TX_GPIO_PORT GPIOC
+#define LPUART_TX_PIN GPIO_PIN_1
+#define LPUART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LPUART_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+
+#define LPUART_RX_AF GPIO_AF8_LPUART1
+#define LPUART_RX_GPIO_PORT GPIOC
+#define LPUART_RX_PIN GPIO_PIN_0
+#define LPUART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LPUART_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+#endif
+
#endif /* GPIO_LLD_H_ */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_if.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_if.h
index 8acd008a3..1499891d6 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_if.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_if.h
@@ -44,9 +44,15 @@ extern "C" {
#ifdef USE_STM32WBXX_USB_DONGLE
#include "stm32wbxx_usb_dongle.h"
#endif
+
#ifdef USE_STM32WBXX_NUCLEO
+
+#ifdef STM32WB15xx
#include "nucleo_wb15cc.h"
#endif
+
+#endif
+
#ifdef USE_X_NUCLEO_EPD
#include "x_nucleo_epd.h"
#endif
@@ -261,6 +267,8 @@ void MX_USART1_UART_DeInit(void);
*/
void HW_TS_RTC_CountUpdated_AppNot(void);
+void MX_UART_Init(hw_uart_id_t uart);
+void MX_UART_Deinit(hw_uart_id_t uart);
#ifdef __cplusplus
}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32wbxx_it.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32wbxx_it.h
index c539feca5..485c7fc81 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32wbxx_it.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32wbxx_it.h
@@ -29,6 +29,7 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "app_common.h"
+#include "gpio_lld.h"
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
@@ -56,13 +57,8 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-#ifdef STM32WB35xx
void DMA1_Channel4_IRQHandler(void);
-void DMA2_Channel4_IRQHandler(void);
-#else
-void DMA1_Channel1_IRQHandler(void);
-void DMA1_Channel2_IRQHandler(void);
-#endif
+void DMA1_Channel5_IRQHandler(void);
void USART1_IRQHandler(void);
void LPUART1_IRQHandler(void);
/* USER CODE BEGIN EFP */
@@ -71,12 +67,12 @@ void RTC_WKUP_IRQHandler(void);
#endif
void IPCC_C1_TX_IRQHandler(void);
void IPCC_C1_RX_IRQHandler(void);
-#if 1 // Not needed for LLD tests : remove to use less power
-void PUSH_BUTTON_SW1_EXTI_IRQHandler(void);
-void PUSH_BUTTON_SW2_EXTI_IRQHandler(void);
-void PUSH_BUTTON_SW3_EXTI_IRQHandler(void);
+
+void BUTTON_SW1_EXTI_IRQHandler(void);
+void BUTTON_SW2_EXTI_IRQHandler(void);
+void BUTTON_SW3_EXTI_IRQHandler(void);
void TIM2_IRQHandler(void);
-#endif
+
/* USER CODE END EFP */
#ifdef __cplusplus
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c
index fedd3087a..4a8eab1cd 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c
@@ -154,13 +154,9 @@ static void Init_Debug( void )
#endif
/* Send a first trace to debug trace port to see that M4 is alive */
- PRINT_MESG_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
-#ifdef STM32WB35xx
- PRINT_MESG_DBG("traces init done on Little DORY M4");
-#else
- PRINT_MESG_DBG("traces init done on DORY M4");
-#endif
- PRINT_MESG_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ APP_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ APP_DBG("traces init done on M4");
+ APP_DBG("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
return;
}
@@ -272,15 +268,15 @@ static void APPE_SysEvtError( SCHI_SystemErrCode_t ErrorCode)
switch(ErrorCode)
{
case ERR_THREAD_LLD_FATAL_ERROR:
- PRINT_MESG_DBG("** ERR_LLD_TESTS : LLD_FATAL_ERROR \n");
+ APP_DBG("** ERR_LLD_TESTS : LLD_FATAL_ERROR \n");
break;
case ERR_THREAD_UNKNOWN_CMD:
- PRINT_MESG_DBG("** ERR_LLD_TESTS : UNKNOWN_CMD \n");
+ APP_DBG("** ERR_LLD_TESTS : UNKNOWN_CMD \n");
break;
default:
- PRINT_MESG_DBG("** ERR_LLD_TESTS : ErroCode=%d \n",ErrorCode);
+ APP_DBG("** ERR_LLD_TESTS : ErroCode=%d \n",ErrorCode);
break;
}
return;
@@ -311,18 +307,11 @@ static void Led_Init( void )
* Leds Initialization
*/
#if (CFG_HW_LPUART1_ENABLED != 1) || ! defined (STM32WB35xx)
- // On Little DORY, LED_BLUE share the GPIO PB5 with LPUART
+ // On WB35, LED_BLUE share the GPIO PB5 with LPUART
BSP_LED_Init(LED_BLUE);
- //BSP_LED_On(LED_BLUE);
#endif
-
-//#if (CFG_HW_EXTPA_ENABLED != 1)
BSP_LED_Init(LED_GREEN);
- //BSP_LED_On(LED_GREEN);
-//#endif
-
BSP_LED_Init(LED_RED);
- //BSP_LED_On(LED_RED);
#endif
return;
@@ -360,24 +349,6 @@ void UTIL_SEQ_Idle( void )
return;
}
-/**
- * @brief This function is called by the scheduler each time an event
- * is pending.
- *
- * @param evt_waited_bm : Event pending.
- * @retval None
- */
-void UTIL_SEQ_EvtIdle( UTIL_SEQ_bm_t task_id_bm, UTIL_SEQ_bm_t evt_waited_bm )
-{
- switch(evt_waited_bm)
- {
- default :
- /* default case : schedule all tasks */
- UTIL_SEQ_Run( UTIL_SEQ_DEFAULT );
- break;
- }
-}
-
void shci_notify_asynch_evt(void* pdata)
{
UNUSED(pdata);
@@ -419,10 +390,10 @@ void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt )
#if(CFG_DEBUG_TRACE != 0)
void DbgOutputInit( void )
{
-#if (CFG_HW_LPUART1_ENABLED == 1)
- MX_LPUART1_UART_Init();
+/* USER CODE BEGIN DbgOutputInit */
+#ifdef CFG_DEBUG_TRACE_UART
+ MX_UART_Init(CFG_DEBUG_TRACE_UART);
#endif
-
return;
}
@@ -442,39 +413,6 @@ void DbgOutputTraces( uint8_t *p_data, uint16_t size, void (*cb)(void) )
#endif
/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
-void HAL_GPIO_EXTI_Callback( uint16_t GPIO_Pin )
-{
- switch (GPIO_Pin)
- {
- case BUTTON_SW1_PIN:
- Appli_GPIO_EXTI_Callback(BUTTON_SW1_PIN);
- break;
-
- case BUTTON_SW2_PIN:
- Appli_GPIO_EXTI_Callback(BUTTON_SW2_PIN);
- break;
-
- case BUTTON_SW3_PIN:
- Appli_GPIO_EXTI_Callback(BUTTON_SW3_PIN);
- break;
-
- default:
- break;
-
- }
- return;
-}
-
-void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
-{
- Appli_TIM_IC_CaptureCallback();
-}
-
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
-{
- Appli_TIM_PeriodElapsedCallback();
-}
-
/* USER CODE END FD_WRAP_FUNCTIONS */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/gpio_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/gpio_lld.c
index ba3565389..1ccb7b42f 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/gpio_lld.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/gpio_lld.c
@@ -41,107 +41,6 @@
#include "app_conf.h"
#include "gpio_lld.h"
-/* Initialize GPIOs fused by PHY valid CLI */
-void gpio_lld_phy_init(void) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
- /* Enable clock(s) for GPIOs */
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#ifdef STM32WB35xx
-#else
- __HAL_RCC_GPIOC_CLK_ENABLE();
-#endif
-#ifdef USE_SIMU
- __HAL_RCC_GPIOB_CLK_ENABLE();
- __HAL_RCC_GPIOC_CLK_ENABLE();
- __HAL_RCC_GPIOD_CLK_ENABLE();
-#endif
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#ifdef STM32WB35xx
-#else
- __HAL_RCC_C2GPIOC_CLK_ENABLE();
-#endif
-#ifdef USE_SIMU
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
- __HAL_RCC_C2GPIOC_CLK_ENABLE();
- __HAL_RCC_C2GPIOD_CLK_ENABLE();
-#endif
-#endif
-
-#if defined (USE_SIMU)
- // Initialize GPIO used to detect if current DORY is master or slave
- // 4 GPIOs are needed while only one is enougth but this must be kept as it is
- // because this is also used by tests which are not managed by MDG-RF
- GPIO_InitStruct.Pin = (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3);
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH ;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- // Initialize GPIOs used to have both DORYs communicating over
- // 13 bits of the port C and D which are cross connected in SIMU test bench
- GPIO_InitStruct.Pin = (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH ;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH ;
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-#endif
-
- // configure the GPIO to be set to '1' during frame TX
- GPIO_InitStruct.Pin = (GPIO_TX_PIN);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIO_TX_PORT, &GPIO_InitStruct);
- gpio_lld_phy_gpioTx_down();
-
- // configure the GPIO to be set to '1' during HardFault'
- GPIO_InitStruct.Pin = (GPIO_HARD_FAULT_PIN);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIO_HARD_FAULT_PORT, &GPIO_InitStruct);
- gpio_lld_phy_gpioHardFault_down();
-
- // configure 2 GPIOs that can be used for debug purposes
- GPIO_InitStruct.Pin = (GPIO_1_PIN);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIO_1_PORT, &GPIO_InitStruct);
- gpio_lld_phy_gpio1_down();
-#if !defined (USE_SIMU) && !defined (USE_FPGA)
- GPIO_InitStruct.Pin = (GPIO_2_PIN);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIO_2_PORT, &GPIO_InitStruct);
- gpio_lld_phy_gpio2_down();
-#endif
-}
-
-/* Set PHY GPIO_TX to '1' */
-void gpio_lld_phy_gpioTx_up(void) {
- HAL_GPIO_WritePin(GPIO_TX_PORT, GPIO_TX_PIN, GPIO_PIN_SET);
-}
-
-/* Set PHY GPIO_TX to '0' */
-void gpio_lld_phy_gpioTx_down(void) {
- HAL_GPIO_WritePin(GPIO_TX_PORT, GPIO_TX_PIN, GPIO_PIN_RESET);
-}
-
/* Set PHY GPIO_HARD_FAULT to '1' */
void gpio_lld_phy_gpioHardFault_up(void) {
HAL_GPIO_WritePin(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN, GPIO_PIN_SET);
@@ -152,462 +51,82 @@ void gpio_lld_phy_gpioHardFault_down(void) {
HAL_GPIO_WritePin(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN, GPIO_PIN_RESET);
}
-/* Set PHY GPIO_1 to '1' */
-void gpio_lld_phy_gpio1_up(void) {
- HAL_GPIO_WritePin(GPIO_1_PORT, GPIO_1_PIN, GPIO_PIN_SET);
-}
-
-/* Set PHY GPIO_1 to '0' */
-void gpio_lld_phy_gpio1_down(void) {
- HAL_GPIO_WritePin(GPIO_1_PORT, GPIO_1_PIN, GPIO_PIN_RESET);
-}
-
-/* Set PHY GPIO_2 to '1' */
-void gpio_lld_phy_gpio2_up(void) {
- HAL_GPIO_WritePin(GPIO_2_PORT, GPIO_2_PIN, GPIO_PIN_SET);
-}
-
-/* Set PHY GPIO_2 to '0' */
-void gpio_lld_phy_gpio2_down(void) {
- HAL_GPIO_WritePin(GPIO_2_PORT, GPIO_2_PIN, GPIO_PIN_RESET);
-}
-
-/* De-initialize GPIOs fused by PHY valid CLI */
-void gpio_lld_phy_deInit(void) {
- HAL_GPIO_DeInit(GPIO_TX_PORT, GPIO_TX_PIN);
- HAL_GPIO_DeInit(GPIO_HARD_FAULT_PORT, GPIO_HARD_FAULT_PIN);
- HAL_GPIO_DeInit(GPIO_1_PORT, GPIO_1_PIN);
- HAL_GPIO_DeInit(GPIO_2_PORT, GPIO_2_PIN);
-}
-
-/* Initialize GPIOs for MCO use */
-void gpio_lld_mco_init(uint32_t mcoSource, uint32_t mcoDiv) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
- //HAL_RCC_MCOConfig(RCC_MCO3, mcoSource, mcoDiv);
- LL_RCC_ConfigMCO(mcoSource, mcoDiv);
-
- /* Enable clock(s) for GPIOs */
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
-#endif
-
- // configure the GPIO PA15 in AF6 to be used as MCO
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF6_MCO;
- GPIO_InitStruct.Pin = GPIO_MCO_PIN;
- HAL_GPIO_Init(GPIO_MCO_PORT, &GPIO_InitStruct);
-}
-
-/* De-initialize GPIOs for external PA use */
-void gpio_lld_mco_deInit(void) {
- HAL_GPIO_DeInit(GPIO_MCO_PORT, GPIO_MCO_PIN);
- //HAL_RCC_MCOConfig(RCC_MCO3, RCC_MCO1SOURCE_NOCLOCK, RCC_MCODIV_1);
- LL_RCC_ConfigMCO(RCC_MCO1SOURCE_NOCLOCK, RCC_MCODIV_1);
-}
-
-/* Initialize GPIOs for external PA use */
-void gpio_lld_extPa_init(void) {
- GPIO_InitTypeDef GPIO_InitStruct;
+/* Initialize GPIOs used by USART */
+void gpio_lld_usart_init(void)
+{
+ GPIO_InitTypeDef gpioinitstruct = {0};
- /* Enable clock(s) for GPIOs */
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#endif
-
- // configure the GPIO PB0 in AF6 to be used as RF_TX_MOD_EXT_PA
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF6_RF_DTB0;
- GPIO_InitStruct.Pin = GPIO_EXT_PA_TX_PIN;
- HAL_GPIO_Init(GPIO_EXT_PA_TX_PORT, &GPIO_InitStruct);
-
- // configure the GPIO which will be managed by M0 stack to enable Ext PA
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Pin = GPIO_EXT_PA_EN_PIN;
- HAL_GPIO_Init(GPIO_EXT_PA_EN_PORT, &GPIO_InitStruct);
-}
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ USART_TX_GPIO_CLK_ENABLE();
+ USART_RX_GPIO_CLK_ENABLE();
-/* De-initialize GPIOs for external PA use */
-void gpio_lld_extPa_deInit(void) {
- HAL_GPIO_DeInit(GPIO_EXT_PA_TX_PORT, GPIO_EXT_PA_TX_PIN);
- HAL_GPIO_DeInit(GPIO_EXT_PA_EN_PORT, GPIO_EXT_PA_EN_PIN);
-}
+ /* Common configuration to Tx and Rx */
+ gpioinitstruct.Mode = GPIO_MODE_AF_PP;
+ gpioinitstruct.Pull = GPIO_NOPULL;
+ gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-#ifdef USE_SIMU
-/* Initialize GPIOs for master DORY of the SIMU */
-void gpio_lld_SimuMaster_init(void) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
- /* Enable clock(s) for GPIOs */
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#endif
-
- // In DORY master only : initialize GPIO port A pin 0, 1 and, 2 to send CRC result to simulator
- GPIO_InitStruct.Pin = (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ /* Configure USART Tx */
+ gpioinitstruct.Pin = USART_TX_PIN;
+ gpioinitstruct.Alternate = USART_TX_AF;
+ HAL_GPIO_Init(USART_TX_GPIO_PORT, &gpioinitstruct);
- // In DORY master only : initialize GPIO port B pin 8 and pin 9 to be used for debug purposes
- GPIO_InitStruct.Pin = (GPIO_TX_PIN);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH ;
- HAL_GPIO_Init(GPIO_TX_PORT, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = (GPIO_1_PIN);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH ;
- HAL_GPIO_Init(GPIO_1_PORT, &GPIO_InitStruct);
-}
+ /* Configure USART Rx */
+ gpioinitstruct.Pin = USART_RX_PIN;
+ gpioinitstruct.Alternate = USART_RX_AF;
+ HAL_GPIO_Init(USART_RX_GPIO_PORT, &gpioinitstruct);
-/* Initialize GPIOs for slave DORY of the SIMU */
-void gpio_lld_SimuSlave_init(void) {
-// No GPIO to initialize in DORY slave
-}
-#endif
-
-/* Initialize GPIOs used by USART */
-void gpio_lld_usart_init(void) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
- /* Enable clock(s) for GPIOs used by USART */
-#if USE_NEW_SET_OF_GPIO_FOR_USART
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
-#endif
-#else
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#endif
-#endif
-
- /* USART1 GPIO Configuration
- USART1_TX : PB6
- USART1_RX : PB7
- */
-#if USE_NEW_SET_OF_GPIO_FOR_USART
- GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-#else
- GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-#endif
+ /*** Configure the USART peripheral ***/
+ /* Enable USART clock */
+ USART_CLK_ENABLE();
}
/* De-initialize GPIOs used by USART */
void gpio_lld_usart_deInit(void) {
- /* USART1 GPIO Configuration
- USART1_TX : PB6
- USART1_RX : PB7
- */
-#if USE_NEW_SET_OF_GPIO_FOR_USART
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
-#else
- HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
- HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
-#endif
-
- /* Do not disable clocks as they could be used by others GPIOs and it seems to not need power in STOP mode */
+ HAL_GPIO_DeInit(USART_TX_GPIO_PORT, USART_TX_PIN);
+ HAL_GPIO_DeInit(USART_RX_GPIO_PORT, USART_RX_PIN);
+ /* Do not disable clocks as they could be used by others GPIOs and it seems
+ to not need power in STOP mode */
}
/* Initialize GPIOs used by LPUART */
-void gpio_lld_lpuart_init(void) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
-#ifdef STM32WB35xx
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#endif
-#else
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOC_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOC_CLK_ENABLE();
-#endif
-#endif
-
- /* LPUART1 GPIO Configuration
- LPUART1_TX : PB5 on Little DORY or PC1 on DORY
- LPUART1_RX : PA3 on Little DORY or PC0 on DORY
- */
-#ifdef STM32WB35xx
- GPIO_InitStruct.Pin = GPIO_PIN_3;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = GPIO_PIN_5;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-#else
- GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-#endif
-}
+void gpio_lld_lpuart_init(void)
+{
+ GPIO_InitTypeDef gpioinitstruct = {0};
-/* De-initialize GPIOs used by LPUART */
-void gpio_lld_lpuart_deInit(void) {
- /* LPUART1 GPIO Configuration
- LPUART1_TX : PB5 on Little DORY PC1 on DORY
- LPUART1_RX : PA3 on Little DORY PC0 on DORY
- */
-#ifdef STM32WB35xx
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3);
- HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5);
-#else
- HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0 | GPIO_PIN_1);
-#endif
- /* Do not disable clocks as they could be used by others GPIOs and it seems to not need power in STOP mode */
-}
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ LPUART_TX_GPIO_CLK_ENABLE();
+ LPUART_RX_GPIO_CLK_ENABLE();
-#if !defined (USE_SIMU) && !defined(USE_FPGA)
-/* Initialize GPIO PA2 (for debug use only) */
-void gpio_lld_pa2_init(uint8_t mode) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
- /* Enable clock(s) for GPIOs */
-#ifdef CORE_CM4
- // Enable GPIO clocks for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
-#else
- // Enable GPIO clocks for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
-#endif
-
- if (mode == 0) {
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
- if (mode == 1) {
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
- if (mode == 2) {
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF6_RF_DTB7;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
- if (mode == 3) {
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
- if (mode == 4) {
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
- if (mode == 5) {
- GPIO_InitStruct.Pin = GPIO_PIN_2;
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
-}
+ /* Common configuration to Tx and Rx */
+ gpioinitstruct.Mode = GPIO_MODE_AF_PP;
+ gpioinitstruct.Pull = GPIO_NOPULL;
+ gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-/* De-initialize GPIO PA2 (for debug use only) */
-void gpio_lld_pa2_deInit(void) {
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2);
-}
+ /* Configure LPUART Tx */
+ gpioinitstruct.Pin = LPUART_TX_PIN;
+ gpioinitstruct.Alternate = LPUART_TX_AF;
+ HAL_GPIO_Init(LPUART_TX_GPIO_PORT, &gpioinitstruct);
-/*
- * Initialize GPIOs needed by DTB mode chosen (for debug use only).
- * Only DTB0 and DTB7 configurations are coded until now.
- * Do not forget to program the RF SPI register addr 0x30 () with the DTB cfg and DTB enable.
- */
-void gpio_lld_dtb_init(uint8_t dtbMode) {
- GPIO_InitTypeDef GPIO_InitStruct;
- uint32_t usePA = 0, pinPA = 0;
- uint32_t usePB = 0, pinPB = 0;
- uint32_t usePC = 0, pinPC = 0;
-
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-
- if (dtbMode == 0) {
- GPIO_InitStruct.Alternate = GPIO_AF6_RF_DTB0;
-
- usePA = 1;
- pinPA = (GPIO_PIN_0 | GPIO_PIN_1| GPIO_PIN_2| GPIO_PIN_3| GPIO_PIN_4 |
- GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9);
-
- usePC = 1;
- pinPC = (GPIO_PIN_14 | GPIO_PIN_15);
- }
-
- if (dtbMode == 7) {
- GPIO_InitStruct.Alternate = GPIO_AF6_RF_DTB7;
-
- usePA = 1;
-#ifdef STM32WB35xx
- pinPA = (GPIO_PIN_8 | GPIO_PIN_9| GPIO_PIN_10| GPIO_PIN_11| GPIO_PIN_13| GPIO_PIN_14);
-#else
- pinPA = (GPIO_PIN_8 | GPIO_PIN_9| GPIO_PIN_10| GPIO_PIN_11);
-#endif
-
- usePB = 1;
-#ifdef STM32WB35xx
- //pinPB = (GPIO_PIN_2 | GPIO_PIN_7 | GPIO_PIN_8| GPIO_PIN_10| GPIO_PIN_11);
- // PB 7 is in conflict with USART
- pinPB = (GPIO_PIN_2 | GPIO_PIN_8);
-#else
- //pinPB = (GPIO_PIN_2 | GPIO_PIN_7 | GPIO_PIN_8| GPIO_PIN_10| GPIO_PIN_11);
- // PB 7 is in conflict with USART
- pinPB = (GPIO_PIN_2 | GPIO_PIN_8| GPIO_PIN_10| GPIO_PIN_11);
-#endif
- }
-
- if (usePA == 1) {
-#ifdef CORE_CM4
- // Enable GPIO PA clock for M4 use
- __HAL_RCC_GPIOA_CLK_ENABLE();
-#else
- // Enable GPIO PA clock for M0 use
- __HAL_RCC_C2GPIOA_CLK_ENABLE();
-#endif
-
- GPIO_InitStruct.Pin = pinPA;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- }
-
- if (usePB == 1) {
-#ifdef CORE_CM4
- // Enable GPIO PB clock for M4 use
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#else
- // Enable GPIO PB clock for M0 use
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#endif
-
- GPIO_InitStruct.Pin = pinPB;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- }
-
- if (usePC == 1) {
-#ifdef CORE_CM4
- // Enable GPIO PC clock for M4 use
- __HAL_RCC_GPIOC_CLK_ENABLE();
-#else
- // Enable GPIO PC clock for M0 use
- __HAL_RCC_C2GPIOC_CLK_ENABLE();
-#endif
-
- GPIO_InitStruct.Pin = pinPC;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- }
-}
+ /* Configure LPUART Rx */
+ gpioinitstruct.Pin = LPUART_RX_PIN;
+ gpioinitstruct.Alternate = LPUART_RX_AF;
+ HAL_GPIO_Init(LPUART_RX_GPIO_PORT, &gpioinitstruct);
-void gpio_lld_dtb_deInit(void) {
- GPIO_InitTypeDef GPIO_InitStruct;
-
-#ifdef CORE_CM4
- // Enable GPIO PB clock for M4 use
- __HAL_RCC_GPIOB_CLK_ENABLE();
-#else
- // Enable GPIO PB clock for M0 use
- __HAL_RCC_C2GPIOB_CLK_ENABLE();
-#endif
-
- // configure the GPIO to be set to '1' during frame TX
- GPIO_InitStruct.Pin = (GPIO_PIN_8);
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH ;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_RESET);
+ /*** Configure the LPUART peripheral ***/
+ /* Enable LPUART clock */
+ LPUART_CLK_ENABLE();
}
-#endif /* ! USE_SIMU and ! USE_FPGA */
-// Do not initialize LED GPIOs as they are already initialized by BSP if possible (depending on board and possible GPIOs conflicts).
-// So just offer the toggle possibility for debug purposes
-/* Toggle LED1 */
-void gpio_lld_led1_toggle(void) {
- HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_5);
+/* De-initialize GPIOs used by LPUART */
+void gpio_lld_lpuart_deInit(void) {
+ HAL_GPIO_DeInit(LPUART_TX_GPIO_PORT, LPUART_TX_PIN);
+ HAL_GPIO_DeInit(LPUART_RX_GPIO_PORT, LPUART_RX_PIN);
+ /* Do not disable clocks as they could be used by others GPIOs and it seems
+ to not need power in STOP mode */
}
-/* Toggle LED2 */
-void gpio_lld_led2_toggle(void) {
- HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_0);
-}
-/* Toggle LED3 */
-void gpio_lld_led3_toggle(void) {
- HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_1);
-}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c
index 8ea61633f..3c842b29a 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c
@@ -61,123 +61,81 @@ void (*HW_hlpuart1TxCb)(void);
#endif
/* Functions Definition ------------------------------------------------------*/
-#if (CFG_HW_LPUART1_ENABLED == 1)
-/**
- * @brief LPUART1 Initialization Function
- * @param None
- * @retval None
- */
-void MX_LPUART1_UART_Init(void)
-{
- hlpuart1.Instance = LPUART1;
- hlpuart1.Init.BaudRate = 115200;
- hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
- hlpuart1.Init.StopBits = UART_STOPBITS_1;
- hlpuart1.Init.Parity = UART_PARITY_NONE;
- hlpuart1.Init.Mode = UART_MODE_TX_RX;
- hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- hlpuart1.Init.OverSampling = UART_OVERSAMPLING_16;
- hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
- hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- hlpuart1.FifoMode = UART_FIFOMODE_DISABLE;
- if (HAL_UART_Init(&hlpuart1) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK)
- {
- Error_Handler();
- }
-}
-void MX_LPUART1_UART_DeInit(void)
+void MX_UART_Init(hw_uart_id_t uart)
{
- hlpuart1.Instance = LPUART1;
- hlpuart1.Init.BaudRate = 115200;
- hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
- hlpuart1.Init.StopBits = UART_STOPBITS_1;
- hlpuart1.Init.Parity = UART_PARITY_NONE;
- hlpuart1.Init.Mode = UART_MODE_TX_RX;
- hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- hlpuart1.Init.OverSampling = UART_OVERSAMPLING_16;
- hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
- hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- hlpuart1.FifoMode = UART_FIFOMODE_DISABLE;
- if (HAL_UART_DeInit(&hlpuart1) != HAL_OK)
- {
- Error_Handler();
- }
-}
+ UART_HandleTypeDef *handle = NULL;
+ USART_TypeDef *instance = NULL;
+ switch(uart){
+ case hw_uart1:
+#if (CFG_HW_USART1_ENABLED != 1)
+ return;
#endif
-
-#if (CFG_HW_USART1_ENABLED == 1)
-/**
- * @brief USART1 Initialization Function
- * @param None
- * @retval None
- */
-void MX_USART1_UART_Init(void)
-{
- huart1.Instance = USART1;
- huart1.Init.BaudRate = 115200;
- huart1.Init.WordLength = UART_WORDLENGTH_8B;
- huart1.Init.StopBits = UART_STOPBITS_1;
- huart1.Init.Parity = UART_PARITY_NONE;
- huart1.Init.Mode = UART_MODE_TX_RX;
- huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
- huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- huart1.FifoMode = UART_FIFOMODE_DISABLE;
- if (HAL_UART_Init(&huart1) != HAL_OK)
+ handle = &huart1;
+ instance = USART1;
+ break;
+ case hw_lpuart1:
+#if (CFG_HW_LPUART1_ENABLED != 1)
+ return;
+#endif
+ handle = &hlpuart1;
+ instance = LPUART1;
+ break;
+ default: Error_Handler();
+ }
+ handle->Instance = instance;
+ handle->Init.BaudRate = 115200;
+ handle->Init.WordLength = UART_WORDLENGTH_8B;
+ handle->Init.StopBits = UART_STOPBITS_1;
+ handle->Init.Parity = UART_PARITY_NONE;
+ handle->Init.Mode = UART_MODE_TX_RX;
+ handle->Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ handle->Init.OverSampling = UART_OVERSAMPLING_16;
+ handle->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ handle->Init.ClockPrescaler = UART_PRESCALER_DIV1;
+ handle->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ handle->FifoMode = UART_FIFOMODE_DISABLE;
+ if (HAL_UART_Init(handle) != HAL_OK)
{
Error_Handler();
}
- if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+ if (HAL_UARTEx_SetTxFifoThreshold(handle, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
- if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+ if (HAL_UARTEx_SetRxFifoThreshold(handle, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
- if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+ if (HAL_UARTEx_DisableFifoMode(handle) != HAL_OK)
{
Error_Handler();
}
}
-void MX_USART1_UART_DeInit(void)
+void MX_UART_Deinit(hw_uart_id_t uart)
{
- huart1.Instance = USART1;
- huart1.Init.BaudRate = 115200;
- huart1.Init.WordLength = UART_WORDLENGTH_8B;
- huart1.Init.StopBits = UART_STOPBITS_1;
- huart1.Init.Parity = UART_PARITY_NONE;
- huart1.Init.Mode = UART_MODE_TX_RX;
- huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
- huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- huart1.FifoMode = UART_FIFOMODE_DISABLE;
- if (HAL_UART_DeInit(&huart1) != HAL_OK)
+ UART_HandleTypeDef *handle = NULL;
+ switch(uart){
+ case hw_uart1:
+#if (CFG_HW_USART1_ENABLED != 1)
+ return;
+#endif
+ handle = &huart1;
+ break;
+ case hw_lpuart1:
+#if (CFG_HW_LPUART1_ENABLED != 1)
+ return;
+#endif
+ handle = &hlpuart1;
+ break;
+ default: Error_Handler();
+ }
+ if (HAL_UART_DeInit(handle) != HAL_OK)
{
Error_Handler();
}
}
-#endif
hw_status_t HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
{
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/main.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/main.c
index 05eb692a4..03067aa28 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/main.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/main.c
@@ -68,12 +68,11 @@
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
-TIM_HandleTypeDef htim2;
+
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
static void MX_DMA_Init(void);
-static void MX_TIM2_Init(void);
/* USER CODE BEGIN PFP */
static void SystemClock_Config(void);
@@ -116,29 +115,24 @@ int main(void)
Reset_Device();
Config_HSE();
/* USER CODE END Init */
-
+
/* Configure the system clock on HSE without using PLL and the periph clock needed by this application */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
PeriphClock_Config();
Init_Exti();
-
+
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_DMA_Init();
- MX_TIM2_Init();
- /* USER CODE BEGIN 2 */
- if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
- {
- Error_Handler();
- }
+
/* USER CODE END 2 */
-
+
/* Init code for STM32_WPAN */
APPE_Init();
-
+
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
@@ -163,7 +157,7 @@ void SystemClock_Config_HSE(uint32_t usePLL)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
+
/* First, just set MSI ON (with the 32Mhz range) in case it was OFF, without any update on PLL */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -183,7 +177,7 @@ void SystemClock_Config_HSE(uint32_t usePLL)
/* Initialization Error */
Error_Handler();
}
-
+
/* Configure HSE and PLL if needed*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
@@ -201,9 +195,9 @@ void SystemClock_Config_HSE(uint32_t usePLL)
{
Error_Handler();
}
-
+
/* Configure the system clock source and the dividers according to the fact that system clock source is 32Mhz */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
if (usePLL == 1)
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
@@ -218,10 +212,10 @@ void SystemClock_Config_HSE(uint32_t usePLL)
{
Error_Handler();
}
-
+
// Note that function UTILS_SetFlashLatency() could be used to set the correct Flash latency
// (with 32Mhz, 2WS are needed if the range is changed to 1V instead of 1.2V)
-
+
/* Disable MSI Oscillator as the MSI is no more needed by the application */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
@@ -243,7 +237,7 @@ void SystemClock_Config_MSI(uint32_t usePLL)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
+
/* First, just set HSE ON (with the 32Mhz range) in case it was OFF, without any update on PLL */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
@@ -261,7 +255,7 @@ void SystemClock_Config_MSI(uint32_t usePLL)
/* Initialization Error */
Error_Handler();
}
-
+
/* Configure MSI and PLL if needed*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -282,9 +276,9 @@ void SystemClock_Config_MSI(uint32_t usePLL)
/* Initialization Error */
Error_Handler();
}
-
+
/* Configure the system clock source and the dividers according to the fact that system clock source is 32Mhz */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
if (usePLL == 1)
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
@@ -299,7 +293,7 @@ void SystemClock_Config_MSI(uint32_t usePLL)
{
Error_Handler();
}
-
+
/* HSE cannot be stopped while using RF */
#if 0
/* Disable HSE Oscillator as the HSE is no more needed by the application */
@@ -320,19 +314,19 @@ void SystemClock_Config_MSI(uint32_t usePLL)
*
*************************************************************/
/**
- * @brief System Clock Configuration : must be called during application start-up
+ * @brief System Clock Configuration : must be called during application start-up
* @retval None
*/
static void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-
+
/* Configure LSE Drive Capability */
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
/* Assuming that MSI is enabled by default after boot, lets go to HSE without using PLL */
SystemClock_Config_HSE(0);
-
+
/* Configure Others clock */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI |
RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI2;
@@ -348,40 +342,28 @@ static void SystemClock_Config(void)
}
}
-/**
+/**
* Enable DMA controller clock
*/
-static void MX_DMA_Init(void)
+static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMAMUX1_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
-#ifdef STM32WB35xx
- __HAL_RCC_DMA2_CLK_ENABLE();
-#endif
-
+
/* DMA interrupt init */
-#ifdef STM32WB35xx
/* DMA1_Channel4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
- /* DMA2_Channel4_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA2_Channel4_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(DMA2_Channel4_IRQn);
-#else
- /* DMA1_Channel1_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
- /* DMA1_Channel2_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
-#endif
+ /* DMA1_Channel5_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
}
static void PeriphClock_Config(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
+
#if USE_SMPS_ENABLED_BY_DEFAULT
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
@@ -393,7 +375,7 @@ static void PeriphClock_Config(void)
{
Error_Handler();
}
-
+
/* Initialize SMPS here like in BLE applis */
LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
@@ -408,7 +390,7 @@ static void PeriphClock_Config(void)
Error_Handler();
}
#endif
-
+
return;
}
@@ -433,10 +415,10 @@ static void Reset_Device( void )
{
#if ( CFG_HW_RESET_BY_FW == 1 )
Reset_BackupDomain();
-
+
Reset_IPCC();
#endif
-
+
return;
}
@@ -482,17 +464,17 @@ static void Reset_BackupDomain( void )
if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE))
{
HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
-
+
/**
* Write twice the value to flush the APB-AHB bridge
* This bit shall be written in the register before writing the next one
*/
HAL_PWR_EnableBkUpAccess();
-
+
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
}
-
+
return;
}
@@ -501,53 +483,8 @@ static void Init_Exti( void )
/**< Disable all wakeup interrupt on CPU1 except LPUART(25), IPCC(36), HSEM(38) */
LL_EXTI_DisableIT_0_31( (~0) & (~(LL_EXTI_LINE_25)) );
LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) );
-
- return;
-}
-
-/**
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM2_Init(void)
-{
-
- /* USER CODE BEGIN TIM2_Init 0 */
-
- /* USER CODE END TIM2_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
-
- /* USER CODE BEGIN TIM2_Init 1 */
-
- /* USER CODE END TIM2_Init 1 */
- htim2.Instance = TIM2;
- htim2.Init.Prescaler = PRESCALER_VALUE;
- htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim2.Init.Period = PERIOD_VALUE;
- htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
- {
- Error_Handler();
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
- {
- Error_Handler();
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM2_Init 2 */
-
- /* USER CODE END TIM2_Init 2 */
+ return;
}
/*************************************************************
@@ -606,7 +543,7 @@ void Error_Handler(void)
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
-{
+{
/* USER CODE BEGIN assert_failed */
/* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/pressbutton_app.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/pressbutton_app.c
deleted file mode 100644
index 9aaa61866..000000000
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/pressbutton_app.c
+++ /dev/null
@@ -1,407 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * File Name : pressbutton_app.c
- * Description : BLE LLD validation Application.
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Includes ------------------------------------------------------------------*/
-#include "app_common.h"
-#include "shci.h"
-#include "stm32_seq.h"
-#include "stm32_lpm.h"
-#include "stm_logging.h"
-#include "dbg_trace.h"
-#include "ble_lld.h"
-#include "app_ble_lld.h"
-#include "pressbutton_app.h"
-#include "ring_buffer.h"
-
-/* Private includes -----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
-/* Private defines -----------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-#define PRESS_CHANNEL_1 8
-#define PRESS_CHANNEL_2 9
-#define PRESS_ID 0x5A964129
-#define PRESS_WAKEUP 9876
-#define PRESS_RECEIVE 19876
-#define PRESS_RECEIVE_ACK 576
-#define BACK2BACK_TIME 50
-
-/* Routines options */
-#define PRESS_PACKET_NUMBER 500 // NB of Successif PACKET using LL Send or Receive
-#define PRESS_PACKET_NUMBER_TX 500 // NB of Successif PACKET using HAL Send
-#define PRESS_PACKET_NUMBER_RX 400 // NB of Successif PACKET using HAL Receive
-#define PRESS_PACKET_STOP_RX 0 // Stop after RX
-/* USER CODE END PD */
-
-/* Private macros ------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-static void m0CmdProcess(void);
-
-static void BUTTON_SW1_BLE_Init(void);
-static void BUTTON_SW2_SendPacket(void);
-static void BUTTON_SW3_ReceivePacket(void);
-
-static void Appli_m0CmdProcess_RadioStop(void);
-static void Appli_m0CmdProcess_RadioEnd(void);
-static void Appli_m0CmdProcess_RxAck(void);
-static void Appli_m0CmdProcess_RxOk(void);
-static void Appli_m0CmdProcess_RxAckEnd(void);
-static void Appli_m0CmdProcess_RxOkEnd(void);
-
-static void bleInit(void);
-static void bleSend(void);
-static void bleReceive(void);
-/* USER CODE END PFP */
-
-/* Private variables -----------------------------------------------*/
-/* USER CODE BEGIN PV */
-static bool Toggle_in_progress = false; // used for LED toggle
-static uint32_t number_of_TXRX=0;
-static uint32_t number_of_RXACK=0;
-
-static bool init_done = false;
-
-/* data buffer Tab to send TX */
-
-static uint8_t presstxBuffer[TXRX_BUF_SIZE] ={0x95,0xFF,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x73,0x65,0x70,0x68,0x26,0x48,0x6F,0x73,
-0x8A,0xA8,0xBB,0xFF,0x8A,0xA8,0xA8,0xA8,
-};
-
-/* data buffer ACK Tab to send TX ACK after RX */
-static uint8_t pressAcktxBuffer[TXRX_BUF_SIZE] ={0x60,0x0D,
-0x4a,0x75,0x6c,0x69,0x65,0x6e,0x2b,0x4d,0x61,0x72,0x69,0x6e,0x65,
-};
-
-/* data buffer Tab to receive RX */
-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static uint8_t pressrxBuffer[TXRX_BUF_SIZE];
-
-/* data buffer ACK Tab to receive RX ACK after TX */
-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static uint8_t pressAckrxBuffer[TXRX_BUF_SIZE];
-
-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static ActionPacket pressPacket[ACTION_PACKET_NB];
-
-/* LED blinking during TX/RX */
-static Led_TypeDef ledTxRx=LED_BLUE;
-
-/* Hot config */
-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static uint32_t BLE_LLD_hot_ana_config_table[BLE_HOT_ANA_CONFIG_TABLE_LENGTH/4];
-
-/* Timer for LED blink */
-extern TIM_HandleTypeDef htim2;
-
-/* USER CODE END PV */
-
-/* Functions Definition ------------------------------------------------------*/
-/* USER CODE BEGIN FD */
-
-void PRESSBUTTON_APP_Init(void)
-{
- /* Check the compatibility with the Coprocessor Wireless Firmware loaded */
- CheckWirelessFirmwareInfo();
-
- /* Do not allow standby in the application */
- UTIL_LPM_SetOffMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE);
- /* Disable low power mode for now, may be enable later depending on configuration */
- UTIL_LPM_SetStopMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE );
-
- /* Register tasks for event processing */
- UTIL_SEQ_RegTask( 1<<CFG_TASK_CMD_FROM_M0_TO_M4, UTIL_SEQ_RFU, m0CmdProcess);
- UTIL_SEQ_RegTask( 1<<CFG_TASK_HAL_BLE_INIT, UTIL_SEQ_RFU, BUTTON_SW1_BLE_Init);
- UTIL_SEQ_RegTask( 1<<CFG_TASK_HAL_BLE_SENDPACKET, UTIL_SEQ_RFU, BUTTON_SW2_SendPacket);
- UTIL_SEQ_RegTask( 1<<CFG_TASK_HAL_BLE_RECEIVEPACKET, UTIL_SEQ_RFU, BUTTON_SW3_ReceivePacket);
-
- /* Register callbacks for radio events processing */
- BLE_LLD_PRX_ReplyTaskCbRegister(CMD_FROM_M0_RADIO_STOP, Appli_m0CmdProcess_RadioStop);
- BLE_LLD_PRX_ReplyTaskCbRegister(CMD_FROM_M0_RADIO_END, Appli_m0CmdProcess_RadioEnd);
- BLE_LLD_PRX_ReplyTaskCbRegister(CMD_FROM_M0_RADIO_RXACK, Appli_m0CmdProcess_RxAck);
- BLE_LLD_PRX_ReplyTaskCbRegister(CMD_FROM_M0_RADIO_RXOK, Appli_m0CmdProcess_RxOk);
- BLE_LLD_PRX_ReplyTaskCbRegister(CMD_FROM_M0_RADIO_RXACKEND, Appli_m0CmdProcess_RxAckEnd);
- BLE_LLD_PRX_ReplyTaskCbRegister(CMD_FROM_M0_RADIO_RXOKEND, Appli_m0CmdProcess_RxOkEnd);
-
- BLE_LLD_PRX_Init(APP_BLE_LLD_SendCmdM0);
-
- APP_BLE_LLD_Init();
-
- HAL_TIM_Base_Init(&htim2);
-}
-
-/* Route button event to processing task */
-void Appli_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
-{
- switch (GPIO_Pin)
- {
- case BUTTON_SW1_PIN:
- UTIL_SEQ_SetTask(1U << CFG_TASK_HAL_BLE_INIT, CFG_SCH_PRIO_0);
- break;
-
- case BUTTON_SW2_PIN:
- UTIL_SEQ_SetTask(1U << CFG_TASK_HAL_BLE_SENDPACKET, CFG_SCH_PRIO_0);
- break;
-
- case BUTTON_SW3_PIN:
- UTIL_SEQ_SetTask(1U << CFG_TASK_HAL_BLE_RECEIVEPACKET, CFG_SCH_PRIO_0);
- break;
-
- default:
- break;
-
- }
- return;
-}
-
-void Appli_TIM_IC_CaptureCallback(void)
-{
-}
-
-static void m0CmdProcess(void)
-{
- BLE_LLD_PRX_ReplyTaskCbDispatch();
-}
-
-static void Appli_m0CmdProcess_RadioStop(void)
-{
- logUart("Radio STOP : RXACK:%d RX:%d",number_of_RXACK ,number_of_TXRX);
- number_of_RXACK=0;
- number_of_TXRX=0;
-}
-
-static void Appli_m0CmdProcess_RadioEnd(void)
-{
- HAL_TIM_Base_Stop_IT(&htim2);
- Toggle_in_progress = false;
- BSP_LED_On(LED_RED);
- BSP_LED_On(LED_GREEN);
- logUart("Radio END: RXACK:%d RX:%d",number_of_RXACK ,number_of_TXRX);
- number_of_RXACK=0;
- number_of_TXRX=0;
-}
-
-static void Appli_m0CmdProcess_RxAck(void)
-{
- number_of_RXACK++;
- if(!Toggle_in_progress){
- Toggle_in_progress = true;
- HAL_TIM_Base_Start_IT(&htim2);
- }
- logUart("Radio RXACK %d",number_of_RXACK);
-}
-
-static void Appli_m0CmdProcess_RxOk(void)
-{
- number_of_TXRX++;
- if(!Toggle_in_progress){
- Toggle_in_progress = true;
- HAL_TIM_Base_Start_IT(&htim2);
- }
- logUart("Radio RX %d",number_of_TXRX);
-}
-
-static void Appli_m0CmdProcess_RxAckEnd(void)
-{
- number_of_RXACK++;
- HAL_TIM_Base_Stop_IT(&htim2);
- Toggle_in_progress = false;
- BSP_LED_On(LED_RED);
- BSP_LED_On(LED_GREEN);
- logUart("Radio END: RXACK:%d",number_of_RXACK);
- number_of_RXACK=0;
-}
-
-static void Appli_m0CmdProcess_RxOkEnd(void)
-{
- number_of_TXRX++;
- HAL_TIM_Base_Stop_IT(&htim2);
- Toggle_in_progress = false;
- BSP_LED_On(LED_RED);
- BSP_LED_On(LED_GREEN);
- logUart("Radio END: RX:%d",number_of_TXRX);
- number_of_TXRX=0;
-}
-
-/* Appli custom functions */
-static void BUTTON_SW1_BLE_Init(void)
-{
- init_done = false;
- BSP_LED_Toggle(LED_BLUE);
-}
-
-static bool bleInitIfNeeded(void)
-{
- bool needed = !init_done;
- if (!init_done) {
- init_done = true;
- bleInit();
- }
- BSP_LED_On(LED_GREEN);
- BSP_LED_On(LED_RED);
- return needed;
-}
-
-static void BUTTON_SW2_SendPacket(void)
-{
- /* GREEN LED will be blinking during Tx */
- ledTxRx = LED_GREEN;
- if (!bleInitIfNeeded()) {
- bleSend();
- }
- BSP_LED_Off(ledTxRx);
-}
-
-static void BUTTON_SW3_ReceivePacket(void)
-{
- /* RED LED will be blinking during Rx */
- ledTxRx = LED_RED;
- if (!bleInitIfNeeded()) {
- bleReceive();
- }
- BSP_LED_Off(ledTxRx);
-}
-
-
-/* ---------------------------- LLD specific code ----------------------------*/
-static void bleInit(void)
-{
- BLE_LLD_Init(HS_STARTUP_TIME, 1, BLE_LLD_hot_ana_config_table, ENABLE);
- uint8_t map[5]= {0xFF,0xFF,0xFF,0xFF,0xFF};
-
- BLE_LLD_SetChannelMap(STATE_MACHINE_0, &map);
- BLE_LLD_SetChannel(STATE_MACHINE_0,PRESS_CHANNEL_2,0);
- BLE_LLD_SetTxAttributes(STATE_MACHINE_0, PRESS_ID, 0x555555,0);
- BLE_LLD_SetTx_Rx_Phy(STATE_MACHINE_0, TX_PHY_2MBPS, RX_PHY_2MBPS);
- BLE_LLD_SetBackToBackTime(BACK2BACK_TIME);
-
- BLE_LLD_SetChannelMap(STATE_MACHINE_3, &map);
- BLE_LLD_SetChannel(STATE_MACHINE_3, PRESS_CHANNEL_2, 0);
- BLE_LLD_SetTxAttributes(STATE_MACHINE_3, ~PRESS_ID, 0x555555,0);
- BLE_LLD_SetTx_Rx_Phy(STATE_MACHINE_3, TX_PHY_2MBPS, RX_PHY_2MBPS);
- BLE_LLD_SetBackToBackTime(BACK2BACK_TIME);
-}
-
-static void bleSend(void)
-{
- pressPacket[APACKET_0].StateMachineNo = STATE_MACHINE_0;
- pressPacket[APACKET_0].ActionTag = AT_TXRX | AT_PLL_TRIG | AT_TIMER_WAKEUP | AT_RELATIVE;
- pressPacket[APACKET_0].WakeupTime = PRESS_WAKEUP;
- pressPacket[APACKET_0].data = presstxBuffer;
- pressPacket[APACKET_0].next_true = APACKET_1;
- pressPacket[APACKET_0].next_false = APACKET_NULL;
- pressPacket[APACKET_0].condRoutine = condCase_Done;
- pressPacket[APACKET_0].dataRoutine = DATA_ROUT_LL_TXMULTIACK;
- pressPacket[APACKET_0].actionPacketNb = APACKET_0;
- BLE_LLD_SetReservedArea(&pressPacket[APACKET_0]);
-
- pressPacket[APACKET_1].StateMachineNo = STATE_MACHINE_3;
- pressPacket[APACKET_1].ActionTag = 0;
- pressPacket[APACKET_1].WakeupTime = PRESS_WAKEUP;
- pressPacket[APACKET_1].ReceiveWindowLength = PRESS_RECEIVE;
- pressPacket[APACKET_1].data = pressAckrxBuffer;
- pressPacket[APACKET_1].next_true = APACKET_NULL;
- pressPacket[APACKET_1].next_false = APACKET_0;
- pressPacket[APACKET_1].condRoutine = condCase_Done;
- pressPacket[APACKET_1].dataRoutine = DATA_ROUT_LL_TXMULTIACK;
- pressPacket[APACKET_1].actionPacketNb = APACKET_1;
- BLE_LLD_SetReservedArea(&pressPacket[APACKET_1]);
-
- BLE_LLD_PRX_SetdataRoutineMultiOptions(PRESS_PACKET_NUMBER,PRESS_PACKET_STOP_RX);
- BLE_LLD_MakeActionPacketPending(&pressPacket[APACKET_0]);
-}
-
-static void bleReceive(void)
-{
- pressPacket[APACKET_5].StateMachineNo = STATE_MACHINE_0;
- pressPacket[APACKET_5].ActionTag = AT_PLL_TRIG | AT_TIMER_WAKEUP | AT_RELATIVE;
- pressPacket[APACKET_5].WakeupTime = PRESS_WAKEUP;
- pressPacket[APACKET_5].ReceiveWindowLength = PRESS_RECEIVE;
- pressPacket[APACKET_5].data = pressrxBuffer;
- pressPacket[APACKET_5].next_true = APACKET_1;
- pressPacket[APACKET_5].next_false = APACKET_NULL;
- pressPacket[APACKET_5].condRoutine = condCase_Rx;
- pressPacket[APACKET_5].dataRoutine = DATA_ROUT_LL_RXMULTIACK;
- pressPacket[APACKET_5].actionPacketNb = APACKET_5;
- BLE_LLD_SetReservedArea(&pressPacket[APACKET_5]);
-
- pressPacket[APACKET_1].StateMachineNo = STATE_MACHINE_3;
- pressPacket[APACKET_1].ActionTag = AT_TXRX;
- pressPacket[APACKET_1].WakeupTime = PRESS_WAKEUP;
- pressPacket[APACKET_1].data = pressAcktxBuffer;
- pressPacket[APACKET_1].next_true = APACKET_NULL;
- pressPacket[APACKET_1].next_false = APACKET_5;
- pressPacket[APACKET_1].condRoutine = condCase_Done;
- pressPacket[APACKET_1].dataRoutine = DATA_ROUT_LL_RXMULTIACK;
- pressPacket[APACKET_1].actionPacketNb = APACKET_1;
- BLE_LLD_SetReservedArea(&pressPacket[APACKET_1]);
-
- BLE_LLD_PRX_SetdataRoutineMultiOptions(PRESS_PACKET_NUMBER,PRESS_PACKET_STOP_RX);
- BLE_LLD_MakeActionPacketPending(&pressPacket[APACKET_5]);
-}
-
-void Appli_TIM_PeriodElapsedCallback(void)
-{
- BSP_LED_Toggle(ledTxRx);
-}
-/* USER CODE END FD */
-
-/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
-/* USER CODE END FD_WRAP_FUNCTIONS */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32_lpm_if.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32_lpm_if.c
index 7200d866b..e4e8fd597 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32_lpm_if.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32_lpm_if.c
@@ -168,11 +168,7 @@ void PWR_EnterStopMode( void )
/************************************************************************************
* ENTER STOP MODE
***********************************************************************************/
-#if(STM32WB15xx != 0)
- LL_PWR_SetPowerMode( LL_PWR_MODE_STOP1 );
-#else
- LL_PWR_SetPowerMode( LL_PWR_MODE_STOP2 );
-#endif
+ LL_PWR_SetPowerMode(CFG_PWR_MODE_STOP);
LL_LPM_EnableDeepSleep( ); /**< Set SLEEPDEEP bit of Cortex System Control Register */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_hal_msp.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_hal_msp.c
index 9b680a158..b783825ba 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_hal_msp.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_hal_msp.c
@@ -7,11 +7,11 @@
******************************************************************************
* @attention
*
- * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
+ * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
@@ -81,22 +81,16 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USER CODE BEGIN LPUART1_MspInit 0 */
/* USER CODE END LPUART1_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_LPUART1_CLK_ENABLE();
-
+
/* GPIOs configuration */
#if(CFG_DEBUG_TRACE != 0)
gpio_lld_lpuart_init();
#endif
-
+
/* LPUART1 DMA Init */
/* LPUART1_TX Init */
-#ifdef STM32WB35xx
hdma_lpuart1_tx.Instance = DMA1_Channel4;
-#else
- hdma_lpuart1_tx.Instance = DMA1_Channel1;
-#endif
hdma_lpuart1_tx.Init.Request = DMA_REQUEST_LPUART1_TX;
hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
@@ -109,7 +103,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
Error_Handler();
}
-
+
pSyncConfig.SyncSignalID = HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT;
pSyncConfig.SyncPolarity = HAL_DMAMUX_SYNC_NO_EVENT;
pSyncConfig.SyncEnable = DISABLE;
@@ -119,9 +113,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
Error_Handler();
}
-
+
__HAL_LINKDMA(huart,hdmatx,hdma_lpuart1_tx);
-
+
/* LPUART1 interrupt Init */
HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LPUART1_IRQn);
@@ -138,19 +132,16 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
-
+
/* GPIOs configuration */
#if(CFG_DEBUG_TRACE != 0)
gpio_lld_usart_init();
#endif
-
+
+
/* USART1 DMA Init */
/* USART1_TX Init */
-#ifdef STM32WB35xx
- hdma_usart1_tx.Instance = DMA2_Channel4;
-#else
- hdma_usart1_tx.Instance = DMA1_Channel2;
-#endif
+ hdma_usart1_tx.Instance = DMA1_Channel5;
hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
@@ -163,9 +154,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
Error_Handler();
}
-
+
__HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
-
+
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
@@ -192,13 +183,13 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USER CODE END LPUART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LPUART1_CLK_DISABLE();
-
+
/* De-init GPIOs */
gpio_lld_lpuart_deInit();
-
+
/* LPUART1 DMA DeInit */
HAL_DMA_DeInit(huart->hdmatx);
-
+
/* LPUART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(LPUART1_IRQn);
/* USER CODE BEGIN LPUART1_MspDeInit 1 */
@@ -214,13 +205,14 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
-
+
/* De-init GPIOs */
gpio_lld_usart_deInit();
-
+
+
/* USART1 DMA DeInit */
HAL_DMA_DeInit(huart->hdmatx);
-
+
/* USART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_it.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_it.c
index 388150e9f..3b91552d1 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_it.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32wbxx_it.c
@@ -35,7 +35,7 @@
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
-
+
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
@@ -60,12 +60,11 @@
/* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */
-extern TIM_HandleTypeDef htim2;
/* USER CODE END EV */
/******************************************************************************/
-/* Cortex Processor Interruption and Exception Handlers */
+/* Cortex Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
@@ -188,9 +187,7 @@ void SysTick_Handler(void)
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
-#if 0 /* no systick used */
HAL_IncTick();
-#endif
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
@@ -202,8 +199,6 @@ void SysTick_Handler(void)
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32wbxx.s). */
/******************************************************************************/
-
-#ifdef STM32WB35xx
/**
* @brief This function handles DMA1 channel4 global interrupt.
*/
@@ -225,59 +220,21 @@ void DMA1_Channel4_IRQHandler(void)
/**
* @brief This function handles DMA2 channel4 global interrupt.
*/
-void DMA2_Channel4_IRQHandler(void)
+void DMA1_Channel5_IRQHandler(void)
{
- /* USER CODE BEGIN DMA2_Channel4_IRQn 0 */
+ /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
- /* USER CODE END DMA2_Channel4_IRQn 0 */
+ /* USER CODE END DMA1_Channel5_IRQn 0 */
#if (CFG_HW_USART1_ENABLED == 1)
#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
HAL_DMA_IRQHandler(&hdma_usart1_tx);
#endif
#endif
- /* USER CODE BEGIN DMA2_Channel4_IRQn 1 */
+ /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
- /* USER CODE END DMA2_Channel4_IRQn 1 */
+ /* USER CODE END DMA1_Channel5_IRQn 1 */
}
-#else
-/**
- * @brief This function handles DMA1 channel1 global interrupt.
- */
-void DMA1_Channel1_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
-
- /* USER CODE END DMA1_Channel1_IRQn 0 */
-#if (CFG_HW_LPUART1_ENABLED == 1)
-#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
- HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
-#endif
-#endif
- /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
-
- /* USER CODE END DMA1_Channel1_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA1 channel2 global interrupt.
- */
-void DMA1_Channel2_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
-
- /* USER CODE END DMA1_Channel2_IRQn 0 */
-#if (CFG_HW_USART1_ENABLED == 1)
-#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
- HAL_DMA_IRQHandler(&hdma_usart1_tx);
-#endif
-#endif
- /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
-
- /* USER CODE END DMA1_Channel2_IRQn 1 */
-}
-#endif
-
/**
* @brief This function handles USART1 global interrupt.
*/
@@ -317,7 +274,7 @@ void LPUART1_IRQHandler(void)
* @param None
* @retval None
*/
-void PUSH_BUTTON_SW1_EXTI_IRQHandler(void)
+void BUTTON_SW1_EXTI_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BUTTON_SW1_PIN);
}
@@ -328,7 +285,7 @@ void PUSH_BUTTON_SW1_EXTI_IRQHandler(void)
* @param None
* @retval None
*/
-void PUSH_BUTTON_SW2_EXTI_IRQHandler(void)
+void BUTTON_SW2_EXTI_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BUTTON_SW2_PIN);
}
@@ -339,24 +296,18 @@ void PUSH_BUTTON_SW2_EXTI_IRQHandler(void)
* @param None
* @retval None
*/
-void PUSH_BUTTON_SW3_EXTI_IRQHandler(void)
+void BUTTON_SW3_EXTI_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BUTTON_SW3_PIN);
}
-void TIM2_IRQHandler(void)
-{
- HAL_TIM_IRQHandler(&htim2);
-}
-
-
-#if 0 /* Not needed for LLD tests : removed to use less power */
+#if (CFG_LPM_SUPPORTED == 1U)
void RTC_WKUP_IRQHandler(void)
{
HW_TS_RTC_Wakeup_Handler();
}
-#endif /* Not needed for LLD tests : removed to use less power */
+#endif
void IPCC_C1_TX_IRQHandler(void)
{
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/system_stm32wbxx.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/system_stm32wbxx.c
index 2e42904ec..791008e1d 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/system_stm32wbxx.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Src/system_stm32wbxx.c
@@ -60,13 +60,13 @@
******************************************************************************
* @attention
*
- * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
+ * This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -97,9 +97,9 @@
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
-#if !defined (LSI_VALUE)
+#if !defined (LSI_VALUE)
#define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
-#endif /* LSI_VALUE */
+#endif /* LSI_VALUE */
#if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
@@ -161,12 +161,10 @@
const uint32_t MSIRangeTable[16UL] = {100000UL, 200000UL, 400000UL, 800000UL, 1000000UL, 2000000UL, \
4000000UL, 8000000UL, 16000000UL, 24000000UL, 32000000UL, 48000000UL, 0UL, 0UL, 0UL, 0UL}; /* 0UL values are incorrect cases */
-#if defined(STM32WB55xx) || defined(STM32WB35xx)
const uint32_t SmpsPrescalerTable[4UL][6UL]={{1UL,3UL,2UL,2UL,1UL,2UL}, \
{2UL,6UL,4UL,3UL,2UL,4UL}, \
{4UL,12UL,8UL,6UL,4UL,8UL}, \
{4UL,12UL,8UL,6UL,4UL,8UL}};
-#endif
/**
* @}
@@ -192,7 +190,7 @@
void SystemInit(void)
{
/* Configure the Vector Table location add offset address ------------------*/
-#if defined(VECT_TAB_SRAM) && defined(VECT_TAB_BASE_ADDRESS)
+#if defined(VECT_TAB_SRAM) && defined(VECT_TAB_BASE_ADDRESS)
/* program in SRAMx */
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAMx for CPU1 */
#else /* program in FLASH */
@@ -203,7 +201,7 @@ void SystemInit(void)
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << (10UL*2UL))|(3UL << (11UL*2UL))); /* set CP10 and CP11 Full Access */
#endif
-
+
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set MSION bit */
RCC->CR |= RCC_CR_MSION;
@@ -216,10 +214,10 @@ void SystemInit(void)
/*!< Reset LSI1 and LSI2 bits */
RCC->CSR &= (uint32_t)0xFFFFFFFAU;
-
+
/*!< Reset HSI48ON bit */
RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
-
+
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x22041000U;
@@ -227,7 +225,7 @@ void SystemInit(void)
/* Reset PLLSAI1CFGR register */
RCC->PLLSAI1CFGR = 0x22041000U;
#endif
-
+
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
@@ -321,10 +319,10 @@ void SystemCoreClockUpdate(void)
{
pllvco = (msirange / pllm);
}
-
+
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
-
+
SystemCoreClock = pllvco/pllr;
break;
@@ -332,7 +330,7 @@ void SystemCoreClockUpdate(void)
SystemCoreClock = msirange;
break;
}
-
+
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK1 prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewd b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewd
index d69f71208..290b215c5 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewd
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewd
@@ -40,11 +40,11 @@
</option>
<option>
<name>MemOverride</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>MemFile</name>
- <state>$TOOLKIT_DIR$\config\debugger\ST\STM32WB_M4.ddf</state>
+ <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32WB15.ddf</state>
</option>
<option>
<name>RunToEnable</name>
@@ -112,7 +112,7 @@
</option>
<option>
<name>FlashLoadersV3</name>
- <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32WB_M4.board</state>
+ <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32WB15xx.board</state>
</option>
<option>
<name>OCImagesSuppressCheck1</name>
@@ -140,7 +140,7 @@
</option>
<option>
<name>OverrideDefFlashBoard</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>OCImagesOffset1</name>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewp b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewp
index c66971111..24d4fbe25 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewp
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/BLE_LLD_Pressbutton.ewp
@@ -78,7 +78,7 @@
</option>
<option>
<name>OGChipSelectEditMenu</name>
- <state>STM32WB15CC_M4 ST STM32WB15CC_M4</state>
+ <state>STM32WB15CC ST STM32WB15CC</state>
</option>
<option>
<name>GenLowLevelInterface</name>
@@ -138,7 +138,7 @@
</option>
<option>
<name>GFPUDeviceSlave</name>
- <state>STM32WB15CC_M4 ST STM32WB15CC_M4</state>
+ <state>STM32WB15CC ST STM32WB15CC</state>
</option>
<option>
<name>FPU2</name>
@@ -351,21 +351,23 @@
<state>$PROJ_DIR$/../Core/Inc</state>
<state>$PROJ_DIR$/../STM32_WPAN/App</state>
<state>$PROJ_DIR$/../STM32_WPAN/Target</state>
+ <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include</state>
+ <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+ <state>$PROJ_DIR$/../../../../../../Drivers/BSP/NUCLEO-WB15CC</state>
<state>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc</state>
<state>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy</state>
+ <state>$PROJ_DIR$/../../../../../../Utilities/lpm/tiny_lpm</state>
+ <state>$PROJ_DIR$/../../../../../../Utilities/sequencer</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN</state>
+ <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal</state>
+ <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/utilities</state>
- <state>$PROJ_DIR$/../../../../../../Utilities/lpm/tiny_lpm</state>
- <state>$PROJ_DIR$/../../../../../../Utilities/sequencer</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/ble</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template</state>
<state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/ble/core</state>
- <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include</state>
- <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
- <state>$PROJ_DIR$/../../../../../../Drivers/BSP/NUCLEO-WB15CC</state>
</option>
<option>
<name>CCStdIncCheck</name>
@@ -1065,9 +1067,6 @@
<name>$PROJ_DIR$\..\Core\Src\main.c</name>
</file>
<file>
- <name>$PROJ_DIR$\..\Core\Src\pressbutton_app.c</name>
- </file>
- <file>
<name>$PROJ_DIR$\..\Core\Src\stm32_lpm_if.c</name>
</file>
<file>
@@ -1088,10 +1087,7 @@
<name>$PROJ_DIR$\..\STM32_WPAN\App\app_ble_lld.c</name>
</file>
<file>
- <name>$PROJ_DIR$\..\STM32_WPAN\App\ble_lld.c</name>
- </file>
- <file>
- <name>$PROJ_DIR$\..\STM32_WPAN\App\ring_buffer.c</name>
+ <name>$PROJ_DIR$\..\STM32_WPAN\App\pressbutton_app.c</name>
</file>
</group>
<group>
@@ -1186,6 +1182,12 @@
<group>
<name>STM32_WPAN</name>
<file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\ble_lld\hal\ble_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\ble_lld\lld\ble_lld.c</name>
+ </file>
+ <file>
<name>$PROJ_DIR$\..\..\..\..\..\..\Middlewares\ST\STM32_WPAN\utilities\dbg_trace.c</name>
</file>
<file>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/stm32wb15xx_flash_cm4.icf b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/stm32wb15xx_flash_cm4.icf
index 24d925ab9..9888197af 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/stm32wb15xx_flash_cm4.icf
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/EWARM/stm32wb15xx_flash_cm4.icf
@@ -7,7 +7,7 @@ define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/***** FLASH Part dedicated to M4 *****/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0801B800;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000004;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000008;
define symbol __ICFEDIT_region_RAM_end__ = 0x20002FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvoptx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvoptx
new file mode 100644
index 000000000..f038cdcd1
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvoptx
@@ -0,0 +1,793 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>BLE_LLD</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath></ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>18</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>1</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>1</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>6</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32WB1x_320_M4 -FS08000000 -FL050000 -FP0($$Device:STM32WB15CCUx$Drivers\CMSIS\Flash\STM32WB1x_320_M4.FLM))</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ST-LINKIII-KEIL_SWO</Key>
+ <Name>-U066FFF333536414257131032 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32WB1x_320_M4.FLM -FS08000000 -FL050000 -FP0($$Device:STM32WB15CCUx$Drivers\CMSIS\Flash\STM32WB1x_320_M4.FLM)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>1</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Application/MDK-ARM</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>2</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>startup_stm32wb15xx_cm4.s</PathWithFileName>
+ <FilenameWithoutPath>startup_stm32wb15xx_cm4.s</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Application/User/Core</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/app_entry.c</PathWithFileName>
+ <FilenameWithoutPath>app_entry.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/gpio_lld.c</PathWithFileName>
+ <FilenameWithoutPath>gpio_lld.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/hw_uart.c</PathWithFileName>
+ <FilenameWithoutPath>hw_uart.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>5</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/main.c</PathWithFileName>
+ <FilenameWithoutPath>main.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm32_lpm_if.c</PathWithFileName>
+ <FilenameWithoutPath>stm32_lpm_if.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>7</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm32wbxx_hal_msp.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_hal_msp.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>8</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm32wbxx_it.c</PathWithFileName>
+ <FilenameWithoutPath>stm32wbxx_it.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>9</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../Core/Src/stm_logging.c</PathWithFileName>
+ <FilenameWithoutPath>stm_logging.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Application/User/STM32_WPAN/App</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
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diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvprojx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvprojx
new file mode 100644
index 000000000..6a7cd3742
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/BLE_LLD_Pressbutton.uvprojx
@@ -0,0 +1,689 @@
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+
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+ <Vendor>STMicroelectronics</Vendor>
+ <PackID>Keil.STM32WB1x_DFP.0.0.1</PackID>
+ <PackURL>http://www.keil.com/pack</PackURL>
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+ <StartupFile></StartupFile>
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+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
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+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
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+ <HexFormatSelection>1</HexFormatSelection>
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+--diag_suppress 1296</Misc>
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+ <FileType>1</FileType>
+ <FilePath>../../../../../../Utilities/sequencer/stm32_seq.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>::CMSIS</GroupName>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components>
+ <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+ <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
+ <targetInfos>
+ <targetInfo name="BLE_LLD"/>
+ </targetInfos>
+ </component>
+ </components>
+ <files/>
+ </RTE>
+
+ <LayerInfo>
+ <Layers>
+ <Layer>
+ <LayName>&lt;Project Info&gt;</LayName>
+ <LayDesc></LayDesc>
+ <LayUrl></LayUrl>
+ <LayKeys></LayKeys>
+ <LayCat></LayCat>
+ <LayLic></LayLic>
+ <LayTarg>0</LayTarg>
+ <LayPrjMark>1</LayPrjMark>
+ </Layer>
+ </Layers>
+ </LayerInfo>
+
+</Project>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/startup_stm32wb15xx_cm4.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/startup_stm32wb15xx_cm4.s
new file mode 100644
index 000000000..7794948c3
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/startup_stm32wb15xx_cm4.s
@@ -0,0 +1,336 @@
+;******************************************************************************
+;* File Name : startup_stm32wb15xx_cm4.s
+;* Author : MCD Application Team
+;* Description : STM32WB15xx devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the CortexM4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics. All rights reserved.
+;*
+;* This software component is licensed by ST under Apache License, Version 2.0,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/Apache-2.0
+;*
+;******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD and PVM detector
+ DCD TAMP_STAMP_LSECSS_IRQHandler ; RTC Tamper and TimeStamp Interrupts and LSECSS Interrupts
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup Interrupt
+ DCD FLASH_IRQHandler ; FLASH global Interrupt
+ DCD RCC_IRQHandler ; RCC Interrupt
+ DCD EXTI0_IRQHandler ; EXTI Line 0 Interrupt
+ DCD EXTI1_IRQHandler ; EXTI Line 1 Interrupt
+ DCD EXTI2_IRQHandler ; EXTI Line 2 Interrupt
+ DCD EXTI3_IRQHandler ; EXTI Line 3 Interrup
+ DCD EXTI4_IRQHandler ; EXTI Line 4 Interrupt
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 Interrupt
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 Interrupt
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 Interrupt
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 Interrupt
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 Interrupt
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 Interrupt
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 Interrupt
+ DCD ADC1_IRQHandler ; ADC1 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD C2SEV_PWR_C2H_IRQHandler ; CPU M0+ SEV Interrupt
+ DCD COMP_IRQHandler ; COMP1 Interrupts
+ DCD EXTI9_5_IRQHandler ; EXTI Lines [9:5] Interrupt
+ DCD TIM1_BRK_IRQHandler ; TIM1 Break Interrupt
+ DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
+ DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Communication Interrupts
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare Interrupt
+ DCD TIM2_IRQHandler ; TIM2 Global Interrupt
+ DCD PKA_IRQHandler ; PKA Interrupt
+ DCD I2C1_EV_IRQHandler ; I2C1 Event Interrupt
+ DCD I2C1_ER_IRQHandler ; I2C1 Error Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SPI1_IRQHandler ; SPI1 Interrupt
+ DCD 0 ; Reserved
+ DCD USART1_IRQHandler ; USART1 Interrupt
+ DCD LPUART1_IRQHandler ; LPUART1 Interrupt
+ DCD 0 ; Reserved
+ DCD TSC_IRQHandler ; TSC Interrupt
+ DCD EXTI15_10_IRQHandler ; EXTI Lines1[15:10 ]Interrupts
+ DCD RTC_Alarm_IRQHandler ; RTC Alarms (A and B) Interrupt
+ DCD 0 ; Reserved
+ DCD PWR_SOTF_BLEACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR
+ DCD IPCC_C1_RX_IRQHandler ; IPCC CPU1 RX occupied interrupt
+ DCD IPCC_C1_TX_IRQHandler ; IPCC CPU1 RX free interrupt
+ DCD HSEM_IRQHandler ; HSEM0 Interrupt
+ DCD LPTIM1_IRQHandler ; LPTIM1 Interrupt
+ DCD LPTIM2_IRQHandler ; LPTIM2 Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD AES2_IRQHandler ; AES2 Interrupt
+ DCD RNG_IRQHandler ; RNG1 Interrupt
+ DCD FPU_IRQHandler ; FPU Interrupt
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD DMAMUX1_OVR_IRQHandler ; DMAMUX overrun Interrupt
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT TAMP_STAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_IRQHandler [WEAK]
+ EXPORT C2SEV_PWR_C2H_IRQHandler [WEAK]
+ EXPORT COMP_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_IRQHandler [WEAK]
+ EXPORT TIM1_UP_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT PKA_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT TSC_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT PWR_SOTF_BLEACT_RFPHASE_IRQHandler [WEAK]
+ EXPORT IPCC_C1_RX_IRQHandler [WEAK]
+ EXPORT IPCC_C1_TX_IRQHandler [WEAK]
+ EXPORT HSEM_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT LPTIM2_IRQHandler [WEAK]
+ EXPORT AES1_IRQHandler [WEAK]
+ EXPORT AES2_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+C2SEV_PWR_C2H_IRQHandler
+COMP_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_IRQHandler
+TIM1_UP_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+PKA_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+SPI1_IRQHandler
+USART1_IRQHandler
+LPUART1_IRQHandler
+TSC_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+IPCC_C1_RX_IRQHandler
+IPCC_C1_TX_IRQHandler
+HSEM_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+AES1_IRQHandler
+AES2_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+DMAMUX1_OVR_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/stm32wb15xx_flash_cm4.sct b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/stm32wb15xx_flash_cm4.sct
new file mode 100644
index 000000000..28aca4068
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/MDK-ARM/stm32wb15xx_flash_cm4.sct
@@ -0,0 +1,21 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x0001B800 { ; load region size_region
+ ER_IROM1 0x08000000 0x0001B800 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000008 0x2FF8 { ; RW data
+ .ANY (+RW +ZI)
+ }
+ RW_RAM_SHARED 0x20030000 0x2800 { ; RW data
+ *(MAPPING_TABLE)
+ *(MB_MEM1)
+ *(MB_MEM2)
+ }
+ }
+
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.cproject b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..4da18dc26
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.cproject
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1315355370">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1315355370" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1315355370" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+ <folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1315355370." name="/" resourcePath="">
+ <toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.670260761" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1279999279" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32WB15CCUx" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1701700440" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1774287055" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1757817037" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1098284970" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.573351909" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="NUCLEO-WB15CC" valueType="string"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1445002461" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.4 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-WB15CC || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../Core/Inc | ../../STM32_WPAN/App | ../../STM32_WPAN/Target | ../../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include | ../../../../../../../Drivers/CMSIS/Include | ../../../../../../../Drivers/BSP/NUCLEO-WB15CC | ../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc | ../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/lpm/tiny_lpm | ../../../../../../../Utilities/sequencer | ../../../../../../../Middlewares/ST/STM32_WPAN | ../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal | ../../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl | ../../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci | ../../../../../../../Middlewares/ST/STM32_WPAN/utilities | ../../../../../../../Middlewares/ST/STM32_WPAN/ble | ../../../../../../../Middlewares/ST/STM32_WPAN/ble/core/template | ../../../../../../../Middlewares/ST/STM32_WPAN/ble/core || || || CORE_CM4 | BLE_LLD_WB | USE_HAL_DRIVER | STM32WB15xx | USE_STM32WBXX_NUCLEO || || || || || ${workspace_loc:/${ProjName}/STM32WB15CCUX_FLASH.ld} || true || NonSecure || || || || None" valueType="string"/>
+ <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1327541449" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+ <builder buildPath="${workspace_loc:/BLE_LLD_Pressbutton}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.367821347" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.537755242" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.739610717" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+ <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.34775048" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+ </tool>
+ <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1423434112" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1008098624" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+ <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.448250553" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+ <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1414581635" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="DEBUG"/>
+ <listOptionValue builtIn="false" value="CORE_CM4"/>
+ <listOptionValue builtIn="false" value="BLE_LLD_WB"/>
+ <listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+ <listOptionValue builtIn="false" value="STM32WB15xx"/>
+ <listOptionValue builtIn="false" value="USE_STM32WBXX_NUCLEO"/>
+ </option>
+ <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.276709277" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+ <listOptionValue builtIn="false" value="../../Core/Inc"/>
+ <listOptionValue builtIn="false" value="../../STM32_WPAN/App"/>
+ <listOptionValue builtIn="false" value="../../STM32_WPAN/Target"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/NUCLEO-WB15CC"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc"/>
+ <listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy"/>
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diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.project b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.project
new file mode 100644
index 000000000..dc803f229
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/.project
@@ -0,0 +1,249 @@
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+ <name>Utilities/stm32_lpm.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Utilities/lpm/tiny_lpm/stm32_lpm.c</locationURI>
+ </link>
+ <link>
+ <name>Utilities/stm32_seq.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Utilities/sequencer/stm32_seq.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/CMSIS/system_stm32wbxx.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/system_stm32wbxx.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_cortex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_dma.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_dma_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_exti.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_flash.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_flash_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_gpio.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_hsem.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_pwr.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_pwr_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_rcc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_rcc_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_tim.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_tim_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_uart.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/STM32WBxx_HAL_Driver/stm32wbxx_hal_uart_ex.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/ble_hal.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/ble_lld/hal/ble_hal.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/ble_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/ble_lld/lld/ble_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/dbg_trace.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/otp.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/otp.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/shci.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/shci_tl.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/shci_tl_if.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/stm_list.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/stm_list.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/stm_queue.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/utilities/stm_queue.c</locationURI>
+ </link>
+ <link>
+ <name>Middlewares/STM32_WPAN/tl_mbox.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/app_entry.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/app_entry.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/gpio_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/gpio_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/hw_uart.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/hw_uart.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/main.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/main.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32_lpm_if.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32_lpm_if.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32wbxx_hal_msp.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32wbxx_hal_msp.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm32wbxx_it.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm32wbxx_it.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/Core/stm_logging.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/Core/Src/stm_logging.c</locationURI>
+ </link>
+ <link>
+ <name>Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-6-PROJECT_LOC/Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/App/app_ble_lld.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/App/app_ble_lld.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/App/pressbutton_app.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/App/pressbutton_app.c</locationURI>
+ </link>
+ <link>
+ <name>Application/User/STM32_WPAN/Target/hw_ipcc.c</name>
+ <type>1</type>
+ <locationURI>PARENT-1-PROJECT_LOC/STM32_WPAN/Target/hw_ipcc.c</locationURI>
+ </link>
+ </linkedResources>
+</projectDescription>
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s
new file mode 100644
index 000000000..58cc21a82
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/Startup/startup_stm32wb15ccux.s
@@ -0,0 +1,394 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32wb15xx_cm4.s
+ * @author MCD Application Team
+ * @brief STM32WB15xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+* This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/Apache-2.0
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+/* start address for the .MB_MEM2 section. defined in linker script */
+.word _sMB_MEM2
+/* end address for the .MB_MEM2 section. defined in linker script */
+.word _eMB_MEM2
+
+/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
+.macro INIT_BSS start, end
+ ldr r0, =\start
+ ldr r1, =\end
+ movs r3, #0
+ bl LoopFillZerobss
+.endm
+
+/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
+.macro INIT_DATA start, end, src
+ ldr r0, =\start
+ ldr r1, =\end
+ ldr r2, =\src
+ movs r3, #0
+ bl LoopCopyDataInit
+.endm
+
+.section .text.data_initializers
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+ bx lr
+
+FillZerobss:
+ str r3, [r0]
+ adds r0, r0, #4
+
+LoopFillZerobss:
+ cmp r0, r1
+ bcc FillZerobss
+ bx lr
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+/* Call the clock system intitialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ INIT_DATA _sdata, _edata, _sidata
+
+/* Zero fill the bss segments. */
+ INIT_BSS _sbss, _ebss
+ INIT_BSS _sMB_MEM2, _eMB_MEM2
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application s entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word TAMP_STAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_IRQHandler
+ .word 0
+ .word 0
+ .word C2SEV_PWR_C2H_IRQHandler
+ .word COMP_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_IRQHandler
+ .word TIM1_UP_IRQHandler
+ .word TIM1_TRG_COM_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word PKA_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word 0
+ .word 0
+ .word SPI1_IRQHandler
+ .word 0
+ .word USART1_IRQHandler
+ .word LPUART1_IRQHandler
+ .word 0
+ .word TSC_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word 0
+ .word PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ .word IPCC_C1_RX_IRQHandler
+ .word IPCC_C1_TX_IRQHandler
+ .word HSEM_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word LPTIM2_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word AES2_IRQHandler
+ .word RNG_IRQHandler
+ .word FPU_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word DMAMUX1_OVR_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak TAMP_STAMP_LSECSS_IRQHandler
+ .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_IRQHandler
+ .thumb_set ADC1_IRQHandler,Default_Handler
+
+ .weak C2SEV_PWR_C2H_IRQHandler
+ .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
+
+ .weak COMP_IRQHandler
+ .thumb_set COMP_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_IRQHandler
+ .thumb_set TIM1_BRK_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_IRQHandler
+ .thumb_set TIM1_UP_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_IRQHandler
+ .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak PKA_IRQHandler
+ .thumb_set PKA_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak TSC_IRQHandler
+ .thumb_set TSC_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak PWR_SOTF_BLEACT_RFPHASE_IRQHandler
+ .thumb_set PWR_SOTF_BLEACT_RFPHASE_IRQHandler,Default_Handler
+
+ .weak IPCC_C1_RX_IRQHandler
+ .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
+
+ .weak IPCC_C1_TX_IRQHandler
+ .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
+
+ .weak HSEM_IRQHandler
+ .thumb_set HSEM_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak LPTIM2_IRQHandler
+ .thumb_set LPTIM2_IRQHandler,Default_Handler
+
+ .weak AES2_IRQHandler
+ .thumb_set AES2_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak DMAMUX1_OVR_IRQHandler
+ .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/syscalls.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/syscalls.c
new file mode 100644
index 000000000..4ec95844d
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/syscalls.c
@@ -0,0 +1,159 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+//#undef errno
+extern int errno;
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+register char * stack_ptr asm("sp");
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/sysmem.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/sysmem.c
new file mode 100644
index 000000000..d7cc52cd4
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/Application/User/Core/sysmem.c
@@ -0,0 +1,80 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/STM32WB15CCUX_FLASH.ld b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/STM32WB15CCUX_FLASH.ld
new file mode 100644
index 000000000..8f86b87c9
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32CubeIDE/STM32WB15CCUX_FLASH.ld
@@ -0,0 +1,179 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : STM32CubeIDE
+**
+** Abstract : Linker script for STM32WB15xC Device
+** 320Kbytes FLASH
+** 48Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+** All rights reserved.</center></h2>
+**
+** This software component is licensed by ST under BSD 3-Clause license,
+** the "License"; You may not use this file except in compliance with the
+** License. You may obtain a copy of the License at:
+** opensource.org/licenses/BSD-3-Clause
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20003000; /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200 ; /* required amount of heap */
+_Min_Stack_Size = 0x400 ; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 110K
+RAM1 (xrw) : ORIGIN = 0x20000008, LENGTH = 0x2FF8
+RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
+}
+
+/* Define output sections */
+SECTIONS
+{
+ /* The startup code goes first into FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data goes into FLASH */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+ .ARM : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH
+
+ /* used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections goes into RAM, load LMA copy after code */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM1 AT> FLASH
+
+
+ /* Uninitialized data section */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM1
+
+ /* User_heap_stack section, used to check that there is enough RAM left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM1
+
+
+
+ /* Remove information from the standard libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+ MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
+ MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
+ MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
+}
+
+
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.c
index 2f6812ebb..ea1573ea1 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.c
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.c
@@ -1,7 +1,7 @@
/**
******************************************************************************
* File Name : app_ble_lld.c
- * Description : PRESSBUTTON BLE LLD Application.
+ * Description : application utilities.
******************************************************************************
* @attention
*
@@ -16,8 +16,15 @@
******************************************************************************
*/
+/**
+ * This file provides low level utilities for application:
+ * - IPCC for communication with radio MCU
+ * - UART management
+ * - error handling
+ */
+
/* Includes ------------------------------------------------------------------*/
-#include <stdio.h>
+#include <stdbool.h>
#include "app_common.h"
#include "utilities_common.h"
#include "app_entry.h"
@@ -28,9 +35,9 @@
#include "stm32_lpm.h"
#include "stm32_seq.h"
#include "gpio_lld.h"
+#include "stm_queue.h"
#include "ble_lld.h"
#include "app_ble_lld.h"
-#include "ring_buffer.h"
/* Private includes ----------------------------------------------------------*/
@@ -57,16 +64,33 @@ typedef enum
/* Private function prototypes -----------------------------------------------*/
static void uartTxSendChunk(void);
+static void uartRxCpltCallback(void);
+static void m0CmdProcess(void);
/* Private variables ---------------------------------------------------------*/
-BUF_ALLOC(uartTxBufMem, TX_BUFFER_SIZE);
-static Buffer *uartTxBuf = (Buffer *)&uartTxBufMem;
+static queue_t uartTxBuf;
+static uint8_t uartTxBufData[TX_BUFFER_SIZE];
+
static bool txBusy = false;
+static char uartRxBuf;
+static void(*uartRxUserCb)(char);
+
+// IPCC configuration
PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static TL_BLE_LLD_Config_t BleLldConfigBuffer;
+
+// Shared memory used by IPCC to send/receive messages to/from M0
PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t BleLldM0CmdPacket;
PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t BleLldCmdRspPacket;
+/* Shared memory used to send/receive data and parameters to/from M0 because
+ IPCC messages have a limited size */
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static msg_BLE_LLD_t bleparam_BLE_LLD_Packet;
+
+// Shared buffers for packet transmission and reception, separate buffers are needed because radio
+PLACE_IN_SECTION("MB_MEM2") static ipBLE_lld_txrxdata_Type txBuffer;
+PLACE_IN_SECTION("MB_MEM2") static ipBLE_lld_txrxdata_Type rxBuffer;
+
/* Functions Definition ------------------------------------------------------*/
@@ -82,35 +106,38 @@ void APP_BLE_LLD_Init(void)
BleLldConfigBuffer.p_BleLldM0CmdBuffer = (uint8_t*)&BleLldM0CmdPacket;
TL_BLE_LLD_Init(&BleLldConfigBuffer);
- /* Configure UART for receiving CLI command from PC and sending CLI response or notifications to PC */
- APP_BLE_LLD_Init_UART_CLI();
+ APP_BLE_LLD_Init_UART();
- /* Send LLD tests CLI start information to CLI UART */
- logUart("================================");
-#ifdef STM32WB35xx
- logUart("Little DORY RF BLE LLD");
-#else
- logUart("DORY RF BLE LLD");
-#endif
- logUart("================================");
+ /* Send LLD tests start information to UART */
+ uartWrite("");
+ uartWrite("================================");
+ uartWrite("RF BLE LLD");
+ uartWrite("================================");
#if (CFG_DEBUGGER_SUPPORTED == 0U)
- logUart("Debugger de-activated");
+ uartWrite("Debugger de-activated");
#endif
#if (( CFG_DEBUG_TRACE_FULL == 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ))
- logUart("Trace is de-activated");
+ uartWrite("Trace is de-activated");
#endif
- PRINT_MESG_DBG("Test appli initialized on M4, waiting for M0 initialization");
+ APP_DBG("Test appli initialized on M4, waiting for M0 initialization");
- /* Send CLI start cmd to M0 (with device and revision ID as parameters */
- memcpy(&param[0], &devId, 4 );
- memcpy(&param[4], &revId, 4 );
- LldTestsInitStatus = SHCI_C2_BLE_LLD_Init(8, param);
+ /* Send start cmd to M0 (with device and revision ID as parameters */
+ memcpy(&param[0], &devId, sizeof(devId));
+ memcpy(&param[4], &revId, sizeof(revId));
+ LldTestsInitStatus = SHCI_C2_BLE_LLD_Init(sizeof(param), param);
if(LldTestsInitStatus != SHCI_Success){
- PRINT_MESG_DBG("!! ERROR during M0 init !!");
+ APP_DBG("!! ERROR during M0 init !!");
}else{
- PRINT_MESG_DBG("M0 initialized");
+ APP_DBG("M0 initialized");
}
+
+ UTIL_SEQ_RegTask( 1<<CFG_TASK_CMD_FROM_M0_TO_M4, UTIL_SEQ_RFU, m0CmdProcess);
+
+ BLE_LLD_PRX_Init(&bleparam_BLE_LLD_Packet.params,
+ &txBuffer,
+ &rxBuffer,
+ APP_BLE_LLD_SendCmdM0);
}
/**
@@ -130,7 +157,7 @@ void APP_BLE_LLD_Error(uint32_t ErrId, uint32_t ErrCode)
case ERR_BLE_LLD_CHECK_WIRELESS: msg = "ERROR: ERR_BLE_LLD_CHECK_WIRELESS "; break;
default: msg = "ERROR Unknown "; break;
}
- PRINT_MESG_DBG("**** Fatal error = %s (Err = %d)", msg, ErrCode);
+ APP_DBG("**** Fatal error = %s (Err = %d)", msg, ErrCode);
while(true)
{
BSP_LED_Toggle(LED1);
@@ -152,35 +179,27 @@ void CheckWirelessFirmwareInfo(void)
{
WirelessFwInfo_t wireless_info_instance;
WirelessFwInfo_t* p_wireless_info = &wireless_info_instance;
- if (SHCI_GetWirelessFwInfo(p_wireless_info) != SHCI_Success)
+ if (SHCI_GetWirelessFwInfo(p_wireless_info) != SHCI_Success)
{
APP_BLE_LLD_Error(ERR_BLE_LLD_CHECK_WIRELESS, 0);
}
else
{
- PRINT_MESG_DBG("**********************************************************");
- PRINT_MESG_DBG("Loaded M0 TEST FW info:");
+ APP_DBG("**********************************************************");
+ APP_DBG("Loaded M0 TEST FW info:");
switch(p_wireless_info->StackType)
{
- case INFO_STACK_TYPE_802154_LLD_TESTS :
- PRINT_MESG_DBG(" M0 FW Type: 802.15.4 and radio LLDs tests");
- break;
-
- case INFO_STACK_TYPE_802154_PHY_VALID :
- PRINT_MESG_DBG(" M0 FW Type: 802.15.4 and radio PHY validation");
- break;
-
case INFO_STACK_TYPE_BLE_PHY_VALID :
- PRINT_MESG_DBG(" M0 FW Type: BLE and radio PHY validation");
+ APP_DBG(" M0 FW Type: BLE and radio PHY validation");
break;
-
+
default :
+ APP_DBG(" ERROR: incompatible firmware");
APP_BLE_LLD_Error(ERR_BLE_LLD_CHECK_WIRELESS, 0);
- PRINT_MESG_DBG(" M0 FW Type: Unknown !!");
break;
}
- PRINT_MESG_DBG(" M0 FW VERSION: v%d.%d.%d", p_wireless_info->VersionMajor, p_wireless_info->VersionMinor, p_wireless_info->VersionSub);
- PRINT_MESG_DBG("**********************************************************");
+ APP_DBG(" M0 FW VERSION: v%d.%d.%d", p_wireless_info->VersionMajor, p_wireless_info->VersionMinor, p_wireless_info->VersionSub);
+ APP_DBG("**********************************************************");
}
}
@@ -196,32 +215,58 @@ void CheckWirelessFirmwareInfo(void)
*
*************************************************************/
/**
- * @brief Perform initialization of CLI UART interface.
+ * @brief Perform initialization of UART.
* @param None
* @retval None
*/
-void APP_BLE_LLD_Init_UART_CLI(void)
+void APP_BLE_LLD_Init_UART(void)
{
-#if (CFG_HW_USART1_ENABLED == 1)
- MX_USART1_UART_Init();
+#ifdef CFG_UART
+ MX_UART_Init(CFG_UART);
#endif
- bufInit(uartTxBuf, TX_BUFFER_SIZE);
+
+ CircularQueue_Init(&uartTxBuf,
+ uartTxBufData,
+ sizeof(uartTxBufData),
+ sizeof(char),
+ CIRCULAR_QUEUE_NO_FLAG);
txBusy = false;
}
/**
- * @brief Perform de-initialization of CLI UART interface.
+ * @brief Perform de-initialization of UART.
* @param None
* @retval None
*/
-void APP_BLE_LLD_DeInit_UART_CLI(void)
+void APP_BLE_LLD_DeInit_UART(void)
{
-#if (CFG_HW_USART1_ENABLED == 1)
- MX_USART1_UART_DeInit();
+#ifdef CFG_UART
+ MX_UART_Deinit(CFG_UART);
#endif
}
-void logUart(const char *format, ...)
+static void uartRxStart(void)
+{
+ if (HW_UART_Receive_IT(CFG_UART, (uint8_t *)&uartRxBuf, 1, uartRxCpltCallback) != hw_uart_ok){
+ APP_DBG("ERROR returned by HW_UART_Receive_IT()");
+ }
+}
+
+void APP_BLE_LLD_uartRxStart(void(*callback)(char))
+{
+ uartRxUserCb = callback;
+ uartRxStart();
+}
+
+static void uartRxCpltCallback(void)
+{
+ // No need to buffer uartRxBuf since the callback is called by value
+ uartRxUserCb(uartRxBuf);
+ // Since UART is in full duplex, receive can be always active without blocking send
+ uartRxStart();
+}
+
+void uartWrite(const char *format, ...)
{
char out[UART_BUFFER_SIZE];
int nbChar;
@@ -237,13 +282,16 @@ void logUart(const char *format, ...)
}else{
strcat(out, UART_LINE_END);
}
- logUartRaw(out);
+ uartWriteRaw(out);
}
-void logUartRaw(const char *str)
+void uartWriteRaw(const char *str)
{
CRITICAL_BEGIN();
- bufPutString(uartTxBuf, str);
+ while (*str != '\0'){
+ CircularQueue_Add(&uartTxBuf, (uint8_t *)str, 0, 1);
+ str++;
+ }
if (! txBusy){
uartTxSendChunk();
}
@@ -255,89 +303,86 @@ void logUartRaw(const char *str)
// loop on itself via the UART callback
static void uartTxSendChunk(void){
static char hwBuf[UART_TX_CHUNK_SIZE];
- uint32_t count;
- count = bufGetMultiChar(uartTxBuf, hwBuf, UART_TX_CHUNK_SIZE);
+ char *charPtr;
+ uint32_t count = 0;
+
+ while ((charPtr = (char *)CircularQueue_Remove(&uartTxBuf, NULL)) != NULL){
+ hwBuf[count] = *charPtr;
+ count++;
+ if (count >= UART_TX_CHUNK_SIZE){
+ break;
+ }
+ }
if (count != 0){
txBusy = true;
- if (HW_UART_Transmit_IT(CFG_CLI_UART, (uint8_t *)hwBuf, count, uartTxSendChunk) != hw_uart_ok){
- PRINT_MESG_DBG("!! HAL_UART_Transmit_IT error on M4");
+ if (HW_UART_Transmit_IT(CFG_UART, (uint8_t *)hwBuf, count, uartTxSendChunk) != hw_uart_ok){
+ APP_DBG("ERROR returned by HW_UART_Transmit_IT()");
}
}else{
txBusy = false;
}
}
-/**
- * @brief This function is called when notification on TL Channel from M0+ is received.
- *
- * @param Notbuffer : a pointer to TL_CmdPacket_t
- * @return None
- */
-void TL_BLE_LLD_ReceiveRsp( TL_CmdPacket_t * Notbuffer )
+static void m0CmdProcess(void)
{
- uint8_t l_size = Notbuffer->cmdserial.cmd.plen;
- char *sourceBuf = (char *)Notbuffer->cmdserial.cmd.payload;
-
- if (l_size > 0)
- {
- if (strcmp(sourceBuf, "Resp_End") == 0)
- {
- /* This is an answer to indicate that command has been completed */
- UTIL_SEQ_SetEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
- }
- else
- {
- /* This is just a trace from M0, write to UART */
- logUartRaw(sourceBuf);
- }
- }
- else
- {
- PRINT_MESG_DBG("!! Empty M0 CLI response received by M4 !!");
- }
- TL_BLE_LLD_SendRspAck();
+ BLE_LLD_PRX_EventProcessTask();
}
/**
- * @brief This function is called when notification on TL Channel from M0+ is received.
+ * @brief Processes an event from radio CPU
*
* @param cmdBuffer : a pointer to TL_CmdPacket_t
* @return None
*/
void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * cmdBuffer )
{
- uint8_t bufferSize = cmdBuffer->cmdserial.cmd.plen;
- char * bufferAddr = (char *)cmdBuffer->cmdserial.cmd.payload;
-
- if (bufferSize > 0) {
- if (BLE_LLD_PRX_ReplyInterDispatch(bufferAddr)) {
- UTIL_SEQ_SetTask(1U << CFG_TASK_CMD_FROM_M0_TO_M4, CFG_SCH_PRIO_0);
- }else{
- PRINT_MESG_DBG((char *)"!! Unknown M0 command received by M4 !!");
- }
- }else{
- PRINT_MESG_DBG((char *)"!! Empty M0 command received by M4 !!");
- }
+ BLE_LLD_PRX_EventProcessInter((radioEventType)cmdBuffer->cmdserial.cmd.cmdcode);
+ UTIL_SEQ_SetTask(1U << CFG_TASK_CMD_FROM_M0_TO_M4, CFG_SCH_PRIO_0);
TL_BLE_LLD_SendM0CmdAck();
}
/**
- * @brief This function is called to Send Command to M0
+ * @brief Sends a command to radio CPU
+ *
+ * Waits for reply from radio CPU before returning (synchronous calls).
*
* @param[in] command BLE command already packed (by LLD)
*/
-void APP_BLE_LLD_SendCmdM0(void *command)
+uint8_t APP_BLE_LLD_SendCmdM0(BLE_LLD_Code_t bleCmd)
{
- bleCmdIndirect_t *cmdIndirect = (bleCmdIndirect_t *)BleLldCmdRspPacket.cmdserial.cmd.payload;
- cmdIndirect->command = command;
- cmdIndirect->length = 5;
-
- BleLldCmdRspPacket.cmdserial.cmd.plen = sizeof(bleCmdIndirect_t);
- BleLldCmdRspPacket.cmdserial.cmd.cmdcode = 0x0;
-
+ BleLldCmdRspPacket.cmdserial.cmd.cmdcode = bleCmd;
+ payload_BLE_LLD_t *payload = (payload_BLE_LLD_t *)&BleLldCmdRspPacket.cmdserial.cmd.payload;
+ payload->msg = &bleparam_BLE_LLD_Packet;
UTIL_SEQ_ClrEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
TL_BLE_LLD_SendCmd();
UTIL_SEQ_WaitEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+
+ return bleparam_BLE_LLD_Packet.returnValue;
+}
+
+/**
+ * @brief Processes a reply (to a command) from radio CPU
+ *
+ * Unlocks task waiting in APP_BLE_LLD_SendCmdM0(), this is used to make LLD
+ * API calls synchronous.
+ *
+ * @param Notbuffer : a pointer to TL_CmdPacket_t
+ * @return None
+ */
+void TL_BLE_LLD_ReceiveRsp( TL_CmdPacket_t * Notbuffer )
+{
+ switch (Notbuffer->cmdserial.cmd.cmdcode){
+ case BLE_LLD_RSP_END:
+ UTIL_SEQ_SetEvt(1U << CFG_EVT_RECEIVE_RSPACKEVT);
+ break;
+ default:
+ APP_DBG("WARNING: unknown response received %d", Notbuffer->cmdserial.cmd.cmdcode);
+ }
+
+ /* This is just a trace from M0, write to UART */
+ //uartWriteRaw(sourceBuf);
+
+ TL_BLE_LLD_SendRspAck();
}
/* USER CODE END FD_WRAP_FUNCTIONS */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.h
index 3a9aa1a8a..3bd87e32c 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.h
@@ -24,19 +24,12 @@ extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
-#include "ble_lld.h"
+#include "ble_lld_transport.h"
/* Private includes ----------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
-/* Layer of indirection for command to M0 */
-typedef PACKED_STRUCT
-{
- void *command;
- uint32_t length;
-} bleCmdIndirect_t;
-
/* Exported constants --------------------------------------------------------*/
/* External variables --------------------------------------------------------*/
@@ -44,15 +37,17 @@ typedef PACKED_STRUCT
/* Exported macros ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
-void APP_BLE_LLD_Init( void );
+void APP_BLE_LLD_Init(void);
void APP_BLE_LLD_Error(uint32_t ErrId, uint32_t ErrCode);
-void APP_BLE_LLD_Init_UART_CLI(void);
-void APP_BLE_LLD_DeInit_UART_CLI(void);
+void APP_BLE_LLD_Init_UART(void);
+void APP_BLE_LLD_DeInit_UART(void);
+
+void APP_BLE_LLD_uartRxStart(void(*cb)(char));
void CheckWirelessFirmwareInfo(void);
-void logUart(const char *format, ...);
-void logUartRaw(const char *str);
-void APP_BLE_LLD_SendCmdM0(void *command);
+void uartWrite(const char *format, ...);
+void uartWriteRaw(const char *str);
+uint8_t APP_BLE_LLD_SendCmdM0(BLE_LLD_Code_t bleCmd);
/**
* @brief Active polling for a given delay
@@ -71,12 +66,6 @@ void us_delay_32m(uint32_t microsec);
#endif
-
-/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
-void Appli_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
-void Appli_TIM_IC_CaptureCallback(void);
-/* USER CODE END FD_WRAP_FUNCTIONS */
-
#endif /* APP_BLE_LLD_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.c
deleted file mode 100644
index 271328153..000000000
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.c
+++ /dev/null
@@ -1,558 +0,0 @@
-/**
- ******************************************************************************
- * File Name : ble_lld.c
- * Description : BLE LLD Application.
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "app_common.h"
-#include "ble_lld.h"
-#include "ble_lld_private.h"
-
-/* Private includes ----------------------------------------------------------*/
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private defines -----------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Private function prototypes -----------------------------------------------*/
-static void unpackRx(param_BLE_LLD_m0Reply_t *reply);
-static uint8_t sendCommand(BLE_LLD_Code_t bleCmd , param_BLE_LLD_t *bleParams);
-
-/* Private variables ---------------------------------------------------------*/
-
-/** When sending command to M0, store pointer to action packet for later use
-when receiving reply from M0 */
-static ActionPacket *actionPackets[ACTION_PACKET_NB];
-
-/** This variable is not a full fledged action packet, its purpose is to allow HAL
-functions to use the same code as LLD functions for data comming back from M0.
-Hence, only fields used for reply data are ever used. */
-
-/** Memory used to send/receive data and parameters to/from M0 */
-PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static param_BLE_LLD_t bleparam_BLE_LLD_Packet;
-PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static bleCmd_t command;
-
-/** Configuration for data routines multi */
-static struct {
- uint32_t packetNumber; // NB of Successif PACKET Send or Receive
- uint8_t packetStopRx; // Stop after RX
-} dataRoutineParams = {1, 1};
-
-/** Stores command received in interruption for later processing in a task */
-static cmdFromM0_t m0Cmd;
-
-/** Callback to send commands to M0 */
-static void (*CB_sendCmdM0)(void *) = NULL;
-
-/* Functions Definition ------------------------------------------------------*/
-
-/**
- * @brief Initializes BLE LLD proxy.
- *
- * This function must be called before any BLE LLD function.
- *
- * @param[in] callbackSendCmdM0 Function to send commands to M0
- */
-void BLE_LLD_PRX_Init(void (*callbackSendCmdM0)(void *))
-{
- CB_sendCmdM0 = callbackSendCmdM0;
-}
-
-/**
- * @brief Sets configuration for data routines multi
- *
- * @param[in] PacketNumber Number of Successif PACKET using LL Send or Receive
- * @param[in] PacketStop Stop after RX
- */
-void BLE_LLD_PRX_SetdataRoutineMultiOptions(uint32_t PacketNumber, uint8_t PacketStop)
-{
- dataRoutineParams.packetNumber = PacketNumber;
- dataRoutineParams.packetStopRx = PacketStop;
-}
-
-
-/* ------------------------------- LL LEVEL -----------------------------------*/
-/**
- * @brief Initializes the BLE Radio in LL mode.
- *
- * Whitening improves receiver lock, disabling it is only intended for test mode.
- * When whitening is disabled, data payload is limited to 45 bytes (including header).
- *
- * @param[in] hs_startup_time Startup time (system time unit)
- * @param[in] low_speed_osc Source for the 32 kHz slow speed clock:
- * 1: internal RO
- * 0: external crystal
- * @param[in] hot_table Config table of the Radio and SPI
- * @param[in] whitening ENABLE or DISABLE whitening for transmission and reception
- */
-void BLE_LLD_Init(uint16_t hs_startup_time, uint8_t low_speed_osc, uint32_t* hot_table, FunctionalState whitening)
-{
- param_BLE_LLD_init_t *params = (param_BLE_LLD_init_t *)&bleparam_BLE_LLD_Packet;
- params->startupTime = (uint32_t)(hs_startup_time);
- params->lowSpeedOsc = low_speed_osc;
- params->whitening = (uint8_t)whitening;
- sendCommand(BLE_LLD_INIT_CMDCODE, &bleparam_BLE_LLD_Packet);
- memcpy((uint8_t*)hot_table, params->txrxBuffer.txBuffer, BLE_HOT_ANA_CONFIG_TABLE_LENGTH);
-}
-
-/**
- * @brief Checks if the radio is busy.
- *
- * If radio is busy, the time argument will be filled with WakeupTimer value.
- * User can use this value (in comparison with current time) to check that how
- * long it is far to force the device to sleep or not.
- *
- * @param[out] time WakeupTimer value
- *
- * @retval BLUE_IDLE_0 Radio is not busy
- * @retval BLUE_BUSY_NOWAKEUP_T2 Radio is busy, but there is no wakeup timer on the schedule but timer2 is
- * @retval BLUE_BUSY_WAKEUP Radio is busy and wakeup timer is on the schedule
- * @retval BLUE_BUSY_TONE. Radio is in Tone
- * @retval BLUE_TONE_DESTROY. Radio Tone has destroyed BLE: need an Init
- */
-uint8_t BLE_LLD_GetStatus(uint32_t *time)
-{
- uint8_t return_value;
- param_BLE_LLD_status_t *params = (param_BLE_LLD_status_t *)&bleparam_BLE_LLD_Packet;
- params->time = NULL;
- return_value=sendCommand(BLE_LLD_GETSTATUS_CMDCODE, &bleparam_BLE_LLD_Packet);
- *time = params->time;
- return(return_value);
-}
-
-/**
- * @brief Sets the 40 bits receive and transmit packet count, used in encryption.
- *
- * Both set the 39-bit count + 1 bit MSB as defined in the Bluetooth Low Energy specifications
- * for encryption nonce calculation.
- *
- * @param [in] StateMachineNo State machine number in multistate (between 0 and 7)
- * @param [in] count_tx 40-bit transmit packet count
- * @param [in] count_rcv 40-bit receive packet count
- */
-void BLE_LLD_SetEncryptionCount(uint8_t StateMachineNo, uint8_t (*count_tx)[5], uint8_t (*count_rcv)[5])
-{
- param_BLE_LLD_cryptCount_t *params = (param_BLE_LLD_cryptCount_t *)&bleparam_BLE_LLD_Packet;
- params->stateMachineNo = StateMachineNo;
- memcpy(params->countTx, count_tx, sizeof(params->countTx));
- memcpy(params->countRcv, count_rcv, sizeof(params->countRcv));
- sendCommand(BLE_LLD_SETENCRYPTIONCOUNT_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Set the 8-byte encryption initialization vector and the 16-byte encryption key.
- *
- * @param[in] StateMachineNo State machine number in multistate (between 0 and 7)
- * @param[in] enc_iv 8-byte encryption initialization vector
- * @param[in] enc_key 16-byte encryption key
- */
-void BLE_LLD_SetEncryptionAttributes(uint8_t StateMachineNo, uint8_t (*enc_iv)[8], uint8_t (*enc_key)[16])
-{
- param_BLE_LLD_cryptAttr_t *params = (param_BLE_LLD_cryptAttr_t *)&bleparam_BLE_LLD_Packet;
- params->stateMachineNo = StateMachineNo;
- memcpy(params->encIv, enc_iv, sizeof(params->encIv));
- memcpy(params->encKey, enc_key, sizeof(params->encKey));
- sendCommand(BLE_LLD_SETENCRYPTIONATTRIBUTES_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Enables or disables encryption.
- *
- * There is only one bit in hardware for both Tx and Rx, so encryption is
- * enabled for both if either of the bits is set.
- *
- * Another point is that, when encryption is enabled the hardware will add
- * 4 bytes at the end of the packet as MAC (Message Authentication Code).
- * So, the user needs to add 4 to the length of packet when encryption is ON.
- *
- * @param[in] StateMachineNo State Number in multistate (between 0 and 7)
- * @param[in] EncryptFlagTx Encryption Flag for TX:
- * 0: Encryption is turned off
- * 1: encryption is turned on
- * @param[in] EncryptFlagRcv Encryption Flag for RX:
- * 0: Encryption is turned off
- * 1: encryption is turned on
- */
-void BLE_LLD_SetEncryptFlags(uint8_t StateMachineNo, FunctionalState EncryptFlagTx, FunctionalState EncryptFlagRcv)
-{
- param_BLE_LLD_cryptFlags_t *params = (param_BLE_LLD_cryptFlags_t *)&bleparam_BLE_LLD_Packet;
- params->StateMachineNo=StateMachineNo;
- params->encFlagTx=(uint8_t)EncryptFlagTx;
- params->encFlagRx=(uint8_t)EncryptFlagRcv;
- sendCommand(BLE_LLD_SETENCRYPTFLAGS_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Encrypts data using AES
- *
- * @param[in] Key Encryption key (128 bits)
- * @param[in] plainData Data to encrypt (128 bits)
- * @param[out] cypherData Encrypted data (128 bits)
- */
-void BLE_LLD_EncryptPlainData(uint8_t (*Key)[16], uint8_t (*plainData)[16], uint8_t (*cypherData)[16])
-{
- param_BLE_LLD_crypt_t *params = (param_BLE_LLD_crypt_t *)&bleparam_BLE_LLD_Packet;
- memcpy(params->key, Key, sizeof(params->key));
- memcpy(params->plainData, plainData, sizeof(params->plainData));
- sendCommand(BLE_LLD_ENCRYPTPLAINDATA_CMDCODE, &bleparam_BLE_LLD_Packet);
- memcpy(cypherData, params->cypherData, sizeof(params->cypherData));
-}
-
-/**
- * @brief Sets channel map
- *
- * If the channel map is not in use, do not define it.
- * The LSB corresponds to bit 0. When the corresponding bit is set, the channel
- * is in use. When the corresponding bit it is cleared, there will be an
- * automatic remap to another channel, conforming to the Bluetooth Low Energy
- * specification.
- * Setting all bits of the chan_remap vector to ‘1’ disables the channel
- * remapping. This is the expected mode when the Bluetooth channel remap is not
- * in use.
- *
- * @param[in] StateMachineNo State machine number in multistate (between 0 and 7)
- * @param[in] chan_remap Bitmap of channels to use if 1 (between 0 and 36)
- */
-void BLE_LLD_SetChannelMap(uint8_t StateMachineNo, uint8_t (*chan_remap)[5])
-{
- param_BLE_LLD_chanMap_t *params = (param_BLE_LLD_chanMap_t *)&bleparam_BLE_LLD_Packet;
- params->stateMachineNo = StateMachineNo;
- memcpy(params->map, chan_remap, sizeof(params->map));
- sendCommand(BLE_LLD_SETCHANNELMAP_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Sets the channel and the channel increment.
- *
- * @param[in] StateMachineNo State machine number in multistate (between 0 and 7)
- * @param[in] channel Frequency channel (between 0 and 39)
- * @param[in] channel_increment Channel increment value determines the hoping value
- */
-void BLE_LLD_SetChannel(uint8_t StateMachineNo, uint8_t channel, uint8_t channel_increment)
-{
- param_BLE_LLD_chan_t *params = (param_BLE_LLD_chan_t *)&bleparam_BLE_LLD_Packet;
- params->stateMachineNo = StateMachineNo;
- params->channel = channel;
- params->channelInc = channel_increment;
- sendCommand(BLE_LLD_SETCHANNEL_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Sets the access address (AccessAddress), the CRC initialization value and the Slow Clock Accuracy (SCA).
- *
- * @param[in] StateMachineNo State machine number in multistate (between 0 and 7)
- * @param[in] NetworkID BLE NetworkID
- * @param[in] crc_init CRC initialization value, must be 0x555555
- * @param[in] sca Parameter not used
- */
-void BLE_LLD_SetTxAttributes(uint8_t StateMachineNo, uint32_t NetworkID, uint32_t crc_init, uint32_t sca)
-{
- param_BLE_LLD_txAttr_t *params = (param_BLE_LLD_txAttr_t *)&bleparam_BLE_LLD_Packet;
- params->stateMachineNo = StateMachineNo;
- params->networkId = NetworkID ;
- params->crcInit = crc_init;
- params->sca = sca; // not used
- sendCommand(BLE_LLD_SETTXATTRIBUTES_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Sets the time between back-to-back radio transmissions.
- *
- * A minimum value of 50us must be set.
- *
- * @param[in] back_to_back_time Time between two frames in back to back mode (us)
- */
-void BLE_LLD_SetBackToBackTime(uint32_t back_to_back_time)
-{
- param_BLE_LLD_b2b_t *params = (param_BLE_LLD_b2b_t *)&bleparam_BLE_LLD_Packet;
- params->backToBackTime = back_to_back_time;
- sendCommand(BLE_LLD_SETBACKTOBACKTIME_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Sets the transmit power level.
- *
- * @param[in] powerLevel Transmit power level (between 0 and 31)
- */
-void BLE_LLD_SetTxPower(uint8_t powerLevel)
-{
- param_BLE_LLD_power_t *params = (param_BLE_LLD_power_t *)&bleparam_BLE_LLD_Packet;
- params->power = powerLevel;
- sendCommand(BLE_LLD_SETTXPOWER_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Sets the data speed for transmission and reception.
- *
- * @param[in] StateMachineNo State machine number in multistate (between 0 and 7)
- * @param[in] tx_phy Speed for transmission: TX_PHY_1MBPS / TX_PHY_2MBPS
- * @param[in] rx_phy Speed for reception RX_PHY_1MBPS / RX_PHY_2MBPS
- */
-void BLE_LLD_SetTx_Rx_Phy(uint8_t StateMachineNo, uint8_t tx_phy, uint8_t rx_phy)
-{
- param_BLE_LLD_phy_t *params = (param_BLE_LLD_phy_t *)&bleparam_BLE_LLD_Packet;
- params->stateMachineNo = StateMachineNo;
- params->txPhy = tx_phy;
- params->rxPhy = rx_phy;
- sendCommand(BLE_LLD_SETTX_RX_PHY_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Prepares an action packet for execution.
- *
- * This function must be called after the action packet fields are set.
- *
- * @param[in] p Action packet to prepare, memory lifetime must extend until response processing
- */
-void BLE_LLD_SetReservedArea(ActionPacket *p)
-{
- param_BLE_LLD_reserved_t *params = (param_BLE_LLD_reserved_t *)&bleparam_BLE_LLD_Packet;
-
- actionPackets[p->actionPacketNb] = p;
-
- params->stateMachineNo = p->StateMachineNo;
- params->nextTrue = p->next_true;
- params->nextFalse = p->next_false;
- params->wakeupTime = p->WakeupTime;
- params->receiveWindowLength = p->ReceiveWindowLength;
- params->actionPacketNb = p->actionPacketNb;
- params->actionTag = p->ActionTag;
- params->setCase.condCase = (condCase_t)p->condRoutine;
- params->setCase.dataCase = (dataCase_t)p->dataRoutine;
- if(params->actionTag & AT_TXRX) {
- memcpy((params->txrxBuffer.txBuffer), p->data, TXRX_BUF_SIZE);
- }
- sendCommand(BLE_LLD_SETRESERVEDAREA_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Schedules an action packet for execution on the radio.
- *
- * BLE_LLD_SetReservedArea() must have been called first to prepare the action packet.
- *
- * @param[in] p Action packet to schedule, memory lifetime must extend until response processing
- *
- * @retval SUCCESS_0 if success
- * @retval RADIO_BUSY_C4 if radio is busy
- */
-uint8_t BLE_LLD_MakeActionPacketPending(ActionPacket *p)
-{
- param_BLE_LLD_mkPending_t *params = (param_BLE_LLD_mkPending_t *)&bleparam_BLE_LLD_Packet;
- params->actionPacketNb = p->actionPacketNb;
- params->packetNumber = dataRoutineParams.packetNumber;
- params->packetStopRx = dataRoutineParams.packetStopRx;
- return(sendCommand(BLE_LLD_MAKEACTIONPACKETPENDING_CMDCODE, &bleparam_BLE_LLD_Packet));
-}
-
-/**
- * @brief Stops the radio
- *
- * After a call to this function ISR will not be triggered, unless
- * MakeActionPacketPending() is called again.
- *
- * @retval true
- */
-uint8_t BLE_LLD_StopActivity(void)
-{
- return(sendCommand(BLE_LLD_STOPACTIVITY_CMDCODE, &bleparam_BLE_LLD_Packet));
-}
-
-/**
- * @brief Starts tone transmission on selected channel.
- *
- * This function is dedicated to tests and destroys context and multistate.
- * So, after calling this function the radio must be re-initialized.
- *
- * @param[in] RF_channel Radio frequency channel (between 0 and 39)
- * @param[in] PowerLevel Output power level (between 0 and 31)
- */
-void BLE_LLD_StartTone(uint8_t RF_channel, uint8_t powerLevel)
-{
- param_BLE_LLD_toneStart_t *params = (param_BLE_LLD_toneStart_t *)&bleparam_BLE_LLD_Packet;
- params->channel = RF_channel;
- params->power = powerLevel;
- sendCommand(BLE_LLD_STARTTONE_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * @brief Stops tone transmission.
- *
- * This function is dedicated to tests and destroys context and multistate.
- * So, after calling this function the radio must be re-initialized.
- */
-void BLE_LLD_StopTone(void)
-{
- sendCommand(BLE_LLD_STOPTONE_CMDCODE, &bleparam_BLE_LLD_Packet);
-}
-
-/**
- * Events processing.
- *
- * On radio events, M0 sends notifications.
- * Application can register callbacks to do some custom processing on
- * these events.
- * For the same event, custom processing can be executed in two different
- * context: in interruption context or after interruption (typicallyd in a task).
- */
-
-/* --------------------- M0 REPLY PROCESSING IN INTERRUPT --------------------*/
-
-static uint8_t APIndex(param_BLE_LLD_m0Reply_t *reply)
-{
- return reply->txrxBuffer.rxBuffer[257];
-}
-
-static void itCbNop(void){}
-
-/** Callbacks for the different events for processing during interruption */
-static struct {
- void(*Stop)(void);
- void(*End)(void);
- void(*RxAck)(void);
- void(*RxOk)(void);
- void(*RxAckEnd)(void);
- void(*RxOkEnd)(void);
-} interReplyCb = {itCbNop, itCbNop, itCbNop, itCbNop, itCbNop, itCbNop};
-
-/**
- * @brief Registers a callback on an event for processing during interruption.
- *
- * @param[in] event Event on which to execute
- * @param[in] cb Callback
- */
-void BLE_LLD_PRX_ReplyInterCbRegister(cmdFromM0_t event, void(*cb)(void)){
- switch (event) {
- case CMD_FROM_M0_RADIO_STOP: interReplyCb.Stop = cb; break;
- case CMD_FROM_M0_RADIO_END: interReplyCb.End = cb; break;
- case CMD_FROM_M0_RADIO_RXACK: interReplyCb.RxAck = cb; break;
- case CMD_FROM_M0_RADIO_RXOK: interReplyCb.RxOk = cb; break;
- case CMD_FROM_M0_RADIO_RXACKEND: interReplyCb.RxAckEnd = cb; break;
- case CMD_FROM_M0_RADIO_RXOKEND: interReplyCb.RxOkEnd = cb; break;
- default: break;
- }
-}
-
-/**
- * @brief Executes the registered callback for an event during interruption.
- *
- * This function also performs unpacking of received packets.
- *
- * @param[in] cmd Command string identifying the event
- *
- * @retval true if cmd has been recognized
- */
-bool BLE_LLD_PRX_ReplyInterDispatch(const char *cmd)
-{
- param_BLE_LLD_m0Reply_t *reply = (param_BLE_LLD_m0Reply_t *)&bleparam_BLE_LLD_Packet;
- actionPackets[APIndex(reply)]->status = reply->status;
-
- m0Cmd = CMD_FROM_M0_UNKNOWN;
- if (0 == strcmp(cmd, "Radio_Stop")) {
- m0Cmd = CMD_FROM_M0_RADIO_STOP;
- interReplyCb.Stop();
- } else if (0 == strcmp(cmd, "Radio_End")) {
- m0Cmd = CMD_FROM_M0_RADIO_END;
- interReplyCb.End();
- } else if (0 == strcmp(cmd, "Radio_RxAck")) {
- m0Cmd = CMD_FROM_M0_RADIO_RXACK;
- unpackRx(reply);
- interReplyCb.RxAck();
- } else if (0 == strcmp(cmd, "Radio_RxOk")) {
- m0Cmd = CMD_FROM_M0_RADIO_RXOK;
- unpackRx(reply);
- interReplyCb.RxOk();
- } else if (0 == strcmp(cmd, "Radio_RxAckEnd")) {
- m0Cmd = CMD_FROM_M0_RADIO_RXACKEND;
- unpackRx(reply);
- interReplyCb.RxAckEnd();
- } else if (0 == strcmp(cmd, "Radio_RxOkEnd")) {
- m0Cmd = CMD_FROM_M0_RADIO_RXOKEND;
- unpackRx(reply);
- interReplyCb.RxOkEnd();
- }
- return (CMD_FROM_M0_UNKNOWN != m0Cmd);
-}
-
-static void unpackRx(param_BLE_LLD_m0Reply_t *reply){
- actionPackets[APIndex(reply)]->timestamp_receive = reply->timestampReceive;
- actionPackets[APIndex(reply)]->rssi = reply->rssi;
- memcpy(actionPackets[APIndex(reply)]->data, reply->txrxBuffer.rxBuffer, TXRX_BUF_SIZE);
-}
-
-static uint8_t sendCommand(BLE_LLD_Code_t bleCmd, param_BLE_LLD_t *bleParams){
- // build command
- command.id = bleCmd;
- command.params = bleParams;
-
- // send it via callback
- CB_sendCmdM0(&command);
-
- return bleParams->returnValue;
-}
-
-/* ----------------------- M0 REPLY PROCESSING IN TASK -----------------------*/
-static void tskCbNop(void){}
-
-/** Callbacks for the different events for processing after interruption */
-static struct {
- void(*Stop)(void);
- void(*End)(void);
- void(*RxAck)(void);
- void(*RxOk)(void);
- void(*RxAckEnd)(void);
- void(*RxOkEnd)(void);
-} taskReplyCb = {tskCbNop, tskCbNop, tskCbNop, tskCbNop, tskCbNop, tskCbNop};
-
-
-/**
- * @brief Registers a callback on an event for processing after interruption.
- *
- * @param[in] event Event on which to execute
- * @param[in] cb Callback
- */
-void BLE_LLD_PRX_ReplyTaskCbRegister(cmdFromM0_t event, void(*cb)(void)){
- switch (event) {
- case CMD_FROM_M0_RADIO_STOP: taskReplyCb.Stop = cb; break;
- case CMD_FROM_M0_RADIO_END: taskReplyCb.End = cb; break;
- case CMD_FROM_M0_RADIO_RXACK: taskReplyCb.RxAck = cb; break;
- case CMD_FROM_M0_RADIO_RXOK: taskReplyCb.RxOk = cb; break;
- case CMD_FROM_M0_RADIO_RXACKEND: taskReplyCb.RxAckEnd = cb; break;
- case CMD_FROM_M0_RADIO_RXOKEND: taskReplyCb.RxOkEnd = cb; break;
- default: break;
- }
-}
-
-/**
- * @brief Executes the registered callback for an event after interruption.
- */
-void BLE_LLD_PRX_ReplyTaskCbDispatch(void){
- param_BLE_LLD_m0Reply_t *reply = (param_BLE_LLD_m0Reply_t *)&bleparam_BLE_LLD_Packet;
- actionPackets[APIndex(reply)]->status = reply->status;
-
- switch (m0Cmd) {
- case CMD_FROM_M0_RADIO_STOP: taskReplyCb.Stop(); break;
- case CMD_FROM_M0_RADIO_END: taskReplyCb.End(); break;
- case CMD_FROM_M0_RADIO_RXACK: taskReplyCb.RxAck(); break;
- case CMD_FROM_M0_RADIO_RXOK: taskReplyCb.RxOk(); break;
- case CMD_FROM_M0_RADIO_RXACKEND: taskReplyCb.RxAckEnd(); break;
- case CMD_FROM_M0_RADIO_RXOKEND: taskReplyCb.RxOkEnd(); break;
- default: break;
- }
-}
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.h
deleted file mode 100644
index e75f898f5..000000000
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/**
- ******************************************************************************
- * File Name : app_ble_lld.h
- * Description : Header for BLE LLD application.
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef BLE_LLD_H
-#define BLE_LLD_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32_wpan_common.h"
-#include <stdbool.h>
-
-/* Private includes ----------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-
-/* Exported constants --------------------------------------------------------*/
-
-/* External variables --------------------------------------------------------*/
-
-/* Exported macros ------------------------------------------------------------*/
-
-/* Exported functions ------------------------------------------------------- */
-
-/* ---------------------------------------------------------------------------*/
-/* ------------------------------- BLE LLD -----------------------------------*/
-/* ---------------------------------------------------------------------------*/
-#define IRQ_RCV_OK (1UL<<31) /* The packet is received, and the CRC is valid. */
-#define BIT_TX_MODE (1UL<<18) /* The packet has been sent successfully. */
-
-#define HS_STARTUP_TIME (uint16_t)(0x0099) /* High Speed start up for LP */
-
-#define BLE_HOT_ANA_CONFIG_TABLE_LENGTH 60
-
-#define ACTION_PACKET_NB 8
-#define TXRX_BUF_SIZE 258
-#define AES_KEY_SIZE 16
-#define AES_BLOCK_SIZE 16
-#define AES_IV_SIZE 8
-#define CHAN_MAP_SIZE 5 // 37 bits
-
-/* Radio Status */
-#define SUCCESS_0 0
-#define INVALID_PARAMETER_C0 0xC0
-#define RADIO_BUSY_C4 0xC4
-
-/* BLE Status */
-#define BLUE_IDLE_0 0
-#define BLUE_BUSY_NOWAKEUP_T2 2
-#define BLUE_BUSY_WAKEUP 3
-#define BLUE_BUSY_TONE 4
-#define BLUE_TONE_DESTROY 5
-
-#define RX_PHY_1MBPS 0x00
-#define RX_PHY_2MBPS 0x10
-#define TX_PHY_1MBPS 0x00
-#define TX_PHY_2MBPS 0x01
-#define BACK2BACK_TIME 50
-
-/* Action tag bitfield */
-#define AT_PLL_TRIG 0x01
-#define AT_TXRX 0x02
-#define AT_TIMER_WAKEUP 0x04
-#define AT_NS_EN 0x08
-#define AT_INC_CHAN 0x10
-#define AT_RELATIVE 0x20
-#define AT_TIMESTAMP_POSITION 0x80
-
-/* Events from M0 */
-typedef enum
-{
- CMD_FROM_M0_RADIO_STOP = 12,
- CMD_FROM_M0_RADIO_END = 13,
- CMD_FROM_M0_RADIO_RXACK = 14,
- CMD_FROM_M0_RADIO_RXOK = 15,
- CMD_FROM_M0_RADIO_RXACKEND = 16,
- CMD_FROM_M0_RADIO_RXOKEND = 17,
- CMD_FROM_M0_UNKNOWN = 255,
-} cmdFromM0_t;
-
-/* Finite state machines available on M0 */
-typedef enum
-{
- STATE_MACHINE_0 = 0,
- STATE_MACHINE_1,
- STATE_MACHINE_2,
- STATE_MACHINE_3,
- STATE_MACHINE_4,
- STATE_MACHINE_5,
- STATE_MACHINE_6,
- STATE_MACHINE_7,
-} StateMachine_t;
-
-/* Action packets available on M0 */
-typedef enum
-{
- APACKET_0 = 0,
- APACKET_1,
- APACKET_2,
- APACKET_3,
- APACKET_4,
- APACKET_5,
- APACKET_6,
- APACKET_7,
- APACKET_NULL=0xFF, // to be placed at the end
-} ActionPacket_Nb;
-
-/* condRoutine enum for condRoutine() */
-typedef enum
-{
- condCase_Done = 0,
- condCase_Tx,
- condCase_Rx,
- condCase_Stop,
-} condCase_t;
-
-/* dataRoutine enum for dataRoutine() */
-typedef enum
-{
- dataCase_Custom0 = 0,
- dataCase_Custom1,
- dataCase_Custom2,
- dataCase_Custom3,
- dataCase_Custom4,
- dataCase_Custom5,
- dataCase_Custom6,
- dataCase_Custom7,
-} dataCase_t;
-
-/* Data routines definitions to use after a call to HAL_BLE_Init() */
-#define DATA_ROUT_HAL_DONE dataCase_Custom0
-#define DATA_ROUT_HAL_TX dataCase_Custom1
-#define DATA_ROUT_HAL_RX dataCase_Custom2
-#define DATA_ROUT_HAL_STOP dataCase_Custom3
-#define DATA_ROUT_HAL_TXMULTI dataCase_Custom4
-#define DATA_ROUT_HAL_TXMULTIACK dataCase_Custom5
-#define DATA_ROUT_HAL_RXMULTI dataCase_Custom6
-#define DATA_ROUT_HAL_RXMULTIACK dataCase_Custom7
-
-/* Data routines definitions to use after a call to BLE_LLD_Init() */
-#define DATA_ROUT_LL_DONE dataCase_Custom0
-#define DATA_ROUT_LL_TX dataCase_Custom1
-#define DATA_ROUT_LL_RX dataCase_Custom2
-#define DATA_ROUT_LL_STOP dataCase_Custom3
-#define DATA_ROUT_LL_TXMULTIACK dataCase_Custom4
-#define DATA_ROUT_LL_RXMULTIACK dataCase_Custom5
-#define DATA_ROUT_LL_ACTION dataCase_Custom6
-
-typedef struct {
- uint8_t StateMachineNo ; /* This parameter indicates the state machine number for this action. From 0 to 7. */
- uint8_t ActionTag; /* The configuration of the current action.
- * Action Tag: AT_PLL_TRIG, AT_TXRX, AT_TIMER_WAKEUP, AT_INC_CHAN, AT_TIMESTAMP_POSITION, AT_RELATIVE */
- uint32_t WakeupTime; /* Contains the wakeup time in microsecond if it is relative.
- * It should not be more than 24 bits if it is absolute.
- * It only applies if AT_TIMER_WAKEUP flag is set in ActionTag. */
- uint32_t ReceiveWindowLength; /* Sets RX window size in microsecond. Applicable only for RX actions. */
- uint8_t *data; /* Pointer to the array with the data to send (header, length and data field), for TX.
- * Pointer to the array where the data received are copied, for RX.
- * In case of RX, the array must have the max size MAX_PACKET_LENGTH. */
- uint32_t status; /* The Status Register with the information on the action. */
- uint32_t timestamp_receive; /* This field contains the timestamp when a packet is received.
- * Intended to be used in the dataRoutine() callback routine. RX only. */
- int32_t rssi; /* The rssi of the packet was received with. RX only. */
- uint8_t next_true; /* Pointer to next ActionPacket if condRoutine() returns TRUE */
- uint8_t next_false; /* Pointer to next ActionPacket if condRoutine() returns FALSE */
- uint8_t condRoutine; /* User callback that decide the next ActionPacket to use.
- * It is time critical. Routine must end within 45 us. */
- uint8_t dataRoutine; /* User callback for managing data. */
- uint8_t actionPacketNb; /* User callback for managing data. */
-} ActionPacket;
-
-/* Exported functions ------------------------------------------------------- */
-void BLE_LLD_PRX_Init(void (*callbackSendCmdM0)(void *));
-void BLE_LLD_PRX_ReplyInterCbRegister(cmdFromM0_t event, void(*cb)(void));
-bool BLE_LLD_PRX_ReplyInterDispatch(const char *cmd);
-void BLE_LLD_PRX_ReplyTaskCbDispatch(void);
-void BLE_LLD_PRX_ReplyTaskCbRegister(cmdFromM0_t event, void(*cb)(void));
-void BLE_LLD_PRX_SetdataRoutineMultiOptions(uint32_t PacketNumber, uint8_t PacketStop );
-
-uint8_t BLE_LLD_GetStatus(uint32_t *time);
-void BLE_LLD_SetChannelMap(uint8_t StateMachineNo, uint8_t (*chan_remap)[5]);
-void BLE_LLD_SetChannel(uint8_t StateMachineNo, uint8_t channel,uint8_t channel_increment);
-void BLE_LLD_SetTxAttributes(uint8_t StateMachineNo, uint32_t NetworkID, uint32_t crc_init, uint32_t sca);
-void BLE_LLD_SetBackToBackTime(uint32_t back_to_back_time);
-void BLE_LLD_SetTxPower(uint8_t powerLevel);
-void BLE_LLD_SetTx_Rx_Phy(uint8_t StateMachineNo, uint8_t tx_phy, uint8_t rx_phy);
-uint8_t BLE_LLD_StopActivity(void);
-void BLE_LLD_SetEncryptionCount(uint8_t StateMachineNo, uint8_t (*count_tx)[5], uint8_t (*count_rcv)[5]);
-void BLE_LLD_SetEncryptionAttributes(uint8_t StateMachineNo, uint8_t (*enc_iv)[8], uint8_t (*enc_key)[16]);
-void BLE_LLD_SetEncryptFlags(uint8_t StateMachineNo, FunctionalState EncryptFlagTx, FunctionalState EncryptFlagRcv);
-void BLE_LLD_EncryptPlainData(uint8_t (*Key)[16], uint8_t (*plainData)[16], uint8_t (*cypherData)[16]);
-void BLE_LLD_StartTone(uint8_t RF_channel, uint8_t powerLevel);
-void BLE_LLD_StopTone(void);
-void BLE_LLD_SetReservedArea(ActionPacket *p);
-uint8_t BLE_LLD_MakeActionPacketPending(ActionPacket *p);
-void BLE_LLD_Init(uint16_t hs_startup_time, uint8_t low_speed_osc, uint32_t* hot_table, FunctionalState whitening);
-
-#endif /* BLE_LLD_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld_private.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld_private.h
deleted file mode 100644
index e2173dd70..000000000
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld_private.h
+++ /dev/null
@@ -1,310 +0,0 @@
-/**
- ******************************************************************************
- * File Name : app_ble_lld_private.h
- * Description : Header for BLE LLD communication with M0.
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef BLE_LLD_PRIVATE_H
-#define BLE_LLD_PRIVATE_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-
-/* Private includes ----------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-
-/* Exported constants --------------------------------------------------------*/
-
-/* External variables --------------------------------------------------------*/
-
-/* Exported macros ------------------------------------------------------------*/
-
-/* Exported functions ------------------------------------------------------- */
-
-/* ---------------------------------------------------------------------------*/
-/* ------------------------------- BLE LLD -----------------------------------*/
-/* ---------------------------------------------------------------------------*/
-
-/* max payload length(255) + header (2) (257 bytes) aligned on 32-bit (65 word = 260 bytes) */
-#define RADIO_PKT_RX_BUF_SIZE 260
-#define RADIO_PKT_TX_BUF_SIZE 260
-
-/* Commands to M0 */
-typedef enum
-{
- HAL_BLE_LLD_UNUSED_CMDCODE = 0,
- HAL_BLE_LLD_INIT_CMDCODE ,
- HAL_BLE_LLD_SETNETWORKID_CMDCODE,
- HAL_BLE_LLD_SENDPACKET_CMDCODE,
- HAL_BLE_LLD_SENDPACKETWITHACK_CMDCODE,
- HAL_BLE_LLD_RECEIVEPACKET_CMDCODE,
- HAL_BLE_LLD_RECEIVEPACKETWITHACK_CMDCODE,
- BLE_LLD_GETSTATUS_CMDCODE,
- BLE_LLD_SETCHANNELMAP_CMDCODE,
- BLE_LLD_SETCHANNEL_CMDCODE,
- BLE_LLD_SETTXATTRIBUTES_CMDCODE,
- BLE_LLD_SETBACKTOBACKTIME_CMDCODE,
- BLE_LLD_SETTXPOWER_CMDCODE,
- BLE_LLD_SETTX_RX_PHY_CMDCODE,
- BLE_LLD_STOPACTIVITY_CMDCODE,
- BLE_LLD_SETENCRYPTIONCOUNT_CMDCODE,
- BLE_LLD_SETENCRYPTIONATTRIBUTES_CMDCODE,
- BLE_LLD_SETENCRYPTFLAGS_CMDCODE,
- BLE_LLD_ENCRYPTPLAINDATA_CMDCODE,
- BLE_LLD_STARTTONE_CMDCODE,
- BLE_LLD_STOPTONE_CMDCODE,
- BLE_LLD_SETRESERVEDAREA_CMDCODE,
- BLE_LLD_MAKEACTIONPACKETPENDING_CMDCODE,
- BLE_LLD_INIT_CMDCODE,
-} BLE_LLD_Code_t;
-
-/* dataRoutine and condRoutine struct */
-typedef PACKED_STRUCT
-{
- uint8_t condCase;
- uint8_t dataCase;
-} setCase_t;
-
-/* Structure for Buffer */
-typedef PACKED_STRUCT
-{
- uint8_t txBuffer[RADIO_PKT_TX_BUF_SIZE]; /* __I */ /*txBuffer + Encrypt*/
- uint8_t rxBuffer[RADIO_PKT_RX_BUF_SIZE]; /* __O */ /*rxBuffer + radioPacketNb=rxBuffer[257] */
-} buffer_BLE_LLD_t;
-
-/* Generic structure for messages to M0, mostly used as a size reference.
- Only returnValue is used.
- A specialized structure (param_hal_BLE_xxx_t or param_BLE_LLD_xxx_t) should
- be used for actual messages. */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[24];
- uint8_t returnValue;
- uint8_t padding2[5];
- setCase_t padding3;
- buffer_BLE_LLD_t padding4;
-} param_BLE_LLD_t;
-
-/** Parameters for command HAL_BLE_SETNETWORKID_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t padding1[2];
- uint32_t id;
-} param_BLE_LLD_network_t;
-
-/** Parameters for commands HAL_BLE_SENDPACKET_CMDCODE and
- * HAL_BLE_LLD_SENDPACKETWITHACK_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t wakeupTime;
- uint32_t receiveTimeout;
- uint32_t packetNumber;
- uint8_t padding1[13];
- uint8_t channel;
- uint8_t padding2;
- uint8_t packetStopRx;
- uint8_t padding3[2];
- setCase_t setCase;
- buffer_BLE_LLD_t txrxBuffer;
-} param_BLE_LLD_send_t;
-
-/** Parameters for commands HAL_BLE_RECEIVEPACKET_CMDCODE and
- * HAL_BLE_LLD_RECEIVEPACKETWITHACK_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t wakeupTime;
- uint32_t receiveTimeout;
- uint32_t packetNumber;
- uint8_t padding1[14];
- uint8_t channel;
- uint8_t packetStopRx;
- uint8_t padding2[2];
- setCase_t setCase;
- buffer_BLE_LLD_t txrxBuffer;
-} param_BLE_LLD_receive_t;
-
-/** Parameters for command BLE_LLD_GETSTATUS_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t padding1[2];
- uint32_t time;
-} param_BLE_LLD_status_t;
-
-/** Parameters for command BLE_LLD_SETENCRYPTIONCOUNT_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[27];
- uint8_t stateMachineNo;
- uint8_t padding2[2];
- setCase_t padding3;
- uint8_t countTx[5];
- uint8_t countRcv[5];
-} param_BLE_LLD_cryptCount_t;
-
-/** Parameters for command BLE_LLD_SETENCRYPTIONATTRIBUTES_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[27];
- uint8_t stateMachineNo;
- uint8_t padding2[2];
- setCase_t padding3;
- uint8_t encIv[AES_IV_SIZE];
- uint8_t encKey[AES_KEY_SIZE];
-} param_BLE_LLD_cryptAttr_t;
-
-/** Parameters for command BLE_LLD_SETENCRYPTFLAGS_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[25];
- uint8_t encFlagTx;
- uint8_t encFlagRx;
- uint8_t StateMachineNo;
-} param_BLE_LLD_cryptFlags_t;
-
-/** Parameters for command BLE_LLD_ENCRYPTPLAINDATA_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[30];
- setCase_t padding2;
- uint8_t key[AES_KEY_SIZE];
- uint8_t padding3[112];
- uint8_t plainData[AES_BLOCK_SIZE];
- uint8_t padding[116];
- uint8_t cypherData[AES_BLOCK_SIZE];
-} param_BLE_LLD_crypt_t;
-
-/** Parameters for command BLE_LLD_STARTTONE_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[25];
- uint8_t channel;
- uint8_t padding2;
- uint8_t power;
-} param_BLE_LLD_toneStart_t;
-
-/** Parameters for command BLE_LLD_SETCHANNELMAP_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[27];
- uint8_t stateMachineNo;
- uint8_t padding2[2];
- setCase_t padding3;
- uint8_t map[CHAN_MAP_SIZE];
-} param_BLE_LLD_chanMap_t;
-
-/** Parameters for command BLE_LLD_SETCHANNEL_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[25];
- uint8_t channel;
- uint8_t channelInc;
- uint8_t stateMachineNo;
-} param_BLE_LLD_chan_t;
-
-/** Parameters for command BLE_LLD_SETTXATTRIBUTES_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t crcInit;
- uint32_t sca;
- uint32_t networkId;
- uint8_t padding1[15];
- uint8_t stateMachineNo;
-} param_BLE_LLD_txAttr_t;
-
-/** Parameters for command BLE_LLD_SETBACKTOBACKTIME_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t backToBackTime;
-} param_BLE_LLD_b2b_t;
-
-/** Parameters for command BLE_LLD_SETTXPOWER_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[27];
- uint8_t power;
-} param_BLE_LLD_power_t;
-
-/** Parameters for command BLE_LLD_SETTX_RX_PHY_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[25];
- uint8_t txPhy;
- uint8_t rxPhy;
- uint8_t stateMachineNo;
-} param_BLE_LLD_phy_t;
-
-/** Parameters for command BLE_LLD_SETRESERVEDAREA_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t wakeupTime;
- uint32_t receiveWindowLength;
- uint8_t padding1[17];
- uint8_t nextTrue;
- uint8_t nextFalse;
- uint8_t stateMachineNo;
- uint8_t actionTag;
- uint8_t actionPacketNb;
- setCase_t setCase;
- buffer_BLE_LLD_t txrxBuffer;
-} param_BLE_LLD_reserved_t;
-
-/** Parameters for command BLE_LLD_MAKEACTIONPACKETPENDING_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t padding1[2];
- uint32_t packetNumber;
- uint8_t padding2[15];
- uint8_t packetStopRx;
- uint8_t padding3;
- uint8_t actionPacketNb;
-} param_BLE_LLD_mkPending_t;
-
-/** Parameters for command BLE_LLD_INIT_CMDCODE */
-typedef PACKED_STRUCT
-{
- uint32_t startupTime;
- uint8_t padding1[24];
- uint8_t lowSpeedOsc;
- uint8_t whitening;
- setCase_t padding2;
- buffer_BLE_LLD_t txrxBuffer;
-} param_BLE_LLD_init_t;
-
-/** Parameters for replies */
-typedef PACKED_STRUCT
-{
- uint8_t padding1[12];
- uint32_t status;
- uint32_t timestampReceive;
- uint32_t rssi;
- uint8_t padding2[6];
- setCase_t padding3;
- buffer_BLE_LLD_t txrxBuffer;
-} param_BLE_LLD_m0Reply_t;
-
-/** Command to M0 */
-typedef PACKED_STRUCT
-{
- uint8_t id;
- param_BLE_LLD_t *params;
-} bleCmd_t;
-
-#endif /* BLE_LLD_PRIVATE_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.c
new file mode 100644
index 000000000..caa507a85
--- /dev/null
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.c
@@ -0,0 +1,161 @@
+/**
+ ******************************************************************************
+ * File Name : pressbutton_app.c
+ * Description : BLE LLD simple demo to control LEDs remotely
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stdbool.h"
+#include "app_common.h"
+#include "stm32_seq.h"
+#include "stm32_lpm.h"
+#include "stm_logging.h"
+#include "dbg_trace.h"
+#include "ble_hal.h"
+#include "ipBLE_lld_public.h"
+#include "app_ble_lld.h"
+#include "pressbutton_app.h"
+
+/* Private includes -----------------------------------------------------------*/
+
+/* Private typedef -----------------------------------------------------------*/
+// Allows to pack and unpack user data in payload (must not exceed 255 bytes)
+typedef PACKED_STRUCT
+{
+ uint8_t led;
+} userPayload;
+
+/* Private defines -----------------------------------------------------------*/
+#define CHANNEL 8 // radio channel
+#define POWER TX_POW_PLUS_6_DB // Transmit power
+#define NET_ID 0x5A964129 // network ID, both devices must use the same
+#define RX_TIMEOUT_US (1*1000*1000) // max delay radio will listen for a packet
+#define DEBOUNCE_MS 250 // debouncing delay (ms)
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+static void radioInit(void);
+static void listenStart(void);
+static void listenEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+static void sendStart(void);
+static void sendEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size);
+
+static inline uint32_t timeDifference(uint32_t old, uint32_t new);
+
+/* Private variables -----------------------------------------------*/
+static uint32_t ledToToggle;
+
+/* Functions Definition ------------------------------------------------------*/
+
+void PRESSBUTTON_APP_Init(void)
+{
+ CheckWirelessFirmwareInfo();
+
+ /* Disable low power */
+ UTIL_LPM_SetOffMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE);
+ UTIL_LPM_SetStopMode(1 << CFG_LPM_APP_BLE_LLD, UTIL_LPM_DISABLE );
+
+ /* Register tasks for event processing */
+ UTIL_SEQ_RegTask(1<<CFG_TASK_BUTTON, UTIL_SEQ_RFU, sendStart);
+
+ APP_BLE_LLD_Init();
+ radioInit();
+ listenStart();
+}
+
+static void radioInit(void)
+{
+ HAL_BLE_LLD_Init(CFG_HS_STARTUP_TIME, true);
+ HAL_BLE_LLD_Configure(POWER, CHANNEL, true, CFG_BACK2BACK_TIME, NET_ID);
+}
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ static uint32_t latest = 0;
+
+ // Debounce
+ if (timeDifference(latest, HAL_GetTick()) > DEBOUNCE_MS){
+ latest = HAL_GetTick();
+ switch (GPIO_Pin){
+ case BUTTON_SW1_PIN: ledToToggle = LED1; break;
+ case BUTTON_SW2_PIN: ledToToggle = LED2; break;
+ case BUTTON_SW3_PIN: ledToToggle = LED3; break;
+ default: return;
+ }
+ UTIL_SEQ_SetTask(1U << CFG_TASK_BUTTON, CFG_SCH_PRIO_0);
+ }
+}
+
+static void listenStart(void)
+{
+ uint8_t status;
+ status = HAL_BLE_LLD_ReceivePacket(RX_TIMEOUT_US, listenEnd);
+ if (status != SUCCESS_0){
+ APP_DBG("ERROR: %s: HAL call failed", __func__);
+ }
+}
+
+static void listenEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+ userPayload *payload = data;
+ Led_TypeDef led;
+ APP_DBG("%s: event %s", __func__, eventToString(cmd));
+ if (cmd == RX_OK_READY){
+ if (size != sizeof(userPayload)){
+ APP_DBG("%s: wrong payload length, packet discarded", __func__);
+ }else{
+ led = (Led_TypeDef)payload->led;
+ if (led != LED1 && led != LED2 && led != LED3){
+ APP_DBG("%s: wrong led value, packet discarded", __func__);
+ }else{
+ BSP_LED_Toggle(led);
+ uartWrite("Led %d is Toggling", led);
+ }
+ }
+ }
+ listenStart();
+}
+
+
+static void sendStart(void)
+{
+ userPayload payload;
+
+ // Need to interrupt radio while it is listening, then to reinit
+ BLE_LLD_StopActivity();
+ radioInit();
+
+ payload.led = ledToToggle;
+ HAL_BLE_LLD_SendPacket(&payload, sizeof(payload),sendEnd);
+}
+
+static void sendEnd(radioEventType cmd, ActionPacket *ap, void *data, uint8_t size)
+{
+ APP_DBG("%s: event %s", __func__, eventToString(cmd));
+ listenStart();
+}
+
+// Computes difference between old and new timestamps with rollover handling
+static inline uint32_t timeDifference(uint32_t old, uint32_t new){
+ if(new < old){
+ // Rollover happened
+ return UINT32_MAX - old + 1 + new;
+ }else{
+ return new - old;
+ }
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/pressbutton_app.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.h
index e18e7d3fc..602d7c8c4 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/pressbutton_app.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.h
@@ -39,7 +39,6 @@ extern "C" {
/* Exported functions ------------------------------------------------------- */
void PRESSBUTTON_APP_Init(void);
-void Appli_TIM_PeriodElapsedCallback(void);
#ifdef __cplusplus
} /* extern "C" */
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.c b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.c
deleted file mode 100644
index d04d5ca5b..000000000
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/**
- ******************************************************************************
- * File Name : ring_buffer.c
- * Description : utility to provide ring buffer component
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-
-/* "SPECIFICATIONS"
- - support any type as an element (with any size): not for now, only char
- - no dynamic allocation
- - buffer size can be changed by user
- - support adding multiple elements (string)
- - support removing multiple elements (string?)
-
-*/
-
-/* Includes ------------------------------------------------------------------*/
-#include "app_conf.h"
-#include "app_common.h"
-#include "dbg_trace.h"
-#include "stm_logging.h"
-#include "ring_buffer.h"
-
-/* Private includes ----------------------------------------------------------*/
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private defines -----------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-/* Functions Definition ------------------------------------------------------*/
-
-// WARNING: be careful to protect a buffer operation by critical section if it
-// can be accessed in interruption too
-
-// Private function to move an index one step forward
-static inline void bufIncIndex(const Buffer *buf, uint32_t *index){
- *index = (*index + 1) % buf->mem_size;
-}
-
-// Initialize buffer structure, must be called first (see BUF_ALLOC)
-void bufInit(Buffer *buf, uint32_t size){
- buf->idx_rd = 0;
- buf->idx_wr = 0;
- buf->mem_size = size;
- buf->data_size = 0;
-}
-
-// Test if buffer is empty
-bool bufIsEmpty(const Buffer *buf){
- return (0 == buf->data_size);
-}
-
-// Test if buffer is full
-bool bufIsFull(const Buffer *buf){
- return (buf->mem_size == buf->data_size);
-}
-
-// Store one byte in buffer
-// Call ignored if buffer already full
-void bufPutChar(Buffer *buf, char character){
- if(! bufIsFull(buf)){
- buf->memory[buf->idx_wr] = character;
- bufIncIndex(buf, &(buf->idx_wr));
- (buf->data_size)++;
- }
-}
-
-// Store a string in buffer (without '\0')
-// When buffer is full, remaining bytes are dropped
-void bufPutString(Buffer *buf, const char *string){
- uint32_t freeSize = buf->mem_size - buf->data_size;
- uint32_t addSize = MIN(strlen(string), freeSize);
- uint32_t toEndSize = buf->mem_size - buf->idx_wr;
- uint32_t cp1Size = addSize;
- uint32_t cp2Size = 0;
- if (addSize > toEndSize){
- cp1Size = toEndSize;
- cp2Size = addSize - toEndSize;
- }
- memcpy(&(buf->memory[buf->idx_wr]), string, cp1Size);
- if (cp2Size == 0){
- buf->idx_wr = (buf->idx_wr + cp1Size) % buf->mem_size;
- }else{
- memcpy(&(buf->memory[0]), &(string[cp1Size]), cp2Size);
- buf->idx_wr = cp2Size;
- }
- buf->data_size += addSize;
-}
-
-// Retrieve one byte from buffer
-// Buffer must not be empty (check with bufIsEmpty())
-char bufGetChar(Buffer *buf){
- char character;
- character = buf->memory[buf->idx_rd];
- bufIncIndex(buf, &(buf->idx_rd));
- (buf->data_size)--;
- return character;
-}
-
-// Retrieve at most size chars from buffer, return actual count copied
-uint32_t bufGetMultiChar(Buffer *buf, char *dest, uint32_t size){
- uint32_t count = 0;
- while (! bufIsEmpty(buf) && (count < size)){
- *dest = bufGetChar(buf);
- dest++;
- count++;
- }
- return count;
-}
-
-#define TEST(EXP) \
- do { \
- if(!(EXP)) { \
- PRINT_MESG_DBG("Test failed on line %d: " #EXP, __LINE__); \
- all_passed = false; \
- } \
- } while (0)
-
-#define BUF_TEST_SIZE 128
-
-// Test buffer code
-void bufTest(void){
- uint32_t i;
- bool all_passed = true;
- char bufMem[sizeof(Buffer) + BUF_TEST_SIZE];
- Buffer *buf = (Buffer *)&bufMem;
-
- PRINT_MESG_DBG("entering %s()", __func__);
- bufInit(buf, BUF_TEST_SIZE);
- TEST(bufIsEmpty(buf));
-
- bufPutChar(buf, 'a');
- TEST(!bufIsEmpty(buf));
- TEST(!bufIsFull(buf));
- TEST('a' == bufGetChar(buf));
- TEST(bufIsEmpty(buf));
-
- TEST(bufIsEmpty(buf));
- const char testString[] = "ST Microelectronics";
- char checkString[64];
- i = 0;
- bufPutString(buf, testString);
- while(!bufIsEmpty(buf)){
- checkString[i] = bufGetChar(buf);
- i++;
- }
- checkString[i] = '\0';
- TEST(0 == strcmp(testString, checkString));
-
- for(uint32_t i = 0; i<buf->mem_size; i++){
- bufPutChar(buf, 'a');
- }
- TEST(!bufIsEmpty(buf));
- TEST(bufIsFull(buf));
-
- // Check that new entries are ignored when full
- bufPutChar(buf, 'b');
-
- i = 0;
- while(!bufIsEmpty(buf)){
- TEST('a' == bufGetChar(buf));
- i++;
- }
- TEST(buf->mem_size == i);
-
- // Check interleaved access
- TEST(bufIsEmpty(buf));
- bufPutChar(buf, 'a');
- bufPutChar(buf, 'b');
- TEST('a' == bufGetChar(buf));
- bufPutChar(buf, 'c');
- TEST('b' == bufGetChar(buf));
- TEST('c' == bufGetChar(buf));
- TEST(bufIsEmpty(buf));
-
- // Check bufPutString without rollover
- bufInit(buf, BUF_TEST_SIZE);
- const char testString2[] = "ring buffer test string";
- bufPutString(buf, testString2);
- i = 0;
- while(!bufIsEmpty(buf)){
- checkString[i] = bufGetChar(buf);
- i++;
- }
- checkString[i] = '\0';
- TEST(0 == strcmp(testString2, checkString));
-
-// Check bufPutString with rollover
- bufInit(buf, BUF_TEST_SIZE);
- const char testString3[] = "ring buffer rollover test string";
- for (i=0; i < (BUF_TEST_SIZE - 10); i++){
- bufPutChar(buf, 'm');
- }
- for (i=0; i < 30; i++){
- bufGetChar(buf);
- }
- bufPutString(buf, testString3);
- for (i=0; i < (BUF_TEST_SIZE -10 -30); i++){
- bufGetChar(buf);
- }
- i = 0;
- while(!bufIsEmpty(buf)){
- checkString[i] = bufGetChar(buf);
- i++;
- }
- checkString[i] = '\0';
- PRINT_MESG_DBG(checkString);
- TEST(0 == strcmp(testString3, checkString));
-
- if(all_passed){
- PRINT_MESG_DBG("Ring buffer: all tests passed");
- }
-}
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.h b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.h
deleted file mode 100644
index fade0e716..000000000
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/**
- ******************************************************************************
- * File Name : ring_buffer.h
- * Description : utility to provide ring buffer component
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-#ifndef RING_BUFFER_H
-#define RING_BUFFER_H
-
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef struct {
- uint32_t idx_rd; // index of the next element to read
- uint32_t idx_wr; // index of the next element to write
- uint32_t data_size; // current number of elements
- // (needed to be able to store mem_size elements)
- uint32_t mem_size; // size of memory[]
- char memory[]; // user data starts at this point
-}Buffer;
-
-/* Buffer memory should be allocated with:
-BUF_ALLOC(memoryVariable, BUFFER_SIZE);
-Buffer *userBufferPointer = (Buffer *)&memoryVariable;
-*/
-
-// Allocate memory for buffer, with alignment guarantee
-#define BUF_ALLOC(variable, size) \
- static void *(variable)[(sizeof(Buffer) + (size)) / (sizeof(void *)) + 1]
-
-void bufInit(Buffer *buf, uint32_t size);
-
-bool bufIsEmpty(const Buffer *buf);
-bool bufIsFull(const Buffer *buf);
-
-void bufPutChar(Buffer *buf, char character);
-void bufPutString(Buffer *buf, const char *string);
-
-char bufGetChar(Buffer *buf);
-uint32_t bufGetMultiChar(Buffer *buf, char *dest, uint32_t size);
-
-void bufTest(void);
-
-#endif
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/readme.txt b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/readme.txt
index bce8e9aba..83d962024 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/readme.txt
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Pressbutton/readme.txt
@@ -20,11 +20,11 @@
@par Example Description
-How to make blinking LED between 2 STM32WB15xx boards by pressing buttons.
+How to make toggling LED between 2 boards by pressing buttons.
@note The objectives are to communicate using BLE_LLD between 2 boards,
in BLE Radio format not BLE Stack protocol.
- BLE_LLD_Pressbutton can use 2 terminal to display communication between 2 boards.
+ BLE_LLD_Pressbutton can use 2 terminals to display communication between 2 boards.
BLE_LLD_Pressbutton can be used with BLE_LLD_Lowpower.
But Appli is based to show in a very simple way a communication between 2 boards:
It is based on pressing button and blinking answer
@@ -33,8 +33,15 @@ How to make blinking LED between 2 STM32WB15xx boards by pressing buttons.
Lowest Layer also called Low Level or LL
It is just over the Hardware and Radio Layer.
It contains all the API to Set/Configure/Initialize all the parameters for Sending/receiving BLE Radio format packet data
+ Over LL layer there is HAL level
+ It contains a reduced number of API to Send/Receive BLE Radio format packet with predefined parameters
+ It works by calling a set of LL API
+ It make simple and fast to Send/Receive Packet
+ But It does allow the user to change all the Radio parameters
-@note ble_lld module contains LL API
+@note LL is for user that want to customize the Radio and BLE parameters, it is more complex to implement
+ HAL is for user that want to Send/Receive in a very simple way less complex, without configuring LL
+ ble_lld module contains LLD API HAL and LL API
app_ble_lld module contains Transport Layer Command call from CPU1 to CPU2 + Buffer management + IT Radio management from CPU2
@par Keywords
@@ -44,13 +51,10 @@ BLE_LLD, Connectivity, BLE, LLD, IPCC, HAL, Dual core, send and receive Packet
@par Directory contents
- BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.h Header for app_ble_lld.c module
- - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.h Header for ble_lld.c module
- - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld_private.h Header for ble_lld private module
+ - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.h Header for Pressbutton Application pressbutton_app.c module
- BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/tl_dbg_conf.h Header for ble_lld debug module
- - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.h Header for ring buffer.c module
- BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/app_ble_lld.c contains TL management and Buffer for BLE LLD Application
- - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ble_lld.c contains LL and HAL API
- - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/ring_buffer.c contains ring buffer API
+ - BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/App/pressbutton_app.c Pressbutton program
- BLE_LLD/BLE_LLD_Pressbutton/STM32_WPAN/Target/hw_ipcc.c IPCC Driver
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_common.h Header for all modules with common definition
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/app_conf.h Parameters configuration file of the application
@@ -58,7 +62,6 @@ BLE_LLD, Connectivity, BLE, LLD, IPCC, HAL, Dual core, send and receive Packet
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/gpio_lld.h Parameters for gpio configuration file of the application
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_conf.h Configuration file of the HW
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/hw_if.h Configuration file of the HW
- - BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/pressbutton_app.h Header for Pressbutton Application pressbutton_app.c module
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/main.h Header for main.c module
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm_logging.h Header for stm_logging.c module
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32_lpm_if.h Header for stm32_lpm_if.c module
@@ -66,10 +69,9 @@ BLE_LLD, Connectivity, BLE, LLD, IPCC, HAL, Dual core, send and receive Packet
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/stm32wbxx_it.h Interrupt handlers header file
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/utilities_conf.h Configuration file of the utilities
- BLE_LLD/BLE_LLD_Pressbutton/Core/Inc/nucleo_wb15cc_conf.h NUCLEO-WB15CC board configuration file
- - BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c Initialization of the application
+ - BLE_LLD/BLE_LLD_Pressbutton/Core/Src/app_entry.c Initialization of the application
- BLE_LLD/BLE_LLD_Pressbutton/Core/Src/gpio_lld.c GPIO for application
- - BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c UART Driver
- - BLE_LLD/BLE_LLD_Pressbutton/Core/Src/pressbutton_app.c Pressbutton program
+ - BLE_LLD/BLE_LLD_Pressbutton/Core/Src/hw_uart.c UART Driver
- BLE_LLD/BLE_LLD_Pressbutton/Core/Src/main.c Main program
- BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm_logging.c Logging for application
- BLE_LLD/BLE_LLD_Pressbutton/Core/Src/stm32_lpm_if.c Low Power Manager Interface
@@ -104,7 +106,7 @@ BLE_LLD, Connectivity, BLE, LLD, IPCC, HAL, Dual core, send and receive Packet
@par How to use it ?
In order to make the program work, you must do the following:
- - Connect 2 NUCLEO-WB15CC boards to your PC
+ - Connect 1 NUCLEO-WB15CC board to your PC
- Open your preferred toolchain
- Rebuild all files and load your image into one target memory
- Rebuild all files of BLE_LLD/BLE_LLD_Pressbutton application
@@ -112,49 +114,31 @@ In order to make the program work, you must do the following:
+ load stm32wb1x_BLE_LLD_fw.bin
- Run the application
-BLE_LLD_Pressbutton used only LL API for Send/receive by pressing SW1
+BLE_LLD_Pressbutton used only HAL API for Send/Receive
-If you want to control this application, you can directly press buttons
+If you want to control this application, you can press buttons
In this order and described into main.c:
-After power On or Reset (ALL the LED are OFF)
+After power On or Reset (ALL the LED are OFF) all the Boards are in Received mode
- 1) Press SW2 or SW3 to Init => GREEN and RED LED becomes ON after Init
- LL API : BLUE LED is OFF
- - BLE_LLD_Init(HS_STARTUP_TIME, 1, BLE_LLD_hot_ana_config_table, ENABLE);
+ 1) Press button SW on first board to interrupt Received mode and Send LED number to second board:
+ -SW Number 1 (SW1) for LED Number 1 (LED1)
+ -SW Number 2 (SW2) for LED Number 2 (LED2)
+ -SW Number 3 (SW3) for LED Number 3 (LED3)
- To send a Packet go to 2)
- or
- To receive a Packet go to 3)
-
- 2) Press SW2 for Send 500 Chained Packets ===> GREEN is switched off during TX
- LL API : BLUE LED is OFF
- - BLE_LLD_MakeActionPacketPending(); // after setting Packet is pending and start TX after TIMEOUT IT
+ 2) When Second board Receive LED number:
+ -LED1 : LED1 is Toggling
+ "Led 1 is Toggling" is print
+ -LED2 : LED2 is Toggling
+ "Led 2 is Toggling" is print
+ -LED3 : LED3 is Toggling
+ "Led 3 is Toggling" is print
- or
-
- 3) Press SW3 for receiving 400 Packets (HAL) and 500 Packets (LL) ===> RED is switched off during RX
- LL API : BLUE LED is OFF
- - BLE_LLD_MakeActionPacketPending(); // after setting Packet is pending and start RX after TIMEOUT IT
-
-
- 4) Press SW1 (Init must be performed after)
- Toggle BLUE LED
- Step 1) to re-start sequence
-
-
-
-When one board Send : RED LED is ON
-When one board Receive: GREEN LED is ON
+ 3) To Switch off the LED press Reset or press the SW Number corresponding of the LED that is ON
-When one board Send and other Receive and communicates with ACK,
-Sending board GREEN LED toggle (Terminal shows the TX with RX Ack communication)
-Receiving board RED LED toggle (Terminal shows the RX with TX Ack communication)
-
-At the END GREEN and RED LED are ON (Terminal shows the final number of TX/RX)
Serial Port Setup TERMINAL
Baud Rate:115200 / Data:8 bits / Parity:none / Stop:1bit / Flow Control:none
* <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
- */
+ */ \ No newline at end of file