diff options
Diffstat (limited to 'Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c')
| -rw-r--r-- | Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c index 5e27e0fd2..c4c2c3ea8 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c @@ -6,13 +6,13 @@ * This file provides firmware functions to manage the following * functionalities of the CORTEX: * + Initialization and Configuration functions - * + Peripheral Control functions + * + Peripheral Control functions * @verbatim ============================================================================== ##### How to use this driver ##### ============================================================================== - [..] + [..] *** How to configure Interrupts using CORTEX HAL driver *** =========================================================== [..] @@ -37,7 +37,7 @@ [..] Setup SysTick Timer for time base. - (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which + (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which is a CMSIS function that: (++) Configures the SysTick Reload register with value passed as function parameter. (++) Configures the SysTick IRQ priority to the lowest value (0x03). @@ -52,7 +52,7 @@ inside the stm32wbxx_hal_cortex.h file. (+) You can change the SysTick IRQ priority by calling the - HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function + HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function. (+) To adjust the SysTick time base, use the following formula: @@ -65,15 +65,15 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * <h2><center>© Copyright (c) 2019 STMicroelectronics. * All rights reserved.</center></h2> * * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * opensource.org/licenses/BSD-3-Clause * - ****************************************************************************** + ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -93,7 +93,7 @@ /* Private variables ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/ /** @addtogroup CORTEX_Exported_Functions @@ -102,15 +102,15 @@ /** @addtogroup CORTEX_Exported_Functions_Group1 - * @brief Initialization and Configuration functions - * + * @brief Initialization and Configuration functions + * @verbatim ============================================================================== ##### Initialization and Configuration functions ##### ============================================================================== [..] This section provides the CORTEX HAL driver functions allowing to configure Interrupts - Systick functionalities + SysTick functionalities @endverbatim * @{ @@ -119,7 +119,7 @@ /** * @brief Set the priority grouping field (pre-emption priority and subpriority) * using the required unlock sequence. - * @param PriorityGroup The priority grouping bits length. + * @param PriorityGroup The priority grouping bits length. * This parameter can be one of the following values: * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority, * 4 bits for subpriority @@ -181,7 +181,7 @@ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - + /* Enable interrupt */ NVIC_EnableIRQ(IRQn); } @@ -197,7 +197,7 @@ void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) { /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - + /* Disable interrupt */ NVIC_DisableIRQ(IRQn); } @@ -213,7 +213,7 @@ void HAL_NVIC_SystemReset(void) } /** - * @brief Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick): + * @brief Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick): * Counter is in free running mode to generate periodic interrupts. * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. @@ -221,15 +221,15 @@ void HAL_NVIC_SystemReset(void) */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - return SysTick_Config(TicksNumb); + return SysTick_Config(TicksNumb); } /** * @} */ /** @addtogroup CORTEX_Exported_Functions_Group2 - * @brief Cortex control functions - * + * @brief Cortex control functions + * @verbatim ============================================================================== ##### Peripheral Control functions ##### @@ -279,9 +279,9 @@ void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPre { /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - /* Get priority for Cortex-M system or device specific interrupts */ + /* Get priority for Cortex-M system or device specific interrupts */ NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority); -} +} /** * @brief Set Pending bit of an external interrupt. @@ -294,7 +294,7 @@ void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) { /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - + /* Set interrupt pending */ NVIC_SetPendingIRQ(IRQn); } @@ -312,7 +312,7 @@ uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) { /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - + /* Return 1 if pending else 0 */ return NVIC_GetPendingIRQ(IRQn); } @@ -328,7 +328,7 @@ void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) { /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - + /* Clear pending interrupt */ NVIC_ClearPendingIRQ(IRQn); } @@ -394,8 +394,8 @@ void HAL_MPU_Disable(void) /** * @brief Enable the MPU. - * @param MPU_Control: Specifies the control mode of the MPU during hard fault, - * NMI, FAULTMASK and privileged access to the default memory + * @param MPU_Control: Specifies the control mode of the MPU during hard fault, + * NMI, FAULTMASK and privileged access to the default memory * This parameter can be one of the following values: * @arg MPU_HFNMI_PRIVDEF_NONE * @arg MPU_HARDFAULT_NMI @@ -406,7 +406,7 @@ void HAL_MPU_Disable(void) void HAL_MPU_Enable(uint32_t MPU_Control) { /* Enable the MPU */ - MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; + MPU->CTRL = (MPU_Control | MPU_CTRL_ENABLE_Msk); /* Enable fault exceptions */ SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; @@ -442,7 +442,7 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); - + MPU->RBAR = MPU_Init->BaseAddress; MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | |