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path: root/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c
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Diffstat (limited to 'Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c')
-rw-r--r--Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c113
1 files changed, 95 insertions, 18 deletions
diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c
index 615d31abb..3a04eb764 100644
--- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c
+++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c
@@ -1007,6 +1007,11 @@ error:
*/
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
+#if (USE_SPI_CRC != 0U)
+ __IO uint32_t tmpreg = 0U;
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
+#endif /* USE_SPI_CRC */
uint32_t tickstart;
HAL_StatusTypeDef errorcode = HAL_OK;
@@ -1173,12 +1178,18 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
{
/* Read 16bit CRC */
- READ_REG(hspi->Instance->DR);
+ tmpreg = READ_REG(hspi->Instance->DR);
+ /* To avoid GCC warning */
+ UNUSED(tmpreg);
}
else
{
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
{
@@ -1190,7 +1201,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
goto error;
}
/* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
}
}
}
@@ -1241,8 +1254,11 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
HAL_SPI_StateTypeDef tmp_state;
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
+ __IO uint32_t tmpreg = 0U;
uint32_t spi_cr1;
uint32_t spi_cr2;
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
#endif /* USE_SPI_CRC */
/* Variable used to alternate Rx and Tx during transfer */
@@ -1476,12 +1492,18 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
{
/* Read 16bit CRC */
- READ_REG(hspi->Instance->DR);
+ tmpreg = READ_REG(hspi->Instance->DR);
+ /* To avoid GCC warning */
+ UNUSED(tmpreg);
}
else
{
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
{
@@ -1493,7 +1515,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
goto error;
}
/* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
}
}
}
@@ -3048,6 +3072,11 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
{
SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
uint32_t tickstart;
+#if (USE_SPI_CRC != 0U)
+ __IO uint32_t tmpreg = 0U;
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
+#endif /* USE_SPI_CRC */
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
@@ -3072,12 +3101,18 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
{
/* Read 16bit CRC */
- READ_REG(hspi->Instance->DR);
+ tmpreg = READ_REG(hspi->Instance->DR);
+ /* To avoid GCC warning */
+ UNUSED(tmpreg);
}
else
{
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
{
@@ -3087,7 +3122,9 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
}
/* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
}
}
}
@@ -3152,6 +3189,11 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
{
SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
uint32_t tickstart;
+#if (USE_SPI_CRC != 0U)
+ __IO uint32_t tmpreg = 0U;
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
+#endif /* USE_SPI_CRC */
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
@@ -3174,8 +3216,12 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
/* Error on the CRC reception */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
}
- /* Read CRC to Flush DR and RXNE flag */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
+ /* Read 8bit CRC */
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
}
else
{
@@ -3185,7 +3231,9 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
}
/* Read CRC to Flush DR and RXNE flag */
- READ_REG(hspi->Instance->DR);
+ tmpreg = READ_REG(hspi->Instance->DR);
+ /* To avoid GCC warning */
+ UNUSED(tmpreg);
}
}
#endif /* USE_SPI_CRC */
@@ -3520,8 +3568,15 @@ static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
+
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC to flush Data Register */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
hspi->CRCSize--;
@@ -3628,8 +3683,12 @@ static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
{
+ __IO uint32_t tmpreg = 0U;
+
/* Read 16bit CRC to flush Data Register */
- READ_REG(hspi->Instance->DR);
+ tmpreg = READ_REG(hspi->Instance->DR);
+ /* To avoid GCC warning */
+ UNUSED(tmpreg);
/* Disable RXNE interrupt */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
@@ -3684,8 +3743,15 @@ static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
+
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC to flush Data Register */
- READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
hspi->CRCSize--;
@@ -3738,8 +3804,12 @@ static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
{
+ __IO uint32_t tmpreg = 0U;
+
/* Read 16bit CRC to flush Data Register */
- READ_REG(hspi->Instance->DR);
+ tmpreg = READ_REG(hspi->Instance->DR);
+ /* To avoid GCC warning */
+ UNUSED(tmpreg);
/* Disable RXNE and ERR interrupt */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
@@ -3917,11 +3987,16 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi,
__IO uint32_t count;
uint32_t tmp_timeout;
uint32_t tmp_tickstart;
+ __IO uint8_t * ptmpreg8;
+ __IO uint8_t tmpreg8 = 0;
/* Adjust Timeout value in case of end of transfer */
tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
tmp_tickstart = HAL_GetTick();
+ /* Initialize the 8bit temporary pointer */
+ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
+
/* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U);
@@ -3929,8 +4004,10 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi,
{
if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
{
- /* Read 8bit CRC to flush Data Register */
- READ_REG(*((__IO uint8_t *)&hspi->Instance->DR));
+ /* Flush Data Register by a blank read */
+ tmpreg8 = *ptmpreg8;
+ /* To avoid GCC warning */
+ UNUSED(tmpreg8);
}
if (Timeout != HAL_MAX_DELAY)
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-03 21:15:04 +0300