diff options
Diffstat (limited to 'Projects/NUCLEO-WB15CC/Applications/BLE/BLE_DataThroughput/Core/Src/standby_stm32wb15.c')
-rw-r--r-- | Projects/NUCLEO-WB15CC/Applications/BLE/BLE_DataThroughput/Core/Src/standby_stm32wb15.c | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_DataThroughput/Core/Src/standby_stm32wb15.c b/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_DataThroughput/Core/Src/standby_stm32wb15.c index 088e3a717..67aa3b3be 100644 --- a/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_DataThroughput/Core/Src/standby_stm32wb15.c +++ b/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_DataThroughput/Core/Src/standby_stm32wb15.c @@ -1,3 +1,4 @@ +/* USER CODE BEGIN Header */ /** ****************************************************************************** * File Name : standby_stm32wb15.c @@ -57,7 +58,7 @@ uint32_t standby_boot_mng(void); void standby_hw_save(void); void standby_hw_restore(void); /* USER CODE BEGIN PFP */ -extern void SystemClock_Config(void); + /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ @@ -96,23 +97,28 @@ void standby_hw_restore(void) /* USER CODE END standby_hw_restore_1 */ APPD_Init(); + Init_Exti(); + HAL_Init(); - SystemClock_Config(); + HW_IPCC_Init(); + HW_IPCC_Enable(); + WRITE_REG(IPCC->C1MR, backup_IPCC_C1MR); - HAL_Init(); + if( !LL_HSEM_1StepLock( HSEM, CFG_HW_RCC_SEMID ) ) + { + LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI); + LL_HSEM_ReleaseLock( HSEM, CFG_HW_RCC_SEMID, 0 ); + } + LL_HSEM_ReleaseLock( HSEM, CFG_HW_PWR_STANDBY_SEMID, 0 ); /* In this user section add MX init functions present in main.c , except MX_RTC_Init() */ /* USER CODE BEGIN standby_hw_restore_2 */ - Init_Exti(); MX_GPIO_Init(); - + MX_DMA_Init(); + MX_USART1_UART_Init(); /* USER CODE END standby_hw_restore_2 */ - HW_IPCC_Init(); - HW_IPCC_Enable(); - WRITE_REG(IPCC->C1MR, backup_IPCC_C1MR); - HW_TS_Init(hw_ts_InitMode_Limited, &hrtc); LL_PWR_EnableSRAM2Retention(); @@ -137,14 +143,18 @@ void standby_hw_restore(void) uint32_t standby_boot_mng(void) { #if ( CFG_LPM_STANDBY_SUPPORTED != 0 ) + __HAL_RCC_HSEM_CLK_ENABLE(); + while( LL_HSEM_1StepLock( HSEM, CFG_HW_PWR_STANDBY_SEMID ) ); + if( __HAL_PWR_GET_FLAG(PWR_FLAG_SB) != RESET ) { __disable_irq( ); boot_after_standby = 1; - __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB); }else{ boot_after_standby = 0; + + LL_HSEM_ReleaseLock( HSEM, CFG_HW_PWR_STANDBY_SEMID, 0 ); } #else boot_after_standby = 0; |