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Diffstat (limited to 'Projects/NUCLEO-WB15CC/Applications/BLE/BLE_p2pServer/Core/Inc/hw_conf.h')
-rw-r--r--Projects/NUCLEO-WB15CC/Applications/BLE/BLE_p2pServer/Core/Inc/hw_conf.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_p2pServer/Core/Inc/hw_conf.h b/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_p2pServer/Core/Inc/hw_conf.h
index 8ef2ee4c6..8d9ecd40f 100644
--- a/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_p2pServer/Core/Inc/hw_conf.h
+++ b/Projects/NUCLEO-WB15CC/Applications/BLE/BLE_p2pServer/Core/Inc/hw_conf.h
@@ -27,6 +27,11 @@
* THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
*****************************************************************************/
/**
+* Index of the semaphore used the prevent conflicts after standby sleep.
+* Each CPUs takes this semaphore at standby wakeup until conclicting elements are restored.
+*/
+#define CFG_HW_PWR_STANDBY_SEMID 10
+/**
* The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.