diff options
Diffstat (limited to 'Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM')
4 files changed, 1890 insertions, 0 deletions
diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx new file mode 100644 index 000000000..78577bf71 --- /dev/null +++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/BLE_LLD_Lowpower.uvoptx @@ -0,0 +1,829 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>BLE_LLD</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath></ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + 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+ </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange></TextAddressRange> + <DataAddressRange></DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>stm32wb15xx_flash_cm4.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc>--diag_suppress L6314W +--diag_suppress 1296</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Application/MDK-ARM</GroupName> + <Files> + <File> + <FileName>startup_stm32wb15xx_cm4.s</FileName> + <FileType>2</FileType> + <FilePath>startup_stm32wb15xx_cm4.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Application/User/Core</GroupName> + <Files> + <File> + <FileName>app_entry.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/app_entry.c</FilePath> + </File> + <File> + <FileName>gpio_lld.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/gpio_lld.c</FilePath> + </File> + <File> + <FileName>hw_uart.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/hw_uart.c</FilePath> + </File> + <File> + <FileName>hw_timerserver.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/hw_timerserver.c</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/main.c</FilePath> + </File> + <File> + <FileName>stm32_lpm_if.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/stm32_lpm_if.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_msp.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/stm32wbxx_hal_msp.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_it.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/stm32wbxx_it.c</FilePath> + </File> + <File> + <FileName>stm_logging.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/stm_logging.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Application/User/STM32_WPAN/App</GroupName> + <Files> + <File> + <FileName>app_ble_lld.c</FileName> + <FileType>1</FileType> + <FilePath>../STM32_WPAN/App/app_ble_lld.c</FilePath> + </File> + <File> + <FileName>lowpower_app.c</FileName> + <FileType>1</FileType> + <FilePath>../STM32_WPAN/App/lowpower_app.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Application/User/STM32_WPAN/Target</GroupName> + <Files> + <File> + <FileName>hw_ipcc.c</FileName> + <FileType>1</FileType> + <FilePath>../STM32_WPAN/Target/hw_ipcc.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>../readme.txt</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers/BSP/NUCLEO-WB15CC</GroupName> + <Files> + <File> + <FileName>nucleo_wb15cc.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/BSP/NUCLEO-WB15CC/nucleo_wb15cc.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers/CMSIS</GroupName> + <Files> + <File> + <FileName>system_stm32wbxx.c</FileName> + <FileType>1</FileType> + <FilePath>../Core/Src/system_stm32wbxx.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers/STM32WBxx_HAL_Driver</GroupName> + <Files> + <File> + <FileName>stm32wbxx_hal.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_cortex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_dma.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_dma_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_exti.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_flash.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_flash_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_hsem.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_pwr_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_rcc.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_rcc_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_tim.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_tim_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_uart.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_uart_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_rtc.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c</FilePath> + </File> + <File> + <FileName>stm32wbxx_hal_rtc_ex.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Middlewares/STM32_WPAN</GroupName> + <Files> + <File> + <FileName>ble_hal.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/hal/ble_hal.c</FilePath> + </File> + <File> + <FileName>ble_lld.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/ble_lld/lld/ble_lld.c</FilePath> + </File> + <File> + <FileName>dbg_trace.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c</FilePath> + </File> + <File> + <FileName>otp.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/otp.c</FilePath> + </File> + <File> + <FileName>shci.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c</FilePath> + </File> + <File> + <FileName>shci_tl.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c</FilePath> + </File> + <File> + <FileName>shci_tl_if.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c</FilePath> + </File> + <File> + <FileName>stm_list.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_list.c</FilePath> + </File> + <File> + <FileName>stm_queue.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_queue.c</FilePath> + </File> + <File> + <FileName>tl_mbox.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Utilities</GroupName> + <Files> + <File> + <FileName>stm32_lpm.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Utilities/lpm/tiny_lpm/stm32_lpm.c</FilePath> + </File> + <File> + <FileName>stm32_seq.c</FileName> + <FileType>1</FileType> + <FilePath>../../../../../../Utilities/sequencer/stm32_seq.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="BLE_LLD"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s new file mode 100644 index 000000000..7794948c3 --- /dev/null +++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/startup_stm32wb15xx_cm4.s @@ -0,0 +1,336 @@ +;****************************************************************************** +;* File Name : startup_stm32wb15xx_cm4.s +;* Author : MCD Application Team +;* Description : STM32WB15xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2019 STMicroelectronics. All rights reserved. +;* +;* This software component is licensed by ST under Apache License, Version 2.0, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/Apache-2.0 +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; <h> Stack Configuration +; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; </h> + +Stack_Size EQU 0x400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; <h> Heap Configuration +; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; </h> + +Heap_Size EQU 0x200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD and PVM detector + DCD TAMP_STAMP_LSECSS_IRQHandler ; RTC Tamper and TimeStamp Interrupts and LSECSS Interrupts + DCD RTC_WKUP_IRQHandler ; RTC Wakeup Interrupt + DCD FLASH_IRQHandler ; FLASH global Interrupt + DCD RCC_IRQHandler ; RCC Interrupt + DCD EXTI0_IRQHandler ; EXTI Line 0 Interrupt + DCD EXTI1_IRQHandler ; EXTI Line 1 Interrupt + DCD EXTI2_IRQHandler ; EXTI Line 2 Interrupt + DCD EXTI3_IRQHandler ; EXTI Line 3 Interrup + DCD EXTI4_IRQHandler ; EXTI Line 4 Interrupt + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 Interrupt + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 Interrupt + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 Interrupt + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 Interrupt + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 Interrupt + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 Interrupt + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 Interrupt + DCD ADC1_IRQHandler ; ADC1 Interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD C2SEV_PWR_C2H_IRQHandler ; CPU M0+ SEV Interrupt + DCD COMP_IRQHandler ; COMP1 Interrupts + DCD EXTI9_5_IRQHandler ; EXTI Lines [9:5] Interrupt + DCD TIM1_BRK_IRQHandler ; TIM1 Break Interrupt + DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Communication Interrupts + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare Interrupt + DCD TIM2_IRQHandler ; TIM2 Global Interrupt + DCD PKA_IRQHandler ; PKA Interrupt + DCD I2C1_EV_IRQHandler ; I2C1 Event Interrupt + DCD I2C1_ER_IRQHandler ; I2C1 Error Interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SPI1_IRQHandler ; SPI1 Interrupt + DCD 0 ; Reserved + DCD USART1_IRQHandler ; USART1 Interrupt + DCD LPUART1_IRQHandler ; LPUART1 Interrupt + DCD 0 ; Reserved + DCD TSC_IRQHandler ; TSC Interrupt + DCD EXTI15_10_IRQHandler ; EXTI Lines1[15:10 ]Interrupts + DCD RTC_Alarm_IRQHandler ; RTC Alarms (A and B) Interrupt + DCD 0 ; Reserved + DCD PWR_SOTF_BLEACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR + DCD IPCC_C1_RX_IRQHandler ; IPCC CPU1 RX occupied interrupt + DCD IPCC_C1_TX_IRQHandler ; IPCC CPU1 RX free interrupt + DCD HSEM_IRQHandler ; HSEM0 Interrupt + DCD LPTIM1_IRQHandler ; LPTIM1 Interrupt + DCD LPTIM2_IRQHandler ; LPTIM2 Interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD AES2_IRQHandler ; AES2 Interrupt + DCD RNG_IRQHandler ; RNG1 Interrupt + DCD FPU_IRQHandler ; FPU Interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD DMAMUX1_OVR_IRQHandler ; DMAMUX overrun Interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_LSECSS_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT C2SEV_PWR_C2H_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT PKA_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT PWR_SOTF_BLEACT_RFPHASE_IRQHandler [WEAK] + EXPORT IPCC_C1_RX_IRQHandler [WEAK] + EXPORT IPCC_C1_TX_IRQHandler [WEAK] + EXPORT HSEM_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT AES1_IRQHandler [WEAK] + EXPORT AES2_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT DMAMUX1_OVR_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_LSECSS_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_IRQHandler +C2SEV_PWR_C2H_IRQHandler +COMP_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +PKA_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +SPI1_IRQHandler +USART1_IRQHandler +LPUART1_IRQHandler +TSC_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +PWR_SOTF_BLEACT_RFPHASE_IRQHandler +IPCC_C1_RX_IRQHandler +IPCC_C1_TX_IRQHandler +HSEM_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +AES1_IRQHandler +AES2_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +DMAMUX1_OVR_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct new file mode 100644 index 000000000..28aca4068 --- /dev/null +++ b/Projects/NUCLEO-WB15CC/Applications/BLE_LLD/BLE_LLD_Lowpower/MDK-ARM/stm32wb15xx_flash_cm4.sct @@ -0,0 +1,21 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x0001B800 { ; load region size_region + ER_IROM1 0x08000000 0x0001B800 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000008 0x2FF8 { ; RW data + .ANY (+RW +ZI) + } + RW_RAM_SHARED 0x20030000 0x2800 { ; RW data + *(MAPPING_TABLE) + *(MB_MEM1) + *(MB_MEM2) + } + } + + |