diff options
Diffstat (limited to 'Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_DataThroughput/Core/Src/main.c')
| -rw-r--r-- | Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_DataThroughput/Core/Src/main.c | 209 |
1 files changed, 120 insertions, 89 deletions
diff --git a/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_DataThroughput/Core/Src/main.c b/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_DataThroughput/Core/Src/main.c index c827209a3..ef47960e4 100644 --- a/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_DataThroughput/Core/Src/main.c +++ b/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_DataThroughput/Core/Src/main.c @@ -1,3 +1,4 @@ +/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file main.c @@ -22,28 +23,25 @@ detailed procedure to change the Wireless Coprocessor binary. @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.</center></h2> - * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 - * - ****************************************************************************** + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2021 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** */ /* USER CODE END Header */ - /* Includes ------------------------------------------------------------------*/ #include "main.h" -#include "app_entry.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ -#include "app_common.h" #include "stm32_lpm.h" #include "stm32_seq.h" #include "dbg_trace.h" @@ -67,6 +65,8 @@ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ +IPCC_HandleTypeDef hipcc; + UART_HandleTypeDef hlpuart1; UART_HandleTypeDef huart1; DMA_HandleTypeDef hdma_lpuart1_tx; @@ -80,12 +80,7 @@ RTC_HandleTypeDef hrtc; /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); -static void MX_GPIO_Init(void); -static void MX_DMA_Init(void); -void MX_LPUART1_UART_Init(void); -void MX_USART1_UART_Init(void); -static void MX_RF_Init(void); -static void MX_RTC_Init(void); + /* USER CODE BEGIN PFP */ void PeriphClock_Config(void); static void Reset_Device( void ); @@ -129,6 +124,9 @@ int main(void) /* Configure the system clock */ SystemClock_Config(); + /* IPCC initialisation */ + MX_IPCC_Init(); + /* USER CODE BEGIN SysInit */ PeriphClock_Config(); Init_Exti(); /**< Configure the system Power Mode */ @@ -142,13 +140,14 @@ int main(void) /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ - APPE_Init(); + /* Init code for STM32_WPAN */ + APPE_Init(); /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while(1) - { - UTIL_SEQ_Run( UTIL_SEQ_DEFAULT ); + while (1) + { + UTIL_SEQ_Run( UTIL_SEQ_DEFAULT ); /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ @@ -166,13 +165,15 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Configure LSE Drive Capability + /** Configure LSE Drive Capability */ + HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -185,7 +186,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers + /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2 |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK @@ -201,19 +202,17 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the peripherals clocks + /** Initializes the peripherals clocks */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP |RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1 |RCC_PERIPHCLK_LPUART1; PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; - //PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_HSE_DIV32; PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE; PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE; PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); @@ -237,6 +236,32 @@ void SystemClock_Config(void) } /** + * @brief IPCC Initialization Function + * @param None + * @retval None + */ +void MX_IPCC_Init(void) +{ + + /* USER CODE BEGIN IPCC_Init 0 */ + + /* USER CODE END IPCC_Init 0 */ + + /* USER CODE BEGIN IPCC_Init 1 */ + + /* USER CODE END IPCC_Init 1 */ + hipcc.Instance = IPCC; + if (HAL_IPCC_Init(&hipcc) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN IPCC_Init 2 */ + + /* USER CODE END IPCC_Init 2 */ + +} + +/** * @brief LPUART1 Initialization Function * @param None * @retval None @@ -337,7 +362,7 @@ void MX_USART1_UART_Init(void) * @param None * @retval None */ -static void MX_RF_Init(void) +void MX_RF_Init(void) { /* USER CODE BEGIN RF_Init 0 */ @@ -358,7 +383,7 @@ static void MX_RF_Init(void) * @param None * @retval None */ -static void MX_RTC_Init(void) +void MX_RTC_Init(void) { /* USER CODE BEGIN RTC_Init 0 */ @@ -368,7 +393,7 @@ static void MX_RTC_Init(void) /* USER CODE BEGIN RTC_Init 1 */ /* USER CODE END RTC_Init 1 */ - /** Initialize RTC Only + /** Initialize RTC Only */ hrtc.Instance = RTC; hrtc.Init.HourFormat = RTC_HOURFORMAT_24; @@ -377,6 +402,7 @@ static void MX_RTC_Init(void) hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; + hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; if (HAL_RTC_Init(&hrtc) != HAL_OK) { Error_Handler(); @@ -393,15 +419,16 @@ static void MX_RTC_Init(void) } -/** +/** * Enable DMA controller clock */ -static void MX_DMA_Init(void) +void MX_DMA_Init(void) { + /* DMA controller clock enable */ __HAL_RCC_DMAMUX1_CLK_ENABLE(); - __HAL_RCC_DMA1_CLK_ENABLE(); __HAL_RCC_DMA2_CLK_ENABLE(); + __HAL_RCC_DMA1_CLK_ENABLE(); /* DMA interrupt init */ /* DMA1_Channel4_IRQn interrupt configuration */ @@ -418,10 +445,11 @@ static void MX_DMA_Init(void) * @param None * @retval None */ -static void MX_GPIO_Init(void) +void MX_GPIO_Init(void) { /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -502,68 +530,68 @@ static void Config_HSE(void) static void Reset_Device( void ) { #if ( CFG_HW_RESET_BY_FW == 1 ) - Reset_BackupDomain(); + Reset_BackupDomain(); - Reset_IPCC(); + Reset_IPCC(); #endif - return; + return; } static void Reset_IPCC( void ) { - LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC); - - LL_C1_IPCC_ClearFlag_CHx( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C2_IPCC_ClearFlag_CHx( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C1_IPCC_DisableTransmitChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C2_IPCC_DisableTransmitChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C1_IPCC_DisableReceiveChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C2_IPCC_DisableReceiveChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC); + + LL_C1_IPCC_ClearFlag_CHx( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C2_IPCC_ClearFlag_CHx( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C1_IPCC_DisableTransmitChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C2_IPCC_DisableTransmitChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C1_IPCC_DisableReceiveChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C2_IPCC_DisableReceiveChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - return; + return; } static void Reset_BackupDomain( void ) { - if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE)) - { - HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */ + if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE)) + { + HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */ - /** - * Write twice the value to flush the APB-AHB bridge - * This bit shall be written in the register before writing the next one - */ - HAL_PWR_EnableBkUpAccess(); + /** + * Write twice the value to flush the APB-AHB bridge + * This bit shall be written in the register before writing the next one + */ + HAL_PWR_EnableBkUpAccess(); - __HAL_RCC_BACKUPRESET_FORCE(); - __HAL_RCC_BACKUPRESET_RELEASE(); - } + __HAL_RCC_BACKUPRESET_FORCE(); + __HAL_RCC_BACKUPRESET_RELEASE(); + } - return; + return; } static void Init_Exti( void ) @@ -618,7 +646,10 @@ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ - + __disable_irq(); + while (1) + { + } /* USER CODE END Error_Handler_Debug */ } @@ -631,10 +662,10 @@ void Error_Handler(void) * @retval None */ void assert_failed(uint8_t *file, uint32_t line) -{ +{ /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, - tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ /* USER CODE END 6 */ } #endif /* USE_FULL_ASSERT */ |