diff options
Diffstat (limited to 'Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_HeartRate_ota/Core/Src/main.c')
-rw-r--r-- | Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_HeartRate_ota/Core/Src/main.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_HeartRate_ota/Core/Src/main.c b/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_HeartRate_ota/Core/Src/main.c index eaf5c9992..143bc0312 100644 --- a/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_HeartRate_ota/Core/Src/main.c +++ b/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_HeartRate_ota/Core/Src/main.c @@ -110,7 +110,6 @@ int main(void) /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ - /* MCU Configuration--------------------------------------------------------*/ @@ -139,9 +138,8 @@ int main(void) /* USER CODE END 2 */ - /* Init code for STM32_WPAN */ + /* Init code for STM32_WPAN */ APPE_Init(); - /* Infinite loop */ /* USER CODE BEGIN WHILE */ while(1) @@ -166,6 +164,7 @@ void SystemClock_Config(void) /** Configure LSE Drive Capability */ + HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); /** Configure the main internal regulator output voltage */ @@ -210,12 +209,10 @@ void SystemClock_Config(void) PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE; PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE; PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } - /* USER CODE BEGIN Smps */ #if (CFG_USE_SMPS != 0) @@ -230,8 +227,6 @@ void SystemClock_Config(void) #endif /* USER CODE END Smps */ - - } /** @@ -375,6 +370,7 @@ static void MX_RTC_Init(void) hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; + hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; if (HAL_RTC_Init(&hrtc) != HAL_OK) { Error_Handler(); @@ -421,6 +417,7 @@ static void MX_GPIO_Init(void) { /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); |