diff options
Diffstat (limited to 'Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_p2pServer_ota/Core/Inc/app_conf.h')
| -rw-r--r-- | Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_p2pServer_ota/Core/Inc/app_conf.h | 74 |
1 files changed, 50 insertions, 24 deletions
diff --git a/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_p2pServer_ota/Core/Inc/app_conf.h b/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_p2pServer_ota/Core/Inc/app_conf.h index c63d37d99..336526486 100644 --- a/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_p2pServer_ota/Core/Inc/app_conf.h +++ b/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_p2pServer_ota/Core/Inc/app_conf.h @@ -35,8 +35,8 @@ /** * Define Tx Power - */ -#define CFG_TX_POWER (0x18) /**< 0dbm */ + */ +#define CFG_TX_POWER (0x18) /* -0.15dBm */ /** * Define Advertising parameters @@ -118,20 +118,21 @@ /** * Identity root key used to derive LTK and CSRK */ -#define CFG_BLE_IRK {0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0} +#define CFG_BLE_IRK {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0} /** * Encryption root key used to derive LTK and CSRK */ -#define CFG_BLE_ERK {0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21,0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21} +#define CFG_BLE_ERK {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21} -/* USER CODE BEGIN Generic_Parameters */ /** * SMPS supply * SMPS not used when Set to 0 * SMPS used when Set to 1 */ #define CFG_USE_SMPS 0 + +/* USER CODE BEGIN Generic_Parameters */ /* USER CODE END Generic_Parameters */ /**< specific parameters */ @@ -225,7 +226,8 @@ #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) /** - * Prepare Write List size in terms of number of packet with ATT_MTU=23 bytes + * Prepare Write List size in terms of number of packet + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" */ #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) @@ -260,9 +262,9 @@ /** * Source for the low speed clock for RF wake-up - * 1 : external high speed crystal HSE/32/32 + * 1 : external high speed crystal HSE/32/32 * 0 : external low speed crystal ( no calibration ) - */ + */ #define CFG_BLE_LSE_SOURCE 0 /** @@ -284,32 +286,33 @@ /** * BLE stack Options flags to be configured with: - * - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY - * - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST - * - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC - * - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC - * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO - * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW - * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 - * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 - * which are used to set following configuration bits: - * (bit 0): 1: LL only + * - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY + * - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST + * - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC + * - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC + * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO + * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW + * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 + * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 + * which are used to set following configuration bits: + * (bit 0): 1: LL only * 0: LL + host - * (bit 1): 1: no service change desc. + * (bit 1): 1: no service change desc. * 0: with service change desc. - * (bit 2): 1: device name Read-Only + * (bit 2): 1: device name Read-Only * 0: device name R/W - * (bit 7): 1: LE Power Class 1 - * 0: LE Power Classe 2-3 + * (bit 7): 1: LE Power Class 1 + * 0: LE Power Class 2-3 * other bits: reserved (shall be set to 0) */ -#define CFG_BLE_OPTIONS SHCI_C2_BLE_INIT_OPTIONS_LL_HOST +#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) #define CFG_BLE_MAX_COC_INITIATOR_NBR (32) #define CFG_BLE_MIN_TX_POWER (0) #define CFG_BLE_MAX_TX_POWER (0) + /****************************************************************************** * Transport Layer ******************************************************************************/ @@ -359,6 +362,18 @@ #define CFG_USB_INTERFACE_ENABLE 0 /****************************************************************************** + * IPCC interface + ******************************************************************************/ + +/** + * The IPCC is dedicated to the communication between the CPU2 and the CPU1 + * and shall not be modified by the application + * The two following definitions shall not be modified + */ +#define HAL_IPCC_TX_IRQHandler(...) HW_IPCC_Tx_Handler( ) +#define HAL_IPCC_RX_IRQHandler(...) HW_IPCC_Rx_Handler( ) + +/****************************************************************************** * Low Power ******************************************************************************/ /** @@ -390,6 +405,7 @@ * * The following settings are computed with LSI as input to the RTC */ + #define CFG_RTCCLK_DIVIDER_CONF 0 #if (CFG_RTCCLK_DIVIDER_CONF == 0) @@ -398,9 +414,10 @@ * It does not support 1Hz calendar * It divides the RTC CLK by 16 */ + #define CFG_RTCCLK_DIV (16) #define CFG_RTC_WUCKSEL_DIVIDER (0) -#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1) +#define CFG_RTC_ASYNCH_PRESCALER (0x0F) #define CFG_RTC_SYNCH_PRESCALER (0x7FFF) #else @@ -445,6 +462,9 @@ typedef enum { CFG_TIM_PROC_ID_ISR, + /* USER CODE BEGIN CFG_TimProcID_t */ + + /* USER CODE END CFG_TimProcID_t */ } CFG_TimProcID_t; /****************************************************************************** @@ -531,6 +551,10 @@ typedef enum /* USER CODE BEGIN Defines */ #define CFG_LED_SUPPORTED 1 #define CFG_BUTTON_SUPPORTED 1 + +#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler +#define PUSH_BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler +#define PUSH_BUTTON_SW3_EXTI_IRQHandler EXTI1_IRQHandler /* USER CODE END Defines */ /****************************************************************************** @@ -549,6 +573,8 @@ typedef enum { CFG_TASK_ADV_CANCEL_ID, CFG_TASK_SW1_BUTTON_PUSHED_ID, + CFG_TASK_SW2_BUTTON_PUSHED_ID, + CFG_TASK_SW3_BUTTON_PUSHED_ID, #if (L2CAP_REQUEST_NEW_CONN_PARAM != 0 ) CFG_TASK_CONN_UPDATE_REG_ID, #endif |