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diff --git a/Projects/P-NUCLEO-WB55.Nucleo/Applications/Zigbee/Zigbee_DoorLock_Server_Coord/Core/Src/main.c b/Projects/P-NUCLEO-WB55.Nucleo/Applications/Zigbee/Zigbee_DoorLock_Server_Coord/Core/Src/main.c
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index 000000000..80ad1ad58
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+++ b/Projects/P-NUCLEO-WB55.Nucleo/Applications/Zigbee/Zigbee_DoorLock_Server_Coord/Core/Src/main.c
@@ -0,0 +1,521 @@
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ *
+ @verbatim
+ ==============================================================================
+ ##### IMPORTANT NOTE #####
+ ==============================================================================
+
+ This application requests having the stm32wb5x_Zigbee_fw.bin binary
+ flashed on the Wireless Coprocessor.
+ If it is not the case, you need to use STM32CubeProgrammer to load the appropriate
+ binary.
+
+ All available binaries are located under following directory:
+ /Projects/STM32_Copro_Wireless_Binaries
+
+ Refer to UM2237 to learn how to use/install STM32CubeProgrammer.
+ Refer to /Projects/STM32_Copro_Wireless_Binaries/ReleaseNote.html for the
+ detailed procedure to change the Wireless Coprocessor binary.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "app_entry.h"
+
+/* Private includes ----------------------------------------------------------*/
+
+#include "dbg_trace.h"
+#include "hw_conf.h"
+#include "otp.h"
+#include "stm32_seq.h"
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef hlpuart1;
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_lpuart1_tx;
+DMA_HandleTypeDef hdma_usart1_tx;
+RTC_HandleTypeDef hrtc;
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+void MX_LPUART1_UART_Init(void);
+void MX_USART1_UART_Init(void);
+static void MX_RF_Init(void);
+static void MX_RTC_Init(void);
+
+void PeriphClock_Config(void);
+static void Reset_Device(void);
+static void Reset_IPCC(void);
+static void Reset_BackupDomain(void);
+static void Init_Exti(void);
+static void Config_HSE(void);
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ Reset_Device();
+ Config_HSE();
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ PeriphClock_Config();
+ Init_Exti(); /**< Configure the system Power Mode */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_DMA_Init();
+ MX_RF_Init();
+ MX_RTC_Init();
+
+ /* Init the full application */
+ APPE_Init();
+
+ /* Infinite loop */
+
+ while (1) {
+ UTIL_SEQ_Run( UTIL_SEQ_DEFAULT );
+
+ }
+
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+ /** Configure LSE Drive Capability
+ */
+ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ /** Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
+ |RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
+ |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Initializes the peripherals clocks
+ */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP
+ |RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
+ |RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+ PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+ PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
+ PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
+
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief LPUART1 Initialization Function
+ * @param None
+ * @retval None
+ */
+void MX_LPUART1_UART_Init(void)
+{
+
+ hlpuart1.Instance = LPUART1;
+ hlpuart1.Init.BaudRate = 115200;
+ hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
+ hlpuart1.Init.StopBits = UART_STOPBITS_1;
+ hlpuart1.Init.Parity = UART_PARITY_NONE;
+ hlpuart1.Init.Mode = UART_MODE_TX_RX;
+ hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+ hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ hlpuart1.FifoMode = UART_FIFOMODE_DISABLE;
+ if (HAL_UART_Init(&hlpuart1) != HAL_OK) {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK) {
+ Error_Handler();
+ }
+
+}
+
+/**
+ * @brief USART1 Initialization Function
+ * @param None
+ * @retval None
+ */
+void MX_USART1_UART_Init(void)
+{
+
+ huart1.Instance = USART1;
+ huart1.Init.BaudRate = 115200;
+ huart1.Init.WordLength = UART_WORDLENGTH_8B;
+ huart1.Init.StopBits = UART_STOPBITS_1;
+ huart1.Init.Parity = UART_PARITY_NONE;
+ huart1.Init.Mode = UART_MODE_TX_RX;
+ huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ huart1.Init.OverSampling = UART_OVERSAMPLING_8;
+ huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+ huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ if (HAL_UART_Init(&huart1) != HAL_OK) {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) {
+ Error_Handler();
+ }
+ if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) {
+ Error_Handler();
+ }
+
+}
+
+/**
+ * @brief RF Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_RF_Init(void)
+{
+
+}
+
+/**
+ * @brief RTC Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_RTC_Init(void)
+{
+
+
+ /** Initialize RTC Only
+ */
+ hrtc.Instance = RTC;
+ hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+ hrtc.Init.AsynchPrediv = CFG_RTC_ASYNCH_PRESCALER;
+ hrtc.Init.SynchPrediv = CFG_RTC_SYNCH_PRESCALER;
+ hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+ hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+ hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+ if (HAL_RTC_Init(&hrtc) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN RTC_Init 2 */
+
+ /* USER CODE END RTC_Init 2 */
+
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+ /* DMA1_Channel2_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+
+}
+
+/* USER CODE BEGIN 4 */
+void PeriphClock_Config(void)
+{
+ #if (CFG_USB_INTERFACE_ENABLE != 0)
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
+ RCC_CRSInitTypeDef RCC_CRSInitStruct = { 0 };
+
+ /**
+ * This prevents the CPU2 to disable the HSI48 oscillator when
+ * it does not use anymore the RNG IP
+ */
+ LL_HSEM_1StepLock( HSEM, 5 );
+
+ LL_RCC_HSI48_Enable();
+
+ while(!LL_RCC_HSI48_IsReady());
+
+ /* Select HSI48 as USB clock source */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+ /*Configure the clock recovery system (CRS)**********************************/
+
+ /* Enable CRS Clock */
+ __HAL_RCC_CRS_CLK_ENABLE();
+
+ /* Default Synchro Signal division factor (not divided) */
+ RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+ /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+ RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+ /* HSI48 is synchronized with USB SOF at 1KHz rate */
+ RCC_CRSInitStruct.ReloadValue = RCC_CRS_RELOADVALUE_DEFAULT;
+ RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+ RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+
+ /* Set the TRIM[5:0] to the default value*/
+ RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+ /* Start automatic synchronization */
+ HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+#endif
+
+ return;
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+
+static void Config_HSE(void)
+{
+ OTP_ID0_t * p_otp;
+
+ /**
+ * Read HSE_Tuning from OTP
+ */
+ p_otp = (OTP_ID0_t *) OTP_Read(0);
+ if (p_otp)
+ {
+ LL_RCC_HSE_SetCapacitorTuning(p_otp->hse_tuning);
+ }
+
+ return;
+}
+
+
+static void Reset_Device( void )
+{
+#if ( CFG_HW_RESET_BY_FW == 1 )
+ Reset_BackupDomain();
+
+ Reset_IPCC();
+#endif
+
+ return;
+}
+
+static void Reset_IPCC( void )
+{
+ LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC);
+
+ LL_C1_IPCC_ClearFlag_CHx(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_ClearFlag_CHx(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C1_IPCC_DisableTransmitChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_DisableTransmitChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C1_IPCC_DisableReceiveChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ LL_C2_IPCC_DisableReceiveChannel(
+ IPCC,
+ LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+ | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+ return;
+}
+
+static void Reset_BackupDomain( void )
+{
+ if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE))
+ {
+ HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
+
+ /**
+ * Write twice the value to flush the APB-AHB bridge
+ * This bit shall be written in the register before writing the next one
+ */
+ HAL_PWR_EnableBkUpAccess();
+
+ __HAL_RCC_BACKUPRESET_FORCE();
+ __HAL_RCC_BACKUPRESET_RELEASE();
+ }
+
+ return;
+}
+
+static void Init_Exti( void )
+{
+ /**< Disable all wakeup interrupt on CPU1 except IPCC(36), HSEM(38) */
+ LL_EXTI_DisableIT_0_31(~0);
+ LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) );
+
+ return;
+}
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+void HAL_Delay(uint32_t Delay)
+{
+ uint32_t tickstart = HAL_GetTick();
+ uint32_t wait = Delay;
+
+ /* Add a freq to guarantee minimum wait */
+ if (wait < HAL_MAX_DELAY)
+ {
+ wait += HAL_GetTickFreq();
+ }
+
+ while ((HAL_GetTick() - tickstart) < wait)
+ {
+ /************************************************************************************
+ * ENTER SLEEP MODE
+ ***********************************************************************************/
+ LL_LPM_EnableSleep( ); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+ /**
+ * This option is used to ensure that store operations are completed
+ */
+ #if defined ( __CC_ARM)
+ __force_stores();
+ #endif
+
+ __WFI( );
+ }
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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