1 files changed, 16 insertions, 18 deletions
diff --git a/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_LowPower_Init/Src/main.c b/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_LowPower_Init/Src/main.c
index 51e6e1fde..5c36752b9 100644
--- a/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_LowPower_Init/Src/main.c
+++ b/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_LowPower_Init/Src/main.c
@@ -389,24 +389,22 @@ static void MX_ADC1_Init(void)
   LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct);
   LL_ADC_SetOverSamplingScope(ADC1, LL_ADC_OVS_DISABLE);
 
-   /* Disable ADC deep power down (enabled by default after reset state) */
-   LL_ADC_DisableDeepPowerDown(ADC1);
-   /* Enable ADC internal voltage regulator */
-   LL_ADC_EnableInternalRegulator(ADC1);
-   /* Delay for ADC internal voltage regulator stabilization. */
-   /* Compute number of CPU cycles to wait for, from delay in us. */
-   /* Note: Variable divided by 2 to compensate partially */
-   /* CPU processing cycles (depends on compilation optimization). */
-   /* Note: If system core clock frequency is below 200kHz, wait time */
-   /* is only a few CPU processing cycles. */
-   uint32_t wait_loop_index;
-   wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
-   while(wait_loop_index != 0)
-     {
-   wait_loop_index--;
-     }
-  LL_ADC_DisableIT_EOC(ADC1);
-  LL_ADC_DisableIT_EOS(ADC1);
+  /* Disable ADC deep power down (enabled by default after reset state) */
+  LL_ADC_DisableDeepPowerDown(ADC1);
+  /* Enable ADC internal voltage regulator */
+  LL_ADC_EnableInternalRegulator(ADC1);
+  /* Delay for ADC internal voltage regulator stabilization. */
+  /* Compute number of CPU cycles to wait for, from delay in us. */
+  /* Note: Variable divided by 2 to compensate partially */
+  /* CPU processing cycles (depends on compilation optimization). */
+  /* Note: If system core clock frequency is below 200kHz, wait time */
+  /* is only a few CPU processing cycles. */
+  uint32_t wait_loop_index;
+  wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
+  while(wait_loop_index != 0)
+  {
+    wait_loop_index--;
+  }
   /** Configure Regular Channel
   */
   LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_6);