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Diffstat (limited to 'Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/Src/stm32wbxx_it.c')
| -rw-r--r-- | Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/Src/stm32wbxx_it.c | 380 |
1 files changed, 380 insertions, 0 deletions
diff --git a/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/Src/stm32wbxx_it.c b/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/Src/stm32wbxx_it.c new file mode 100644 index 000000000..09a6fdfc8 --- /dev/null +++ b/Projects/P-NUCLEO-WB55.Nucleo/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/Src/stm32wbxx_it.c @@ -0,0 +1,380 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/Src/stm32wbxx_it.c + * @author MCD Application Team + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and + * peripherals interrupt service routine. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32wbxx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32WBxx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32wbxx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles EXTI line4 interrupt. + */ +void EXTI4_IRQHandler(void) +{ + /* USER CODE BEGIN EXTI4_IRQn 0 */ + + /* USER CODE END EXTI4_IRQn 0 */ + if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET) + { + LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4); + /* USER CODE BEGIN LL_EXTI_LINE_4 */ + + /* Manage code in main.c.*/ + UserButton_Callback(); + /* USER CODE END LL_EXTI_LINE_4 */ + } + /* USER CODE BEGIN EXTI4_IRQn 1 */ + + /* USER CODE END EXTI4_IRQn 1 */ +} + +/** + * @brief This function handles DMA1 channel2 global interrupt. + */ +void DMA1_Channel2_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */ +if(LL_DMA_IsActiveFlag_TC2(DMA1)) + { + LL_DMA_ClearFlag_GI2(DMA1); + Transfer_Complete_Callback(); + } + else if(LL_DMA_IsActiveFlag_TE2(DMA1)) + { + Transfer_Error_Callback(); + } + /* USER CODE END DMA1_Channel2_IRQn 0 */ + + /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */ + + /* USER CODE END DMA1_Channel2_IRQn 1 */ +} + +/** + * @brief This function handles DMA1 channel3 global interrupt. + */ +void DMA1_Channel3_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */ +if(LL_DMA_IsActiveFlag_TC3(DMA1)) + { + LL_DMA_ClearFlag_GI3(DMA1); + Transfer_Complete_Callback(); + } + else if(LL_DMA_IsActiveFlag_TE3(DMA1)) + { + Transfer_Error_Callback(); + } + /* USER CODE END DMA1_Channel3_IRQn 0 */ + + /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */ + + /* USER CODE END DMA1_Channel3_IRQn 1 */ +} + +/* USER CODE BEGIN 1 */ + +/******************************************************************************/ +/* STM32WBxx Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32wbxx.s). */ +/******************************************************************************/ + + +/** + * Brief This function handles I2C1 (Slave) event interrupt request. + * Param None + * Retval None + */ +void I2C1_EV_IRQHandler(void) +{ + /* Check ADDR flag value in ISR register */ + if(LL_I2C_IsActiveFlag_ADDR(I2C1)) + { + /* Verify the Address Match with the OWN Slave address */ + if(LL_I2C_GetAddressMatchCode(I2C1) == SLAVE_OWN_ADDRESS) + { + /* Verify the transfer direction, a write direction, Slave enters receiver mode */ + if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_WRITE) + { + /* Clear ADDR flag value in ISR register */ + LL_I2C_ClearFlag_ADDR(I2C1); + + /* Enable Receive Interrupt */ + LL_I2C_EnableIT_RX(I2C1); + } + else if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_READ) + { + /* Clear ADDR flag value in ISR register */ + LL_I2C_ClearFlag_ADDR(I2C1); + + /* Enable Transmit Interrupt */ + LL_I2C_EnableIT_TX(I2C1); + } + } + else + { + /* Clear ADDR flag value in ISR register */ + LL_I2C_ClearFlag_ADDR(I2C1); + + /* Call Error function */ + Error_Callback(); + } + } + /* Check NACK flag value in ISR register */ + else if(LL_I2C_IsActiveFlag_NACK(I2C1)) + { + /* End of Transfer */ + LL_I2C_ClearFlag_NACK(I2C1); + } + /* Check RXNE flag value in ISR register */ + else if(LL_I2C_IsActiveFlag_RXNE(I2C1)) + { + /* Call function Slave Reception Callback */ + Slave_Reception_Callback(); + } + /* Check TXIS flag value in ISR register */ + else if(LL_I2C_IsActiveFlag_TXIS(I2C1)) + { + /* Call function Slave Ready to Transmit Callback */ + Slave_Ready_To_Transmit_Callback(); + } + /* Check STOP flag value in ISR register */ + else if(LL_I2C_IsActiveFlag_STOP(I2C1)) + { + /* End of Transfer */ + LL_I2C_ClearFlag_STOP(I2C1); + + /* Check TXE flag value in ISR register */ + if(!LL_I2C_IsActiveFlag_TXE(I2C1)) + { + /* Flush TX buffer */ + LL_I2C_ClearFlag_TXE(I2C1); + } + + /* Call function Slave Complete Callback */ + Slave_Complete_Callback(); + } + /* Check TXE flag value in ISR register */ + else if(!LL_I2C_IsActiveFlag_TXE(I2C1)) + { + /* Do nothing */ + /* This Flag will be set by hardware when the TXDR register is empty */ + /* If needed, use LL_I2C_ClearFlag_TXE() interface to flush the TXDR register */ + } + else + { + /* Call Error function */ + Error_Callback(); + } +} + +/** + * Brief This function handles I2C1 (Slave) error interrupt request. + * Param None + * Retval None + */ +void I2C1_ER_IRQHandler(void) +{ + /* Call Error function */ + Error_Callback(); +} + + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |