diff options
Diffstat (limited to 'Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Inc/hw_conf.h')
| -rw-r--r-- | Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Inc/hw_conf.h | 84 |
1 files changed, 43 insertions, 41 deletions
diff --git a/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Inc/hw_conf.h b/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Inc/hw_conf.h index 45a76a173..1cac11889 100644 --- a/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Inc/hw_conf.h +++ b/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Inc/hw_conf.h @@ -1,36 +1,39 @@ +/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file hw_conf.h * @author MCD Application Team * @brief Configuration of hardware interface - ****************************************************************************** - * @attention - * + ****************************************************************************** + * @attention + * * <h2><center>© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.</center></h2> - * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 - * - ****************************************************************************** - */ - + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** + */ +/* USER CODE END Header */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __HW_CONF_H -#define __HW_CONF_H +#ifndef HW_CONF_H +#define HW_CONF_H /****************************************************************************** -* Semaphores -* THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+ -*****************************************************************************/ + * Semaphores + * THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+ + *****************************************************************************/ /** * Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash * The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2 * When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just * after writing a raw (64bits data) or erasing one sector. +* Once the Semaphore has been released, there shall be at least 1us before it can be taken again. This is required +* to give the opportunity to CPU2 to take it. * On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit. * By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore * instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl() @@ -69,7 +72,6 @@ /* Index of the semaphore used to access the RNG */ #define CFG_HW_RNG_SEMID 0 - /****************************************************************************** * HW TIMER SERVER *****************************************************************************/ @@ -84,7 +86,7 @@ * wakeup timer. * This setting is the preemptpriority part of the NVIC. */ -#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO 3 +#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO 3 /** * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the @@ -92,7 +94,7 @@ * This setting is the subpriority part of the NVIC. It does not exist on all processors. When it is not supported * on the CPU, the setting is ignored */ -#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO 0 +#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO 0 /** * Define a critical section in the Timer server @@ -108,32 +110,32 @@ * re-implement TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION and shall make sure that no TimerServer * API are called when the TIMER critical section is entered */ -#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION 1 +#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION 1 /** - * This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt - * is generated by the Hardware and the time when the RTC interrupt handler is called. This time is measured in - * number of RTCCLK ticks. - * A relaxed timing would be 10ms - * When the value is too short, the timerserver will not be able to count properly and all timeout may be random. - * When the value is too long, the device may wake up more often than the most optimal configuration. However, the - * impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly - * recommended to select a value large enough to make sure it is not too short to ensure reliability of the system - * as this will have marginal impact on low power mode - */ -#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY ( 10 * (LSI_VALUE/1000) ) - -/** - * Interrupt ID in the NVIC of the RTC Wakeup interrupt handler - * It shall be type of IRQn_Type - */ + * This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt + * is generated by the Hardware and the time when the RTC interrupt handler is called. This time is measured in + * number of RTCCLK ticks. + * A relaxed timing would be 10ms + * When the value is too short, the timerserver will not be able to count properly and all timeout may be random. + * When the value is too long, the device may wake up more often than the most optimal configuration. However, the + * impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly + * recommended to select a value large enough to make sure it is not too short to ensure reliability of the system + * as this will have marginal impact on low power mode + */ +#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY ( 10 * (LSI_VALUE/1000) ) + + /** + * Interrupt ID in the NVIC of the RTC Wakeup interrupt handler + * It shall be type of IRQn_Type + */ #define CFG_HW_TS_RTC_WAKEUP_HANDLER_ID RTC_WKUP_IRQn /****************************************************************************** * HW UART *****************************************************************************/ -#define CFG_HW_LPUART1_ENABLED 0 -#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 0 +#define CFG_HW_LPUART1_ENABLED 0 +#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 0 #define CFG_HW_USART1_ENABLED 0 #define CFG_HW_USART1_DMA_TX_SUPPORTED 0 @@ -242,6 +244,6 @@ #define CFG_HW_USART1_TX_DMA_IRQn DMA2_Channel4_IRQn #define CFG_HW_USART1_DMA_TX_IRQHandler DMA2_Channel4_IRQHandler -#endif /*__HW_CONF_H */ +#endif /*HW_CONF_H */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |