diff options
Diffstat (limited to 'Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Src/main.c')
| -rw-r--r-- | Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Src/main.c | 671 |
1 files changed, 505 insertions, 166 deletions
diff --git a/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Src/main.c b/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Src/main.c index 63833e495..15e13bd46 100644 --- a/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Src/main.c +++ b/Projects/P-NUCLEO-WB55.USBDongle/Applications/BLE/BLE_p2pRouteur/Core/Src/main.c @@ -1,3 +1,4 @@ +/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file main.c @@ -24,184 +25,393 @@ @endverbatim ****************************************************************************** * @attention - * - * <h2><center>© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.</center></h2> - * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 - * - ****************************************************************************** + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** */ - - +/* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ -#include "main.h" -#include "app_common.h" +#include "main.h" -#include "app_entry.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ #include "stm32_lpm.h" #include "stm32_seq.h" #include "dbg_trace.h" +#include "hw_conf.h" +#include "otp.h" +/* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Global variables ---------------------------------------------------------*/ -RTC_HandleTypeDef hrtc = { 0 }; /**< RTC handler declaration */ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ +IPCC_HandleTypeDef hipcc; + +UART_HandleTypeDef hlpuart1; +UART_HandleTypeDef huart1; +DMA_HandleTypeDef hdma_lpuart1_tx; +DMA_HandleTypeDef hdma_usart1_tx; + +RTC_HandleTypeDef hrtc; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + /* Private function prototypes -----------------------------------------------*/ -static void Reset_BackupDomain( void ); -static void Init_RTC( void ); -static void SystemClock_Config( void ); +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_DMA_Init(void); +static void MX_RF_Init(void); +static void MX_RTC_Init(void); +static void MX_IPCC_Init(void); +/* USER CODE BEGIN PFP */ +void PeriphClock_Config(void); static void Reset_Device( void ); static void Reset_IPCC( void ); +static void Reset_BackupDomain( void ); static void Init_Exti( void ); +static void Config_HSE(void); +/* USER CODE END PFP */ -/* Functions Definition ------------------------------------------------------*/ +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ /** - * @brief Main program - * @param None - * @retval None - */ -int main( void ) + * @brief The application entry point. + * @retval int + */ +int main(void) { + /* USER CODE BEGIN 1 */ + /** * The OPTVERR flag is wrongly set at power on * It shall be cleared before using any HAL_FLASH_xxx() api */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); + /* USER CODE BEGIN Init */ Reset_Device(); + Config_HSE(); + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* IPCC initialisation */ + MX_IPCC_Init(); + + /* USER CODE BEGIN SysInit */ + PeriphClock_Config(); + Init_Exti(); /**< Configure the system Power Mode */ + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_DMA_Init(); + MX_RF_Init(); + MX_RTC_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Init code for STM32_WPAN */ + APPE_Init(); + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while(1) + { + UTIL_SEQ_Run( UTIL_SEQ_DEFAULT ); + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + + /** Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE + |RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2 + |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the peripherals clocks + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP + |RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1 + |RCC_PERIPHCLK_LPUART1; + PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; + PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE; + PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE; + PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN Smps */ +#if (CFG_USE_SMPS != 0) /** - * When the application is expected to run at higher speed, it should be better to set the correct system clock - * in system_stm32yyxx.c so that the initialization phase is running at max speed. + * Configure and enable SMPS + * + * The SMPS configuration is not yet supported by CubeMx + * when SMPS output voltage is set to 1.4V, the RF output power is limited to 3.7dBm + * the SMPS output voltage shall be increased for higher RF output power */ - SystemClock_Config(); /**< Configure the system clock */ + LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA); + LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40); + LL_PWR_SMPS_Enable(); +#endif + + /* USER CODE END Smps */ +} + +/** + * @brief IPCC Initialization Function + * @param None + * @retval None + */ +static void MX_IPCC_Init(void) +{ - Init_Exti( ); + /* USER CODE BEGIN IPCC_Init 0 */ - Init_RTC(); + /* USER CODE END IPCC_Init 0 */ - APPE_Init( ); + /* USER CODE BEGIN IPCC_Init 1 */ - while(1) + /* USER CODE END IPCC_Init 1 */ + hipcc.Instance = IPCC; + if (HAL_IPCC_Init(&hipcc) != HAL_OK) { - UTIL_SEQ_Run( UTIL_SEQ_DEFAULT ); + Error_Handler(); } -} + /* USER CODE BEGIN IPCC_Init 2 */ -/************************************************************* - * - * LOCAL FUNCTIONS - * - *************************************************************/ -static void Init_Exti( void ) -{ - /**< Disable all wakeup interrupt on CPU1 except IPCC(36), HSEM(38) */ - LL_EXTI_DisableIT_0_31(~0); - LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) ); + /* USER CODE END IPCC_Init 2 */ - return; } -static void Reset_Device( void ) +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ +void MX_LPUART1_UART_Init(void) { -#if ( CFG_HW_RESET_BY_FW == 1 ) - Reset_BackupDomain(); - Reset_IPCC(); -#endif + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 115200; + hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + hlpuart1.FifoMode = UART_FIFOMODE_DISABLE; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ - return; } -static void Reset_IPCC( void ) +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +void MX_USART1_UART_Init(void) { - LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC); - - LL_C1_IPCC_ClearFlag_CHx( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C2_IPCC_ClearFlag_CHx( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C1_IPCC_DisableTransmitChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C2_IPCC_DisableTransmitChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C1_IPCC_DisableReceiveChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - - LL_C2_IPCC_DisableReceiveChannel( - IPCC, - LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 - | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); - return; + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_8; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + } -static void Reset_BackupDomain( void ) +/** + * @brief RF Initialization Function + * @param None + * @retval None + */ +static void MX_RF_Init(void) { - if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE)) - { - HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */ - /** - * Write twice the value to flush the APB-AHB bridge - * This bit shall be written in the register before writing the next one - */ - HAL_PWR_EnableBkUpAccess(); + /* USER CODE BEGIN RF_Init 0 */ - __HAL_RCC_BACKUPRESET_FORCE(); - __HAL_RCC_BACKUPRESET_RELEASE(); - } + /* USER CODE END RF_Init 0 */ + + /* USER CODE BEGIN RF_Init 1 */ + + /* USER CODE END RF_Init 1 */ + /* USER CODE BEGIN RF_Init 2 */ + + /* USER CODE END RF_Init 2 */ - return; } -static void Init_RTC( void ) +/** + * @brief RTC Initialization Function + * @param None + * @retval None + */ +static void MX_RTC_Init(void) { - HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */ - /** - * Write twice the value to flush the APB-AHB bridge - * This bit shall be written in the register before writing the next one - */ - HAL_PWR_EnableBkUpAccess(); + /* USER CODE BEGIN RTC_Init 0 */ - __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE); /**< Select LSI as RTC Input */ + /* USER CODE END RTC_Init 0 */ - __HAL_RCC_RTC_ENABLE(); /**< Enable RTC */ + /* USER CODE BEGIN RTC_Init 1 */ - hrtc.Instance = RTC; /**< Define instance */ - - /** - * Set the Asynchronous prescaler - */ + /* USER CODE END RTC_Init 1 */ + /** Initialize RTC Only + */ + hrtc.Instance = RTC; + hrtc.Init.HourFormat = RTC_HOURFORMAT_24; hrtc.Init.AsynchPrediv = CFG_RTC_ASYNCH_PRESCALER; hrtc.Init.SynchPrediv = CFG_RTC_SYNCH_PRESCALER; - HAL_RTC_Init(&hrtc); - + hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; + hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; + hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; + hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; + if (HAL_RTC_Init(&hrtc) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN RTC_Init 2 */ /* Disable RTC registers write protection */ LL_RTC_DisableWriteProtection(RTC); @@ -209,29 +419,55 @@ static void Init_RTC( void ) /* Enable RTC registers write protection */ LL_RTC_EnableWriteProtection(RTC); + /* USER CODE END RTC_Init 2 */ - return; } /** - * @brief Configure the system clock - * - * @note This API configures - * - The system clock source - * - The AHBCLK, APBCLK dividers - * - The flash latency - * - The PLL settings (when required) - * - * @param None - * @retval None - */ -void SystemClock_Config( void ) + * Enable DMA controller clock + */ +static void MX_DMA_Init(void) { -#if (CFG_USB_INTERFACE_ENABLE != 0) - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; - RCC_CRSInitTypeDef RCC_CRSInitStruct = { 0 }; - /** + /* DMA controller clock enable */ + __HAL_RCC_DMAMUX1_CLK_ENABLE(); + __HAL_RCC_DMA2_CLK_ENABLE(); + __HAL_RCC_DMA1_CLK_ENABLE(); + + /* DMA interrupt init */ + /* DMA1_Channel4_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 15, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); + /* DMA2_Channel4_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Channel4_IRQn, 15, 0); + HAL_NVIC_EnableIRQ(DMA2_Channel4_IRQn); + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + +} + +/* USER CODE BEGIN 4 */ + +void PeriphClock_Config(void) +{ + #if (CFG_USB_INTERFACE_ENABLE != 0) + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; + RCC_CRSInitTypeDef RCC_CRSInitStruct = { 0 }; + + /** * This prevents the CPU2 to disable the HSI48 oscillator when * it does not use anymore the RNG IP */ @@ -239,53 +475,134 @@ void SystemClock_Config( void ) LL_RCC_HSI48_Enable(); - while(!LL_RCC_HSI48_IsReady()); + while(!LL_RCC_HSI48_IsReady()); - /* Select HSI48 as USB clock source */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); + /* Select HSI48 as USB clock source */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - /*Configure the clock recovery system (CRS)**********************************/ + /*Configure the clock recovery system (CRS)**********************************/ - /* Enable CRS Clock */ - __HAL_RCC_CRS_CLK_ENABLE(); + /* Enable CRS Clock */ + __HAL_RCC_CRS_CLK_ENABLE(); - /* Default Synchro Signal division factor (not divided) */ - RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + /* Default Synchro Signal division factor (not divided) */ + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; - /* Set the SYNCSRC[1:0] bits according to CRS_Source value */ - RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + /* Set the SYNCSRC[1:0] bits according to CRS_Source value */ + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; - /* HSI48 is synchronized with USB SOF at 1KHz rate */ - RCC_CRSInitStruct.ReloadValue = RCC_CRS_RELOADVALUE_DEFAULT; - RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; + /* HSI48 is synchronized with USB SOF at 1KHz rate */ + RCC_CRSInitStruct.ReloadValue = RCC_CRS_RELOADVALUE_DEFAULT; + RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; - RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; + RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; - /* Set the TRIM[5:0] to the default value*/ - RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT; + /* Set the TRIM[5:0] to the default value*/ + RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT; - /* Start automatic synchronization */ - HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); + /* Start automatic synchronization */ + HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); #endif - /** - * Write twice the value to flush the APB-AHB bridge to ensure the bit is written - */ - HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */ - HAL_PWR_EnableBkUpAccess(); + return; +} +/************************************************************* + * + * LOCAL FUNCTIONS + * + *************************************************************/ + +static void Config_HSE(void) +{ + OTP_ID0_t * p_otp; /** - * Select LSE clock + * Read HSE_Tuning from OTP */ - LL_RCC_LSE_Enable(); - while(!LL_RCC_LSE_IsReady()); + p_otp = (OTP_ID0_t *) OTP_Read(0); + if (p_otp) + { + LL_RCC_HSE_SetCapacitorTuning(p_otp->hse_tuning); + } + + return; +} - /** - * Select wakeup source of BLE RF - */ - LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE); + +static void Reset_Device( void ) +{ +#if ( CFG_HW_RESET_BY_FW == 1 ) + Reset_BackupDomain(); + + Reset_IPCC(); +#endif + + return; +} + +static void Reset_IPCC( void ) +{ + LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC); + + LL_C1_IPCC_ClearFlag_CHx( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C2_IPCC_ClearFlag_CHx( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C1_IPCC_DisableTransmitChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C2_IPCC_DisableTransmitChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C1_IPCC_DisableReceiveChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + LL_C2_IPCC_DisableReceiveChannel( + IPCC, + LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4 + | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6); + + return; +} + +static void Reset_BackupDomain( void ) +{ + if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE)) + { + HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */ + + /** + * Write twice the value to flush the APB-AHB bridge + * This bit shall be written in the register before writing the next one + */ + HAL_PWR_EnableBkUpAccess(); + + __HAL_RCC_BACKUPRESET_FORCE(); + __HAL_RCC_BACKUPRESET_RELEASE(); + } + + return; +} + +static void Init_Exti( void ) +{ + /**< Disable all wakeup interrupt on CPU1 except IPCC(36), HSEM(38) */ + LL_EXTI_DisableIT_0_31(~0); + LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) ); return; } @@ -323,7 +640,12 @@ void HAL_Delay(uint32_t Delay) __WFI( ); } } +/* USER CODE END 4 */ +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ @@ -332,4 +654,21 @@ void Error_Handler(void) /* USER CODE END Error_Handler_Debug */ } -/******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE****/ +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |