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<title>CMSIS-Zone (Preview): /processor element</title>
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<div class="title">/processor element </div> </div>
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<div class="textblock"><p>The <b>processor</b> element is used to define the processing elements integration on a <a class="el" href="format_device.html">device</a>.</p>
<p><b>Example</b> </p>
<div class="fragment"><div class="line"><processor Pname=<span class="stringliteral">"Cortex-M4"</span> Dclock=<span class="stringliteral">"168000000"</span> Dcore=<span class="stringliteral">"Cortex-M4"</span> DcoreVersion=<span class="stringliteral">"r0p1"</span> Dendian=<span class="stringliteral">"Little-endian"</span> Dfpu=<span class="stringliteral">"SP_FPU"</span> Dmpu=<span class="stringliteral">"MPU"</span> Dtz=<span class="stringliteral">"NO_TZ"</span>></div>
<div class="line"> <memory_map></div>
<div class="line"> <!-- Logical address alias to access integrated SRAM --></div>
<div class="line"> <memory name=<span class="stringliteral">"CODE_SRAM"</span> alias=<span class="stringliteral">"SRAM"</span> start=<span class="stringliteral">"0x00000000"</span>/></div>
<div class="line"> :</div>
<div class="line"> </memory_map></div>
<div class="line"> :</div>
<div class="line"></processor></div>
</div><!-- fragment --><p><b>Schema Description</b></p>
<table class="cmtable" summary="Element: Processor">
<tr>
<th>Parent Element </th><th colspan="3">Element Chain </th></tr>
<tr>
<td><a class="el" href="format_device.html">device</a> </td><td colspan="3"><a class="el" href="format_device.html">/device element</a> </td></tr>
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<th>Attributes </th><th>Description </th><th>Type </th><th>Use </th></tr>
<tr>
<td>Pname </td><td>Processor identifier. This attribute <b>is mandatory for devices that embed multiple processors</b>. Each processor needs a per device unique identifier and must be used consistently in the <b>Pname</b> attribute. Only alphabetical characters, decimal digits, '-' and '_' are allowed. </td><td>RestrictedString </td><td>optional </td></tr>
<tr>
<td>Dcore </td><td>Specifies the processor core. </td><td>DcoreEnum </td><td>optional </td></tr>
<tr>
<td>Dfpu </td><td>Specifies whether a hardware Floating Point Unit is present in the processor. </td><td>DfpuEnum </td><td>optional </td></tr>
<tr>
<td>Dmpu </td><td>Specifies whether a Memory Protection Unit is present in the processor. </td><td>DmpuEnum </td><td>optional </td></tr>
<tr>
<td>Dtz </td><td>Specifies whether an Armv8-M based device implements TrustZone. </td><td>DtzEnum </td><td>optional </td></tr>
<tr>
<td>Ddsp </td><td>Specifies whether an Armv8-M based device supports the DSP instructions set. </td><td>DdspEnum </td><td>optional </td></tr>
<tr>
<td>Dendian </td><td>Specifies the endianess of the processor. </td><td>DendianEnum </td><td>optional </td></tr>
<tr>
<td>Dclock </td><td>Specifies the max clock frequency of the processor subsystem </td><td>xs:unsignedInt </td><td>optional </td></tr>
<tr>
<td>DcoreVersion </td><td>Hardware revision of the processor core </td><td>xs:string </td><td>required </td></tr>
<tr>
<td>info </td><td>Brief description of the processor. </td><td>xs:string </td><td>optional </td></tr>
<tr>
<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence </th></tr>
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<td><a class="el" href="format_memory_map.html">memory_map</a> </td><td>Processor specific (non-uniform) memory map. The effective memory map of the processor is derived as the union of device and processor level mappings. </td><td>complexType </td><td>0..1 </td></tr>
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