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| author | Cyrill Gorcunov <gorcunov@gmail.com> | 2018-07-19 15:47:31 +0300 |
|---|---|---|
| committer | Andrei Vagin <avagin@gmail.com> | 2018-10-30 19:27:55 +0300 |
| commit | f0fb0bc964f70bc4c890e294f0034d9609b466da (patch) | |
| tree | 422b78ded20471d97b222279fc97005a8dbd9c8c /images/core-x86.proto | |
| parent | e319aaa0cf489488d7796b6abea7f88a21d6e07f (diff) | |
x86: cpu -- Add image definitions for fpu frames
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Reviewed-by: Dmitry Safonov <0x7f454c46@gmail.com>
Signed-off-by: Andrei Vagin <avagin@virtuozzo.com>
Diffstat (limited to 'images/core-x86.proto')
| -rw-r--r-- | images/core-x86.proto | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/images/core-x86.proto b/images/core-x86.proto index d4b791dbc..2ed2ad35d 100644 --- a/images/core-x86.proto +++ b/images/core-x86.proto @@ -40,8 +40,29 @@ message user_x86_regs_entry { } message user_x86_xsave_entry { + /* standart xsave features */ required uint64 xstate_bv = 1; + + /* AVX components: 16x 256-bit ymm registers, hi 128 bits */ repeated uint32 ymmh_space = 2; + + /* MPX components */ + repeated uint64 bndreg_state = 3; + repeated uint64 bndcsr_state = 4; + + /* AVX512 components: k0-k7, ZMM_Hi256, Hi16_ZMM */ + repeated uint64 opmask_reg = 5; + repeated uint64 zmm_upper = 6; + repeated uint64 hi16_zmm = 7; + + /* Protected keys */ + repeated uint32 pkru = 8; + + /* + * Processor trace (PT) and hardware duty cycling (HDC) + * are supervisor state components and only managed by + * xsaves/xrstors on cpl=0, so ignore them. + */ } message user_x86_fpregs_entry { |