Mapper 67 support

2 files changed, 51 insertions, 2 deletions

diff --git a/CoolGirl_config.vh b/CoolGirl_config.vh
index 4dd8614..1cbd953 100644
--- a/CoolGirl_config.vh
+++ b/CoolGirl_config.vh
@@ -16,6 +16,7 @@ parameter ENABLE_MAPPER_042 = 1,             // mapper #042 - FDS conversions
 parameter ENABLE_MAPPER_042_INTERRUPTS = 0,  // mapper #042 interrupts: for Mario Baby only
 parameter ENABLE_MAPPER_065 = 1,             // mapper #065 - Irem's H3001
 parameter ENABLE_MAPPER_066 = 1,             // mapper #066 - GxROM
+parameter ENABLE_MAPPER_067 = 0,             // mapper #067 - Sunsoft-3
 parameter ENABLE_MAPPER_069 = 1,             // mapper #069 - Sunsoft FME-7
 parameter ENABLE_MAPPER_070 = 1,             // mapper #070 - Bandai: Family Trainer, Kamen Rider Club, Space Shadow
 parameter ENABLE_MAPPER_071 = 1,             // mapper #071 - Camerica: for Fire Hawk only
diff --git a/CoolGirl_mappers.vh b/CoolGirl_mappers.vh
index 86fa79b..a3b42e9 100644
--- a/CoolGirl_mappers.vh
+++ b/CoolGirl_mappers.vh
@@ -45,7 +45,8 @@ assign irq = (
    mapper69_irq_out |
    mapper42_irq_out |

    mapper83_irq_out |
-   mapper90_irq_out) ? 1'b0 : 1'bZ;
+   mapper90_irq_out |
+   mapper67_irq_out) ? 1'b0 : 1'bZ;
 // for MMC3 scanline-based interrupts, counts A12 rises after long A12 falls
 reg mmc3_irq_enabled = 0;           // register to enable/disable counter
 reg [7:0] mmc3_irq_latch = 0;       // stores counter reload latch value
@@ -111,7 +112,12 @@ reg mapper90_irq_reload = 0;        // flag to reload counter and prescaler from
 reg mapper90_irq_reload_clear = 0;  // flag to clear reload flag
 reg mapper90_irq_pending = 0;       // flag of pending IRQ
 reg mapper90_irq_out = 0;           // stores 1 when IRQ is triggered
-reg mapper90_irq_out_clear = 0;     // flag to clear pending flag

+reg mapper90_irq_out_clear = 0;     // flag to clear pending flag
+// for mapper #67, CPU-based interrupts
+reg mapper67_irq_enabled = 0;
+reg mapper67_irq_latch = 0;
+reg [15:0] mapper67_irq_counter = 0;
+reg mapper67_irq_out = 0;

 
 // Mapper specific stuff
 // for MMC2/MMC4
@@ -382,6 +388,17 @@ begin
    if (mapper90_irq_reload_clear)
       mapper90_irq_reload <= 0;
 
+   // for mapper #67
+	if (ENABLE_MAPPER_067 && mapper67_irq_enabled)
+   begin
+		mapper67_irq_counter = mapper67_irq_counter - 1'b1;
+		if (mapper67_irq_counter == 16'hFFFF)
+		begin
+			mapper67_irq_out <= 1; // fire IRQ
+			mapper67_irq_enabled <= 0; // disable IRQ
+		end
+	end
+
    if (cpu_rw_in == 1) // read
    begin
       // block two writes in a row (RMW) for games like Snow Bros. and Bill & Ted's Excellent Adventure
@@ -442,6 +459,7 @@ begin
             mapper42_irq_enabled <= 0;
             mapper83_irq_enabled <= 0;
             mapper90_irq_enabled <= 0;
+            mapper67_irq_enabled <= 0;
 
             // Acknowledge IRQs
             mmc5_irq_ack <= 1;
@@ -453,6 +471,7 @@ begin
             mapper42_irq_value <= 0;
             mapper83_irq_out <= 0;
             mapper90_irq_out <= 0;
+            mapper67_irq_out <= 0;
 
             // Start reset sequence
             reset_state = 1;
@@ -1304,6 +1323,35 @@ begin
                        end

             endcase            

          end
+
+         if (ENABLE_MAPPER_067 && (mapper == 6'b100100))
+         begin
+            if (cpu_addr_in[11])
+            begin
+               case (cpu_addr_in[14:12])
+                  3'b000: chr_bank_a[6:1] <= cpu_data_in[5:0]; // $8800
+                  3'b001: chr_bank_c[6:1] <= cpu_data_in[5:0]; // $9800
+                  3'b010: chr_bank_e[6:1] <= cpu_data_in[5:0]; // $A800
+                  3'b011: chr_bank_g[6:1] <= cpu_data_in[5:0]; // $B800
+                  3'b100: begin                                // $C800, IRQ load
+                             mapper67_irq_latch = ~mapper67_irq_latch;
+                             if (mapper67_irq_latch)
+                                mapper67_irq_counter[15:8] <= cpu_data_in[7:0];
+                             else
+                                mapper67_irq_counter[7:0] <= cpu_data_in[7:0];
+                          end
+                  3'b101: begin                                // $D800, IRQ enable
+									  mapper67_irq_latch <= 0;
+						           mapper67_irq_enabled <= cpu_data_in[4];
+                          end
+                  3'b110: mirroring[1:0] <= cpu_data_in[1:0];  // $E800
+                  3'b111: prg_bank_a[4:1] <= cpu_data_in[3:0]; // $F800
+               endcase
+            end else begin
+               // Interrupt Acknowledge ($8000)
+               mapper67_irq_out <= 0;
+            end
+         end
       end // romsel
    end // write