diff options
author | Alexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com> | 2020-09-15 00:26:19 +0300 |
---|---|---|
committer | Alexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com> | 2020-09-15 00:27:50 +0300 |
commit | 5e44bd911751574e4d0815c1b95938e4327b5d88 (patch) | |
tree | 7af6c17de439afc7f275daa4c379dbd8729ea0fb | |
parent | 01337ea56c05ac25d0ff9b7c511bae1ac38be2d9 (diff) |
Added files to project
-rw-r--r-- | CoolGirl.qsf | 8 | ||||
-rw-r--r-- | CoolGirl.v | 2 |
2 files changed, 6 insertions, 4 deletions
diff --git a/CoolGirl.qsf b/CoolGirl.qsf index 543516b..a1751bd 100644 --- a/CoolGirl.qsf +++ b/CoolGirl.qsf @@ -43,7 +43,6 @@ set_global_assignment -name TOP_LEVEL_ENTITY CoolGirl set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:53:22 MAY 05, 2016"
set_global_assignment -name LAST_QUARTUS_VERSION "20.1.0 Lite Edition"
-set_global_assignment -name VERILOG_FILE CoolGirl.v
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
@@ -138,7 +137,6 @@ set_location_assignment PIN_60 -to ppu_addr_in[9] set_location_assignment PIN_91 -to m2
set_location_assignment PIN_49 -to ppu_addr_out[13]
set_location_assignment PIN_130 -to sram_oe
-set_global_assignment -name CDF_FILE CoolGirl.cdf
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
set_global_assignment -name OPTIMIZATION_MODE BALANCED
set_location_assignment PIN_93 -to ppu_not_a13_out
@@ -151,4 +149,8 @@ set_instance_assignment -name IO_STANDARD "3.3-V PCI" -to romsel set_instance_assignment -name IO_STANDARD "3.3-V PCI" -to sram_we
set_instance_assignment -name IO_STANDARD "3.3-V PCI" -to sram_ce
set_instance_assignment -name IO_STANDARD "3.3-V PCI" -to ppu_ciram_ce
-set_instance_assignment -name IO_STANDARD "3.3-V PCI" -to ppu_not_a13_out
\ No newline at end of file +set_instance_assignment -name IO_STANDARD "3.3-V PCI" -to ppu_not_a13_out
+set_global_assignment -name VERILOG_INCLUDE_FILE CoolGirl_mappers.vh
+set_global_assignment -name VERILOG_INCLUDE_FILE CoolGirl_config.vh
+set_global_assignment -name VERILOG_FILE CoolGirl.v
+set_global_assignment -name CDF_FILE CoolGirl.cdf
\ No newline at end of file @@ -3,7 +3,7 @@ */
module CoolGirl # (
- `include "CoolGirl_config.vh"
+ `include "CoolGirl_config.vh"
)
(
input m2,
|