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authorAlexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com>2020-09-22 01:21:09 +0300
committerAlexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com>2020-09-22 01:21:09 +0300
commit57fd0cffe295ffe5245e14776992695081297459 (patch)
tree7ce0b9153ebec339e0b436e9441277197db5010a /CoolGirl_rev4.x
parent0a6059db4c2f85bbbc97d93f9489dfe841d6eb32 (diff)
512KB CHR RAM fixes
Diffstat (limited to 'CoolGirl_rev4.x')
-rw-r--r--CoolGirl_rev4.x/CoolGirl.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/CoolGirl_rev4.x/CoolGirl.v b/CoolGirl_rev4.x/CoolGirl.v
index a895126..fe5928c 100644
--- a/CoolGirl_rev4.x/CoolGirl.v
+++ b/CoolGirl_rev4.x/CoolGirl.v
@@ -46,7 +46,7 @@ module CoolGirl # (
assign sram_addr_out[14:13] = sram_page[1:0];
assign ppu_addr_out[18:10] = ext_ntram_access
? {7'b1111111, ppu_addr_in[11:10]}
- : {{~chr_addr_mapped[18], chr_addr_mapped[17:13]} & ~chr_mask[18:13], chr_addr_mapped[12:10]};
+ : {~(chr_addr_mapped[18] & ~chr_mask[18]), chr_addr_mapped[17:13] & ~chr_mask[17:13], chr_addr_mapped[12:10]};
assign cpu_data_in = cpu_data_out_enabled ? cpu_data_out : 8'bZZZZZZZZ;
wire flash_ce_w = ~(~romsel | (m2 & map_rom_on_6000 & cpu_addr_in[14] & cpu_addr_in[13]));