Add support for AvxVnni instructions under Experimental. (#51998)

* Add support for AvxVnni instructions under Experimental.

* Add support for AvxVnni instructions

* Add preveiw feature attribute

* Handle operands in lsra

* Undo changes for Experimental

* Update JITEEVersionIdentifier and fix remaining issues

* Resolve Mono CI failure

* Disable tests

* Disable Vector128 tests

* Modify disable tests

Co-authored-by: Tanner Gooding <tagoo@outlook.com>

3 files changed, 57 insertions, 38 deletions

diff --git a/src/coreclr/inc/corinfoinstructionset.h b/src/coreclr/inc/corinfoinstructionset.h
index 5b7ec3f559c..39003cb7398 100644
--- a/src/coreclr/inc/corinfoinstructionset.h
+++ b/src/coreclr/inc/corinfoinstructionset.h
@@ -56,22 +56,24 @@ enum CORINFO_InstructionSet
     InstructionSet_POPCNT=16,
     InstructionSet_Vector128=17,
     InstructionSet_Vector256=18,
-    InstructionSet_X86Base_X64=19,
-    InstructionSet_SSE_X64=20,
-    InstructionSet_SSE2_X64=21,
-    InstructionSet_SSE3_X64=22,
-    InstructionSet_SSSE3_X64=23,
-    InstructionSet_SSE41_X64=24,
-    InstructionSet_SSE42_X64=25,
-    InstructionSet_AVX_X64=26,
-    InstructionSet_AVX2_X64=27,
-    InstructionSet_AES_X64=28,
-    InstructionSet_BMI1_X64=29,
-    InstructionSet_BMI2_X64=30,
-    InstructionSet_FMA_X64=31,
-    InstructionSet_LZCNT_X64=32,
-    InstructionSet_PCLMULQDQ_X64=33,
-    InstructionSet_POPCNT_X64=34,
+    InstructionSet_AVXVNNI=19,
+    InstructionSet_X86Base_X64=20,
+    InstructionSet_SSE_X64=21,
+    InstructionSet_SSE2_X64=22,
+    InstructionSet_SSE3_X64=23,
+    InstructionSet_SSSE3_X64=24,
+    InstructionSet_SSE41_X64=25,
+    InstructionSet_SSE42_X64=26,
+    InstructionSet_AVX_X64=27,
+    InstructionSet_AVX2_X64=28,
+    InstructionSet_AES_X64=29,
+    InstructionSet_BMI1_X64=30,
+    InstructionSet_BMI2_X64=31,
+    InstructionSet_FMA_X64=32,
+    InstructionSet_LZCNT_X64=33,
+    InstructionSet_PCLMULQDQ_X64=34,
+    InstructionSet_POPCNT_X64=35,
+    InstructionSet_AVXVNNI_X64=36,
 #endif // TARGET_AMD64
 #ifdef TARGET_X86
     InstructionSet_X86Base=1,
@@ -92,22 +94,24 @@ enum CORINFO_InstructionSet
     InstructionSet_POPCNT=16,
     InstructionSet_Vector128=17,
     InstructionSet_Vector256=18,
-    InstructionSet_X86Base_X64=19,
-    InstructionSet_SSE_X64=20,
-    InstructionSet_SSE2_X64=21,
-    InstructionSet_SSE3_X64=22,
-    InstructionSet_SSSE3_X64=23,
-    InstructionSet_SSE41_X64=24,
-    InstructionSet_SSE42_X64=25,
-    InstructionSet_AVX_X64=26,
-    InstructionSet_AVX2_X64=27,
-    InstructionSet_AES_X64=28,
-    InstructionSet_BMI1_X64=29,
-    InstructionSet_BMI2_X64=30,
-    InstructionSet_FMA_X64=31,
-    InstructionSet_LZCNT_X64=32,
-    InstructionSet_PCLMULQDQ_X64=33,
-    InstructionSet_POPCNT_X64=34,
+    InstructionSet_AVXVNNI=19,
+    InstructionSet_X86Base_X64=20,
+    InstructionSet_SSE_X64=21,
+    InstructionSet_SSE2_X64=22,
+    InstructionSet_SSE3_X64=23,
+    InstructionSet_SSSE3_X64=24,
+    InstructionSet_SSE41_X64=25,
+    InstructionSet_SSE42_X64=26,
+    InstructionSet_AVX_X64=27,
+    InstructionSet_AVX2_X64=28,
+    InstructionSet_AES_X64=29,
+    InstructionSet_BMI1_X64=30,
+    InstructionSet_BMI2_X64=31,
+    InstructionSet_FMA_X64=32,
+    InstructionSet_LZCNT_X64=33,
+    InstructionSet_PCLMULQDQ_X64=34,
+    InstructionSet_POPCNT_X64=35,
+    InstructionSet_AVXVNNI_X64=36,
 #endif // TARGET_X86
 
 };
@@ -205,6 +209,8 @@ public:
             AddInstructionSet(InstructionSet_PCLMULQDQ_X64);
         if (HasInstructionSet(InstructionSet_POPCNT))
             AddInstructionSet(InstructionSet_POPCNT_X64);
+        if (HasInstructionSet(InstructionSet_AVXVNNI))
+            AddInstructionSet(InstructionSet_AVXVNNI_X64);
 #endif // TARGET_AMD64
 #ifdef TARGET_X86
 #endif // TARGET_X86
@@ -342,6 +348,10 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
             resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
         if (resultflags.HasInstructionSet(InstructionSet_POPCNT_X64) && !resultflags.HasInstructionSet(InstructionSet_POPCNT))
             resultflags.RemoveInstructionSet(InstructionSet_POPCNT_X64);
+        if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNI_X64))
+            resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
+        if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI_X64) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNI))
+            resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI_X64);
         if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
             resultflags.RemoveInstructionSet(InstructionSet_SSE);
         if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE))
@@ -530,6 +540,10 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
             return "Vector128";
         case InstructionSet_Vector256 :
             return "Vector256";
+        case InstructionSet_AVXVNNI :
+            return "AVXVNNI";
+        case InstructionSet_AVXVNNI_X64 :
+            return "AVXVNNI_X64";
 #endif // TARGET_AMD64
 #ifdef TARGET_X86
         case InstructionSet_X86Base :
@@ -568,6 +582,8 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
             return "Vector128";
         case InstructionSet_Vector256 :
             return "Vector256";
+        case InstructionSet_AVXVNNI :
+            return "AVXVNNI";
 #endif // TARGET_X86
 
         default:
@@ -615,6 +631,7 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
         case READYTORUN_INSTRUCTION_Lzcnt: return InstructionSet_LZCNT;
         case READYTORUN_INSTRUCTION_Pclmulqdq: return InstructionSet_PCLMULQDQ;
         case READYTORUN_INSTRUCTION_Popcnt: return InstructionSet_POPCNT;
+        case READYTORUN_INSTRUCTION_AvxVnni: return InstructionSet_AVXVNNI;
 #endif // TARGET_AMD64
 #ifdef TARGET_X86
         case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base;
@@ -633,6 +650,7 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
         case READYTORUN_INSTRUCTION_Lzcnt: return InstructionSet_LZCNT;
         case READYTORUN_INSTRUCTION_Pclmulqdq: return InstructionSet_PCLMULQDQ;
         case READYTORUN_INSTRUCTION_Popcnt: return InstructionSet_POPCNT;
+        case READYTORUN_INSTRUCTION_AvxVnni: return InstructionSet_AVXVNNI;
 #endif // TARGET_X86
 
         default:
diff --git a/src/coreclr/inc/jiteeversionguid.h b/src/coreclr/inc/jiteeversionguid.h
index 548fcf5f7f3..25746b45992 100644
--- a/src/coreclr/inc/jiteeversionguid.h
+++ b/src/coreclr/inc/jiteeversionguid.h
@@ -43,12 +43,12 @@ typedef const GUID *LPCGUID;
 #define GUID_DEFINED
 #endif // !GUID_DEFINED
 
-constexpr GUID JITEEVersionIdentifier = { /* 81a5e384-8ca5-4947-8b2e-1d76556728fd */
-    0x81a5e384,
-    0x8ca5,
-    0x4947,
-    {0x8b, 0x2e, 0x1d, 0x76, 0x55, 0x67, 0x28, 0xfd}
-};
+constexpr GUID JITEEVersionIdentifier = { /* 1052f490-cad7-4610-99bb-6f2bd91a1d19 */
+    0x1052f490,
+    0xcad7,
+    0x4610,
+    {0x99, 0xbb, 0x6f, 0x2b, 0xd9, 0x1a, 0x1d, 0x19}
+  };
 
 //////////////////////////////////////////////////////////////////////////////////////////////////////////
 //
diff --git a/src/coreclr/inc/readytoruninstructionset.h b/src/coreclr/inc/readytoruninstructionset.h
index 9a4d0ba2ef9..1b66c6e5208 100644
--- a/src/coreclr/inc/readytoruninstructionset.h
+++ b/src/coreclr/inc/readytoruninstructionset.h
@@ -33,6 +33,7 @@ enum ReadyToRunInstructionSet
     READYTORUN_INSTRUCTION_X86Base=22,
     READYTORUN_INSTRUCTION_Dp=23,
     READYTORUN_INSTRUCTION_Rdm=24,
+    READYTORUN_INSTRUCTION_AvxVnni=25,
 
 };