add demo code for STM32F070XB

issue #44

4 files changed, 109 insertions, 4 deletions

diff --git a/Makefile b/Makefile
index 9af18bc..4e73c02 100644
--- a/Makefile
+++ b/Makefile
@@ -182,4 +182,10 @@ stm32l433cc:
 	@$(MAKE) clean demo STARTUP='$(CMSISDEV)/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l433xx.s' \
 						LDSCRIPT='demo/stm32l433xc.ld' \
 						DEFINES='STM32L4 STM32L433xx USBD_SOF_DISABLED' \
-						CFLAGS='-mcpu=cortex-m4 -mthumb'
\ No newline at end of file
+						CFLAGS='-mcpu=cortex-m4 -mthumb'
+
+stm32f070xb:
+	@$(MAKE) clean demo STARTUP='$(CMSISDEV)/ST/STM32F0xx/Source/Templates/gcc/startup_stm32f070xb.s' \
+						LDSCRIPT='demo/stm32f070xb.ld' \
+						DEFINES='STM32F0 STM32F070xB USBD_SOF_DISABLED' \
+						CFLAGS='-mcpu=cortex-m0plus -mthumb'
\ No newline at end of file
diff --git a/demo/cdc_startup.c b/demo/cdc_startup.c
index 1d6125a..cadc7c3 100644
--- a/demo/cdc_startup.c
+++ b/demo/cdc_startup.c
@@ -183,7 +183,19 @@ static void cdc_init_rcc (void) {
     /* Disabling USB Vddusb power isolation. Vusb connected to Vdd */
     _BST(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
     _BST(PWR->CR2, PWR_CR2_USV);
-
+#elif defined(STM32F070xB)
+    /* set flash latency 1WS */
+    _BST(FLASH->ACR, FLASH_ACR_LATENCY);
+    /* use PLL 48MHz clock from 8Mhz HSI */
+    _BMD(RCC->CFGR,
+        RCC_CFGR_PLLMUL | RCC_CFGR_PLLSRC | RCC_CFGR_USBPRE,
+        RCC_CFGR_PLLMUL12 | RCC_CFGR_USBPRE);
+    _BST(RCC->CR, RCC_CR_PLLON);
+    _WBS(RCC->CR, RCC_CR_PLLRDY);
+    /* switch to PLL */
+    _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
+    _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
+    _BST(RCC->CFGR3, RCC_CFGR3_USBSW_PLLCLK);
 #else
     #error Not supported
 #endif
diff --git a/demo/stm32f070xb.ld b/demo/stm32f070xb.ld
new file mode 100644
index 0000000..2b7836c
--- /dev/null
+++ b/demo/stm32f070xb.ld
@@ -0,0 +1,87 @@
+ENTRY(Reset_Handler)
+MEMORY
+{
+    ROM  (rx): ORIGIN = 0x08000000, LENGTH =  128K
+    RAM (rwx): ORIGIN = 0x20000000, LENGTH =  16K
+}
+SECTIONS
+{
+    .text :
+    {
+        KEEP(*(.isr_vector))
+        *(.text*)
+        KEEP(*(.init))  KEEP(*(.fini))
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o).dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+        *(.rodata*)
+        KEEP(*(.eh_frame*))
+    } > ROM
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > ROM
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ROM
+    __exidx_end = .;
+    __etext = .;
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        *(vtable)
+        *(.data*)
+        . = ALIGN(4);
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+        . = ALIGN(4);
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+        . = ALIGN(4);
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+        . = ALIGN(4);
+        __data_end__ = .;
+    } > RAM
+    .bss (NOLOAD) :
+    {
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        __bss_end__ = .;
+    } > RAM
+    .heap (NOLOAD) :
+    {
+        __end__ = .;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+    .stack_dummy (NOLOAD) :
+    {
+        *(.stack)
+    } > RAM
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+    PROVIDE(_estack = __stack);
+    PROVIDE(_sidata = __etext);
+    PROVIDE(_sdata = __data_start__);
+    PROVIDE(_edata = __data_end__);
+    PROVIDE(_sbss = __bss_start__);
+    PROVIDE(_ebss = __bss_end__);
+}
diff --git a/readme.md b/readme.md
index 19011c5..7847c9f 100644
--- a/readme.md
+++ b/readme.md
@@ -16,7 +16,7 @@
 <table>
     <tr><th>MCU Series</th><th>Features</th><th>Driver</th><th>File</th></tr>
     <tr>
-        <td rowspan="2">STM32L0x2 STM32L0x3 STM32F0x2 STM32F0x8</td>
+        <td rowspan="2">STM32L0x2 STM32L0x3 STM32F070 STM32F0x2 STM32F0x8</td>
         <td nowrap rowspan="2">Doublebuffered<sup>[2]</sup><br />8<sup>[1]</sup> endpoints<br /> BC1.2</td>
         <td>usbd_devfs</td>
         <td>usbd_stm32l052_devfs.c</td>
@@ -87,7 +87,7 @@
 
 2. At this moment BULK IN endpoint can use both buffers, but it is not **real** doublebuffered.
 
-3. Tested with STM32L052K8, STM32L100RC, STM32L476RG, STM32F072C8, STM32F103C8, STM32F103CB, STM32F303CC, STM32F303RE, STM32F429ZI, STM32F105RBT6, STM32F107VCT6, STM32L433CCT6
+3. Tested with STM32L052K8, STM32L100RC, STM32L476RG, STM32F072C8, STM32F103C8, STM32F103CB, STM32F303CC, STM32F303RE, STM32F429ZI, STM32F105RBT6, STM32F107VCT6, STM32L433CCT6, STM32F070CBT6
 
 ### Implemented definitions for classes ###
 1. USB HID based on [Device Class Definition for Human Interface Devices (HID) Version 1.11](https://www.usb.org/sites/default/files/documents/hid1_11.pdf)