diff options
| author | Dmitry Filimonchuk <dmitrystu@gmail.com> | 2020-07-31 19:55:53 +0300 |
|---|---|---|
| committer | Dmitry Filimonchuk <dmitrystu@gmail.com> | 2020-07-31 23:00:27 +0300 |
| commit | 50b06ba4dc00653e7b2d405eab83e4ce2057b24b (patch) | |
| tree | 35ff8834d177eba58ac8e2beca018cc8c74d3f0a | |
| parent | 728c84cf0500c802448150ac01658e1ae434cec2 (diff) | |
add F405 demo
| -rw-r--r-- | Makefile | 14 | ||||
| -rw-r--r-- | demo/cdc_startup.c | 2 | ||||
| -rw-r--r-- | demo/stm32f405xg.ld | 9 |
3 files changed, 23 insertions, 2 deletions
@@ -228,4 +228,16 @@ stm32l053x8 32l053r8-nucleo: clean @$(MAKE) demo STARTUP='$(CMSISDEV)/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l053xx.s' \ LDSCRIPT='demo/stm32l052x8.ld' \ DEFINES='STM32L0 STM32L053xx USBD_SOF_DISABLED' \ - CFLAGS='-mcpu=cortex-m0plus'
\ No newline at end of file + CFLAGS='-mcpu=cortex-m0plus' + +stm32f405xg: clean + @$(MAKE) demo STARTUP='$(CMSISDEV)/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f405xx.s' \ + LDSCRIPT='demo/stm32f405xg.ld' \ + DEFINES='STM32F4 STM32F405xx USBD_SOF_DISABLED' \ + CFLAGS='-mcpu=cortex-m4' + +stm32f405xg_hs: clean + @$(MAKE) demo STARTUP='$(CMSISDEV)/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f405xx.s' \ + LDSCRIPT='demo/stm32f405xg.ld' \ + DEFINES='STM32F4 STM32F405xx USBD_SOF_DISABLED USBD_PRIMARY_OTGHS' \ + CFLAGS='-mcpu=cortex-m4'
\ No newline at end of file diff --git a/demo/cdc_startup.c b/demo/cdc_startup.c index dcd7b73..5deb17b 100644 --- a/demo/cdc_startup.c +++ b/demo/cdc_startup.c @@ -113,7 +113,7 @@ static void cdc_init_rcc (void) { _BMD(GPIOA->MODER, (0x03 << 22) | (0x03 << 24), (0x02 << 22) | (0x02 << 24)); // MCO -#elif defined(STM32F429xx) +#elif defined(STM32F429xx) || defined(STM32F405xx) /* set flash latency 2WS */ _BMD(FLASH->ACR, FLASH_ACR_LATENCY, FLASH_ACR_LATENCY_2WS); /* setting up PLL 16MHz HSI, VCO=144MHz, PLLP = 72MHz PLLQ = 48MHz */ diff --git a/demo/stm32f405xg.ld b/demo/stm32f405xg.ld new file mode 100644 index 0000000..859750e --- /dev/null +++ b/demo/stm32f405xg.ld @@ -0,0 +1,9 @@ +ENTRY(Reset_Handler) +MEMORY +{ + ROM (rx): ORIGIN = 0x08000000, LENGTH = 1024K + RAM (rwx): ORIGIN = 0x20000000, LENGTH = 128K + RAM2 (rwx): ORIGIN = 0x10000000, LENGTH = 64K +} + +INCLUDE sections.ld |