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author | michael-roe <2479665+michael-roe@users.noreply.github.com> | 2022-07-21 22:58:04 +0300 |
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committer | GitHub <noreply@github.com> | 2022-07-21 22:58:04 +0300 |
commit | c7c77516828e9a116fd7c2f72bb781cfaf72919f (patch) | |
tree | 227f51c47a1bea749b431e3f6f1161096e66b2ff | |
parent | c1620a979e751387a440a6d7bdcd96dc025d39ce (diff) |
Add macros for RISCV hwcaps (#246)
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
-rw-r--r-- | include/internal/hwcaps.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/internal/hwcaps.h b/include/internal/hwcaps.h index 3f45aed..f916b81 100644 --- a/include/internal/hwcaps.h +++ b/include/internal/hwcaps.h @@ -176,6 +176,17 @@ CPU_FEATURES_START_CPP_NAMESPACE #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 #endif +// https://elixir.bootlin.com/linux/latest/source/arch/riscv/include/uapi/asm/hwcap.h +#define RISCV_HWCAP_A (1UL << ('A' - 'A')) +#define RISCV_HWCAP_C (1UL << ('C' - 'A')) +#define RISCV_HWCAP_D (1UL << ('D' - 'A')) +#define RISCV_HWCAP_E (1UL << ('E' - 'A')) +#define RISCV_HWCAP_F (1UL << ('F' - 'A')) +#define RISCV_HWCAP_I (1UL << ('I' - 'A')) +#define RISCV_HWCAP_M (1UL << ('M' - 'A')) +#define RISCV_HWCAP_V (1UL << ('V' - 'A')) +#define RISCV_HWCAP_Q (1UL << ('Q' - 'A')) + typedef struct { unsigned long hwcaps; unsigned long hwcaps2; |