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authorRuy Contributors <ruy-eng@google.com>2022-08-11 18:56:27 +0300
committerCopybara-Service <copybara-worker@google.com>2022-08-24 19:23:40 +0300
commit8af1725e7fbe6db685f25e1c011c9bc0b042b083 (patch)
treed4d6f7eadb741203fd7e17d0ed7fbca932d8a30d
parent97ebb72aa0655c0af98896b317476a5d0dacad9c (diff)
Null check each cpuinfo_get_processor call.test_466965492
Add null checks in cases the cpuinfo could be faked and therefore not consistent. For example, the number of processors would be faked to be 8 but the rest of the processor info could be missing. PiperOrigin-RevId: 466965492
-rw-r--r--ruy/cpuinfo.cc15
1 files changed, 9 insertions, 6 deletions
diff --git a/ruy/cpuinfo.cc b/ruy/cpuinfo.cc
index 8a0e912..4e9bc5c 100644
--- a/ruy/cpuinfo.cc
+++ b/ruy/cpuinfo.cc
@@ -48,6 +48,7 @@ void QueryCacheParams(CpuCacheParams* cache_params) {
int local_cache_size = 0;
int last_level_cache_size = 0;
const cpuinfo_processor* processor = cpuinfo_get_processor(i);
+ if (!processor) continue;
// Loop over cache levels. Ignoring L4 for now: it seems that in CPUs that
// have L4, we would still prefer to stay in lower-latency L3.
for (const cpuinfo_cache* cache :
@@ -56,14 +57,16 @@ void QueryCacheParams(CpuCacheParams* cache_params) {
continue; // continue, not break, it is possible to have L1+L3 but no
// L2.
}
- if (!cache->processor_count) {
+ if (!cache->processor_count || !cache->processor_start) {
continue; // crashes from Chrome on Android suggests that might happen?
}
- const bool is_local =
- cpuinfo_get_processor(cache->processor_start)->core ==
- cpuinfo_get_processor(cache->processor_start +
- cache->processor_count - 1)
- ->core;
+ const cpuinfo_processor* start_processor =
+ cpuinfo_get_processor(cache->processor_start);
+ const cpuinfo_processor* end_processor = cpuinfo_get_processor(
+ cache->processor_start + cache->processor_count - 1);
+ if (!start_processor || !end_processor) continue;
+ const bool is_local = start_processor->core == end_processor->core;
+
if (is_local) {
local_cache_size = cache->size;
}