fel: h616: support alternative die variant

The Allwinner H616 ships in at least two die variants, sometime under a
different name (H618, T507), but sometimes labeled as a normal "H616".
The die variants differ in their CPU cluster control subsystem, which
affects the location of the RVBAR shadow register used to reset the core
into 64-bit mode. We use that in the "reset64" command, but also as part
of the boot process using the "uboot" command, on ARMv8 cores.

Add code to detect the die variant by reading the VER_REG MMIO register,
where the original die reports 0x00 in the lower 8 bits, but the newer
die variants apparently 0x02. In the latter case let the aw_rmr_request()
function use the alternative RVBAR address to do the 64-bit switch.
This matches what we do in U-Boot and Trusted Firmware.

Signed-off-by: Andre Przywara <osp@andrep.de>

3 files changed, 14 insertions, 2 deletions

diff --git a/fel.c b/fel.c
index c150331..2e4c336 100644
--- a/fel.c
+++ b/fel.c
@@ -1101,6 +1101,14 @@ void aw_rmr_request(feldev_handle *dev, uint32_t entry_point, bool aarch64)
 			 dev->soc_name);
 		return;
 	}
+	/* The H616 has two die variants with different RVBAR locations. */
+	uint32_t rvbar_reg = soc_info->rvbar_reg;
+	if (soc_info->rvbar_reg_alt) {
+		uint32_t ver_reg = fel_readl(dev, soc_info->ver_reg);
+
+		if (ver_reg & 0xff)
+			rvbar_reg = soc_info->rvbar_reg_alt;
+	}
 
 	uint32_t rmr_mode = (1 << 1) | (aarch64 ? 1 : 0); /* RR, AA64 flag */
 	uint32_t arm_code[] = {
@@ -1119,7 +1127,7 @@ void aw_rmr_request(feldev_handle *dev, uint32_t entry_point, bool aarch64)
 		htole32(0xe320f003), /* loop:      wfi                      */
 		htole32(0xeafffffd), /* b          <loop>                   */
 
-		htole32(soc_info->rvbar_reg),
+		htole32(rvbar_reg),
 		htole32(entry_point),
 		htole32(rmr_mode)
 	};
@@ -1128,7 +1136,7 @@ void aw_rmr_request(feldev_handle *dev, uint32_t entry_point, bool aarch64)
 	/* execute the thunk code (triggering a warm reset on the SoC) */
 	pr_info("Store entry point 0x%08X to RVBAR 0x%08X, "
 		"and request warm reset with RMR mode %u...",
-		entry_point, soc_info->rvbar_reg, rmr_mode);
+		entry_point, rvbar_reg, rmr_mode);
 	aw_fel_execute(dev, soc_info->scratch_addr);
 	pr_info(" done.\n");
 }
diff --git a/soc_info.c b/soc_info.c
index 66074ab..501c293 100644
--- a/soc_info.c
+++ b/soc_info.c
@@ -484,6 +484,8 @@ soc_info_t soc_info_table[] = {
 		.sid_offset   = 0x200,
 		.sid_sections = generic_2k_sid_maps,
 		.rvbar_reg    = 0x09010040,
+		.rvbar_reg_alt= 0x08100040,
+		.ver_reg      = 0x03000024,
 		.watchdog     = &wd_h6_compat,
 	},{
 		.soc_id       = 0x1851, /* Allwinner R329 */
diff --git a/soc_info.h b/soc_info.h
index a7ae83e..1e72ecb 100644
--- a/soc_info.h
+++ b/soc_info.h
@@ -127,6 +127,8 @@ typedef struct {
 	uint32_t           sid_offset;   /* offset for SID_KEY[0-3], "root key" */
 	const sid_section *sid_sections; /* sid memory maps */
 	uint32_t           rvbar_reg;    /* MMIO address of RVBARADDR0_L register */
+	uint32_t           rvbar_reg_alt;/* alternative MMIO address of RVBARADDR0_L register */
+	uint32_t           ver_reg;      /* MMIO address of "Version Register" */
 	const watchdog_info *watchdog;   /* Used for reset */
 	bool               sid_fix;      /* Use SID workaround (read via register) */
 	/* Use I$ workaround (disable I$ before first write to prevent stale thunk */