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| author | Dylan McKay <me@dylanmckay.io> | 2017-10-15 01:30:44 +0300 |
|---|---|---|
| committer | Dylan McKay <me@dylanmckay.io> | 2017-10-15 01:30:44 +0300 |
| commit | c201f2417a3f78ab63e0c1a12855e7ea74aa7f69 (patch) | |
| tree | 511ff014f8107d939dbf86ac801516e466cc1fa2 | |
| parent | fb12e5f48114a065bebb3039c7a9a97f8c2ef6ba (diff) | |
Merging r314897:
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r314897 | dylanmckay | 2017-10-04 23:36:07 +1300 (Wed, 04 Oct 2017) | 3 lines
[AVR] Factor out mayLoad in tablegen patterns
Patch by Gergo Erdi.
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llvm-svn: 315835
| -rw-r--r-- | llvm/lib/Target/AVR/AVRInstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AVR/AVRInstrInfo.td b/llvm/lib/Target/AVR/AVRInstrInfo.td index 8c7b6f243928..7d1bfc8d85e0 100644 --- a/llvm/lib/Target/AVR/AVRInstrInfo.td +++ b/llvm/lib/Target/AVR/AVRInstrInfo.td @@ -1417,6 +1417,7 @@ def STDWPtrQRr : Pseudo<(outs), // Load program memory operations. let canFoldAsLoad = 1, isReMaterializable = 1, +mayLoad = 1, hasSideEffects = 0 in { let Defs = [R0], @@ -1437,8 +1438,7 @@ hasSideEffects = 0 in Requires<[HasLPMX]>; // Load program memory, while postincrementing the Z register. - let mayLoad = 1, - Defs = [R31R30] in + let Defs = [R31R30] in { def LPMRdZPi : FLPMX<0, 1, |