diff options
author | sergey ignatov <sergign60@mail.ru> | 2018-08-10 03:43:12 +0300 |
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committer | Jan Kotas <jkotas@microsoft.com> | 2018-08-10 03:43:12 +0300 |
commit | ea295055336e0e83886d5dad63c904d436125525 (patch) | |
tree | 2d6617ab04230ee9f888ed1b3ebcb49708ea96fe /src | |
parent | 49308757c85fe31cef47425a30ece4664a3bf7ba (diff) |
[armel tizen] Fixed unwinding support for ARM is not fully implemented #5874 (#6197)
Diffstat (limited to 'src')
-rw-r--r-- | src/Native/ObjWriter/objwriter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Native/ObjWriter/objwriter.cpp b/src/Native/ObjWriter/objwriter.cpp index 4470f04be..bdf1016dc 100644 --- a/src/Native/ObjWriter/objwriter.cpp +++ b/src/Native/ObjWriter/objwriter.cpp @@ -921,13 +921,13 @@ void ObjectWriter::EmitARMExIdxCode(int Offset, const char *Blob) ATS.emitPad(CfiCode->Offset); break; case CFI_REL_OFFSET: - RegList.push_back(CfiCode->DwarfReg); + RegList.push_back(CfiCode->DwarfReg + 14); // See ARMRegEncodingTable in ARMGenRegisterInfo.inc by getEncodingValue ATS.emitRegSave(RegList, false); break; case CFI_DEF_CFA_REGISTER: assert(CfiCode->Offset == 0 && "Unexpected Offset Value for OpDefCfaRegister"); - ATS.emitMovSP(CfiCode->DwarfReg, 0); + ATS.emitMovSP(CfiCode->DwarfReg + 14, 0); // See ARMRegEncodingTable in ARMGenRegisterInfo.inc by getEncodingValue break; default: assert(false && "Unrecognized CFI"); |