diff options
author | Diego Biurrun <diego@biurrun.de> | 2016-01-18 12:52:21 +0300 |
---|---|---|
committer | Diego Biurrun <diego@biurrun.de> | 2016-07-20 19:43:28 +0300 |
commit | d06dfaa5cbdd20acfd2364b16c0f4ae4ddb30a65 (patch) | |
tree | 7e6536ebc7551592f856ffb423103ddfdb5db873 | |
parent | 8e9cd81d291b1010c625b2766058aadf4affb537 (diff) |
x86: huffyuv: Use EXTERNAL_SSSE3_FAST convenience macro where appropriate
-rw-r--r-- | libavcodec/x86/huffyuvdsp.asm | 4 | ||||
-rw-r--r-- | libavcodec/x86/huffyuvdsp_init.c | 10 |
2 files changed, 8 insertions, 6 deletions
diff --git a/libavcodec/x86/huffyuvdsp.asm b/libavcodec/x86/huffyuvdsp.asm index e7536da998..692162b5b6 100644 --- a/libavcodec/x86/huffyuvdsp.asm +++ b/libavcodec/x86/huffyuvdsp.asm @@ -146,8 +146,8 @@ cglobal add_hfyu_left_pred, 3,3,7, dst, src, w, left psllq m0, 56 ADD_HFYU_LEFT_LOOP 1, 1 -INIT_XMM sse4 -cglobal add_hfyu_left_pred, 3,3,7, dst, src, w, left +INIT_XMM ssse3 +cglobal add_hfyu_left_pred_unaligned, 3,3,7, dst, src, w, left mova m5, [pb_f] mova m6, [pb_zzzzzzzz77777777] mova m4, [pb_zzzz3333zzzzbbbb] diff --git a/libavcodec/x86/huffyuvdsp_init.c b/libavcodec/x86/huffyuvdsp_init.c index 75537d7a4c..80e6cfbb12 100644 --- a/libavcodec/x86/huffyuvdsp_init.c +++ b/libavcodec/x86/huffyuvdsp_init.c @@ -31,8 +31,8 @@ void ff_add_hfyu_median_pred_mmxext(uint8_t *dst, const uint8_t *top, int ff_add_hfyu_left_pred_ssse3(uint8_t *dst, const uint8_t *src, int w, int left); -int ff_add_hfyu_left_pred_sse4(uint8_t *dst, const uint8_t *src, - int w, int left); +int ff_add_hfyu_left_pred_unaligned_ssse3(uint8_t *dst, const uint8_t *src, + int w, int left); #if HAVE_INLINE_ASM @@ -124,7 +124,9 @@ av_cold void ff_huffyuvdsp_init_x86(HuffYUVDSPContext *c) if (EXTERNAL_SSSE3(cpu_flags)) { c->add_hfyu_left_pred = ff_add_hfyu_left_pred_ssse3; - if (cpu_flags & AV_CPU_FLAG_SSE4) // not really SSE4, just slow on Conroe - c->add_hfyu_left_pred = ff_add_hfyu_left_pred_sse4; + } + + if (EXTERNAL_SSSE3_FAST(cpu_flags)) { + c->add_hfyu_left_pred = ff_add_hfyu_left_pred_unaligned_ssse3; } } |