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Diffstat (limited to 'src/filters/transform/MPCVideoDec/CpuId.cpp')
-rw-r--r--src/filters/transform/MPCVideoDec/CpuId.cpp19
1 files changed, 17 insertions, 2 deletions
diff --git a/src/filters/transform/MPCVideoDec/CpuId.cpp b/src/filters/transform/MPCVideoDec/CpuId.cpp
index 5318e632a..5c10d7ed4 100644
--- a/src/filters/transform/MPCVideoDec/CpuId.cpp
+++ b/src/filters/transform/MPCVideoDec/CpuId.cpp
@@ -1,5 +1,5 @@
/*
- * (C) 2007-2012 see Authors.txt
+ * (C) 2007-2013 see Authors.txt
*
* This file is part of MPC-HC.
*
@@ -26,6 +26,9 @@
#define CPUID_SSE (1 << 25)
#define CPUID_SSE2 (1 << 26)
#define CPUID_SSE3 (1 << 0)
+#define CPUID_SSE41 (1 << 19)
+#define CPUID_SSE42 (1 << 20)
+#define CPUID_AVX ((1 << 27) | (1 << 28))
// Intel specific
#define CPUID_SSSE3 (1 << 9)
@@ -34,7 +37,6 @@
#define CPUID_3DNOW (1 << 31)
#define CPUID_MMXEXT (1 << 22)
-
CCpuId::CCpuId()
{
unsigned nHighestFeature;
@@ -78,12 +80,25 @@ CCpuId::CCpuId()
if (nBuff[2] & CPUID_SSE3) {
m_nCPUFeatures |= MPC_MM_SSE3;
}
+ if (nBuff[2] & CPUID_SSE41) {
+ m_nCPUFeatures |= MPC_MM_SSE4;
+ }
+ if (nBuff[2] & CPUID_SSE42) {
+ m_nCPUFeatures |= MPC_MM_SSE42;
+ }
// Intel specific
if (m_nType == PROCESSOR_INTEL) {
if (nBuff[2] & CPUID_SSSE3) {
m_nCPUFeatures |= MPC_MM_SSSE3;
}
+ if ((nBuff[2] & CPUID_AVX) == CPUID_AVX) {
+ // Check for OS support
+ unsigned long long xcrFeatureMask = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
+ if ((xcrFeatureMask & 0x6) == 0x6) {
+ m_nCPUFeatures |= MPC_MM_AVX;
+ }
+ }
}
}