diff options
| author | mirabilos <thorsten.glaser@teckids.org> | 2017-03-25 23:46:08 +0300 |
|---|---|---|
| committer | mirabilos <thorsten.glaser@teckids.org> | 2017-03-25 23:46:08 +0300 |
| commit | b5352b5a6fdd42a041c775e738f23f1c1beee936 (patch) | |
| tree | 0e5c5afc41231e9669386105e01e792e2d9933d1 | |
| parent | ec38927d65efc0a17f7a5278b37b4bbd5f623c41 (diff) | |
move all (now read-only) data to the text section on all architectures
| -rw-r--r-- | src/amd64/rfxcodec_encode_dwt_shift_amd64_sse2.asm | 2 | ||||
| -rw-r--r-- | src/amd64/rfxcodec_encode_dwt_shift_amd64_sse41.asm | 2 | ||||
| -rw-r--r-- | src/common.asm | 3 | ||||
| -rw-r--r-- | src/x86/rfxcodec_encode_dwt_shift_x86_sse2.asm | 2 | ||||
| -rw-r--r-- | src/x86/rfxcodec_encode_dwt_shift_x86_sse41.asm | 2 |
5 files changed, 1 insertions, 10 deletions
diff --git a/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse2.asm b/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse2.asm index ea096d1..ac843f5 100644 --- a/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse2.asm +++ b/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse2.asm @@ -42,8 +42,6 @@ PREPARE_RODATA cwa8192 times 8 dw 8192 ; 14 cwa16384 times 8 dw 16384 ; 15 -section .text - ;****************************************************************************** ; source 16 bit signed, 16 pixel width rfx_dwt_2d_encode_block_horiz_16_16: diff --git a/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse41.asm b/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse41.asm index 763ebb4..2bbf4fb 100644 --- a/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse41.asm +++ b/src/amd64/rfxcodec_encode_dwt_shift_amd64_sse41.asm @@ -42,8 +42,6 @@ PREPARE_RODATA cwa8192 times 8 dw 8192 ; 14 cwa16384 times 8 dw 16384 ; 15 -section .text - ;****************************************************************************** ; source 16 bit signed, 16 pixel width rfx_dwt_2d_encode_block_horiz_16_16: diff --git a/src/common.asm b/src/common.asm index b2fefb2..12f0ad5 100644 --- a/src/common.asm +++ b/src/common.asm @@ -68,7 +68,6 @@ section .text ..@get_caller_address: mov ebx, [esp] ret -section .data align 16 ..@rodata_begin: %endmacro @@ -91,7 +90,7 @@ align 16 %ifnmacro PREPARE_RODATA %macro PREPARE_RODATA 0 -section .data +section .text align 16 %endmacro %endif diff --git a/src/x86/rfxcodec_encode_dwt_shift_x86_sse2.asm b/src/x86/rfxcodec_encode_dwt_shift_x86_sse2.asm index c7d0dc0..991dab5 100644 --- a/src/x86/rfxcodec_encode_dwt_shift_x86_sse2.asm +++ b/src/x86/rfxcodec_encode_dwt_shift_x86_sse2.asm @@ -43,8 +43,6 @@ PREPARE_RODATA cwa8192 times 8 dw 8192 ; 14 cwa16384 times 8 dw 16384 ; 15 -section .text - %define LHI_ADD [esp + 1 * 16 + 4] %define LHI_SFT [esp + 2 * 16 + 4] %define LLO_ADD [esp + 3 * 16 + 4] diff --git a/src/x86/rfxcodec_encode_dwt_shift_x86_sse41.asm b/src/x86/rfxcodec_encode_dwt_shift_x86_sse41.asm index f8d3893..7244db4 100644 --- a/src/x86/rfxcodec_encode_dwt_shift_x86_sse41.asm +++ b/src/x86/rfxcodec_encode_dwt_shift_x86_sse41.asm @@ -43,8 +43,6 @@ PREPARE_RODATA cwa8192 times 8 dw 8192 ; 14 cwa16384 times 8 dw 16384 ; 15 -section .text - %define LHI_ADD [esp + 1 * 16 + 4] %define LHI_SFT [esp + 2 * 16 + 4] %define LLO_ADD [esp + 3 * 16 + 4] |